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cpu_conf_cc26xx_cc13xx.h
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1/*
2 * Copyright (C) 2016 Leon George
3 * Copyright (C) 2020 Locha Inc
4 *
5 * This file is subject to the terms and conditions of the GNU Lesser
6 * General Public License v2.1. See the file LICENSE in the top level
7 * directory for more details.
8 */
9
10#pragma once
11
22
23#include "kernel_defines.h"
24
25#include "cpu_conf_common.h"
26
27#include "cc26xx_cc13xx.h"
28
29#include "cc26xx_cc13xx_adi.h"
30#include "cc26xx_cc13xx_ccfg.h"
31#include "cc26xx_cc13xx_gpio.h"
32#include "cc26xx_cc13xx_gpt.h"
34#include "cc26xx_cc13xx_i2c.h"
35#include "cc26xx_cc13xx_ioc.h"
36#include "cc26xx_cc13xx_rfc.h"
37#include "cc26xx_cc13xx_uart.h"
38#include "cc26xx_cc13xx_vims.h"
39#include "cc26xx_cc13xx_wdt.h"
40
41#ifdef __cplusplus
42extern "C" {
43#endif
44
49#define CPU_DEFAULT_IRQ_PRIO (1U)
50#define CPU_IRQ_NUMOF IRQN_COUNT
51#define CPU_FLASH_BASE FLASH_BASE
53
62#ifndef CONFIG_CC26XX_CC13XX_UPDATE_CCFG
63#define CONFIG_CC26XX_CC13XX_UPDATE_CCFG 0
64#endif
65
72#ifndef CONFIG_CC26XX_CC13XX_FORCE_VDDR_HH
73#define CONFIG_CC26XX_CC13XX_FORCE_VDDR_HH 0
74#endif
75
84#ifndef CONFIG_CC26XX_CC13XX_GPRAM
85#define CONFIG_CC26XX_CC13XX_GPRAM 0
86#endif
87
92#if IS_ACTIVE(CONFIG_CC26XX_CC13XX_BL_LEVEL_ACTIVE_HIGH)
93#define CONFIG_CC26XX_CC13XX_BL_LEVEL 0x1
94#elif IS_ACTIVE(CONFIG_CC26XX_CC13XX_BL_LEVEL_ACTIVE_LOW)
95#define CONFIG_CC26XX_CC13XX_BL_LEVEL 0x0
96#endif
97
98#ifndef CONFIG_CC26XX_CC13XX_BL_LEVEL
99#define CONFIG_CC26XX_CC13XX_BL_LEVEL 0x1
100#endif
101
106#ifndef CONFIG_CC26XX_CC13XX_BL_PIN
107#define CONFIG_CC26XX_CC13XX_BL_PIN 0xFF
108#endif
109
110/* high VDDR is available only on CC13xx CPUs */
111#if IS_ACTIVE(CONFIG_CPU_FAM_CC13XX)
112
113#if IS_ACTIVE(CONFIG_CC26XX_CC13XX_FORCE_VDDR_HH)
114#define SET_MODE_CONF_1_ALT_DCDC_VMIN 0xC
115#define SET_MODE_CONF_VDDR_EXT_LOAD 0x1
116#endif
117
118#endif /* IS_ACTIVE(CONFIG_CPU_FAM_CC13XX) */
119
120#if !IS_ACTIVE(CONFIG_CC26XX_CC13XX_GPRAM)
121#define SET_SIZE_AND_DIS_FLAGS_DIS_GPRAM 0x1
122#endif
123
124#if IS_ACTIVE(CONFIG_CC26XX_CC13XX_ROM_BOOTLOADER)
125#define SET_BL_CONFIG_BOOTLOADER_ENABLE 0xC5
126#define SET_BL_CONFIG_BL_ENABLE 0xC5
127
128#if defined(CONFIG_CC26XX_CC13XX_BL_LEVEL)
129#define SET_BL_CONFIG_BL_LEVEL CONFIG_CC26XX_CC13XX_BL_LEVEL
130#endif
131
132#if IS_ACTIVE(CONFIG_CC26XX_CC13XX_BL_PIN_EN)
133#define SET_BL_CONFIG_BL_PIN_NUMBER CONFIG_CC26XX_CC13XX_BL_PIN
134#endif
135
136#endif /* IS_USED(CONFIG_CC26XX_CC13XX_ROM_BOOTLOADER) */
137
138/* when GPRAM is not disabled, use it as a backup RAM */
139#if IS_ACTIVE(CONFIG_CC26XX_CC13XX_DIS_GPRAM)
140#define NUM_HEAPS (1)
141#else
142#define NUM_HEAPS (2)
143#endif
145
154#ifndef SET_EXT_LF_CLK_DIO
155#define SET_EXT_LF_CLK_DIO 0x01
156#endif
157
170#ifndef SET_EXT_LF_CLK_RTC_INCREMENT
171#define SET_EXT_LF_CLK_RTC_INCREMENT 0x800000
172#endif
173
174#if defined(CPU_VARIANT_X2) || defined(DOXYGEN)
185#ifndef SET_MODE_CONF_1_TCXO_TYPE
186#define SET_MODE_CONF_1_TCXO_TYPE 0x01
187#endif
188
196#ifndef SET_MODE_CONF_1_TCXO_MAX_START
197#define SET_MODE_CONF_1_TCXO_MAX_START 0x7F
198#endif
199
200#endif /* defined(CPU_VARIANT_X2) || defined(DOXYGEN) */
201
220#ifndef SET_MODE_CONF_1_ALT_DCDC_VMIN
221#define SET_MODE_CONF_1_ALT_DCDC_VMIN 0x8
222#endif
223
229#ifndef SET_MODE_CONF_1_ALT_DCDC_DITHER_EN
230#define SET_MODE_CONF_1_ALT_DCDC_DITHER_EN 0x0
231#endif
232
240#ifndef SET_MODE_CONF_1_ALT_DCDC_IPEAK
241#define SET_MODE_CONF_1_ALT_DCDC_IPEAK 0x0
242#endif
243
247#ifndef SET_MODE_CONF_1_DELTA_IBIAS_INIT
248#define SET_MODE_CONF_1_DELTA_IBIAS_INIT 0x0
249#endif
250
254#ifndef SET_MODE_CONF_1_DELTA_IBIAS_OFFSET
255#define SET_MODE_CONF_1_DELTA_IBIAS_OFFSET 0x0
256#endif
257
261#ifndef SET_MODE_CONF_1_XOSC_MAX_START
262#define SET_MODE_CONF_1_XOSC_MAX_START 0x10
263#endif
264
268#ifndef SET_SIZE_AND_DIS_FLAGS_SIZE_OF_CCFG
269#define SET_SIZE_AND_DIS_FLAGS_SIZE_OF_CCFG 0x0058
270#endif
271
275#ifndef SET_SIZE_AND_DIS_FLAGS_DISABLE_FLAGS
276#define SET_SIZE_AND_DIS_FLAGS_DISABLE_FLAGS \
277 (CCFG_SIZE_AND_DIS_FLAGS_DISABLE_FLAGS_m >> \
278 CCFG_SIZE_AND_DIS_FLAGS_DISABLE_FLAGS_s)
279#endif
280
286#ifndef SET_SIZE_AND_DIS_FLAGS_DIS_TCXO
287#define SET_SIZE_AND_DIS_FLAGS_DIS_TCXO 0x1
288#endif
289
298#ifndef SET_SIZE_AND_DIS_FLAGS_DIS_GPRAM
299#define SET_SIZE_AND_DIS_FLAGS_DIS_GPRAM 0x0
300#endif
301
311#ifndef SET_SIZE_AND_DIS_FLAGS_DIS_ALT_DCDC_SETTING
312#define SET_SIZE_AND_DIS_FLAGS_DIS_ALT_DCDC_SETTING 0x0
313#endif
314
324#ifndef SET_SIZE_AND_DIS_FLAGS_DIS_XOSC_OVR
325#define SET_SIZE_AND_DIS_FLAGS_DIS_XOSC_OVR 0x1
326#endif
327
338#ifndef SET_MODE_CONF_VDDR_TRIM_SLEEP_DELTA
339#define SET_MODE_CONF_VDDR_TRIM_SLEEP_DELTA 0xF
340#endif
341
347#ifndef SET_MODE_CONF_DCDC_RECHARGE
348#define SET_MODE_CONF_DCDC_RECHARGE 0x0
349#endif
350
356#ifndef SET_MODE_CONF_DCDC_ACTIVE
357#define SET_MODE_CONF_DCDC_ACTIVE 0x0
358#endif
359
364#ifndef SET_MODE_CONF_VDDR_EXT_LOAD
365#define SET_MODE_CONF_VDDR_EXT_LOAD 0x0
366#endif
367
375#ifndef SET_MODE_CONF_VDDS_BOD_LEVEL
376#define SET_MODE_CONF_VDDS_BOD_LEVEL 0x1
377#endif
378
387#ifndef SET_MODE_CONF_SCLK_LF_OPTION
388#define SET_MODE_CONF_SCLK_LF_OPTION 0x2
389#endif
390
405#ifndef SET_MODE_CONF_VDDR_TRIM_SLEEP_TC
406#define SET_MODE_CONF_VDDR_TRIM_SLEEP_TC 0x1
407#endif
408
412#ifndef SET_MODE_CONF_RTC_COMP
413#define SET_MODE_CONF_RTC_COMP 0x1
414#endif
415
424#ifndef SET_MODE_CONF_XOSC_FREQ
425#define SET_MODE_CONF_XOSC_FREQ 0x2
426#endif
427
434#ifndef SET_MODE_CONF_XOSC_CAP_MOD
435#define SET_MODE_CONF_XOSC_CAP_MOD 0x1
436#endif
437
441#ifndef SET_MODE_CONF_HF_COMP
442#define SET_MODE_CONF_HF_COMP 0x1
443#endif
444
450#ifndef SET_MODE_CONF_XOSC_CAPARRAY_DELTA
451#define SET_MODE_CONF_XOSC_CAPARRAY_DELTA 0xFF
452#endif
453
462#ifndef SET_MODE_CONF_VDDR_CAP
463#define SET_MODE_CONF_VDDR_CAP 0x3A
464#endif
465
473#ifndef SET_BL_CONFIG_BOOTLOADER_ENABLE
474#define SET_BL_CONFIG_BOOTLOADER_ENABLE 0x00
475#endif
476
483#ifndef SET_BL_CONFIG_BL_LEVEL
484#define SET_BL_CONFIG_BL_LEVEL 0x1
485#endif
486
491#ifndef SET_BL_CONFIG_BL_PIN_NUMBER
492#define SET_BL_CONFIG_BL_PIN_NUMBER 0xFF
493#endif
494
500#ifndef SET_BL_CONFIG_BL_ENABLE
501#define SET_BL_CONFIG_BL_ENABLE 0xFF
502#endif
503
509#ifndef SET_CCFG_TAP_DAP_0_CPU_DAP_ENABLE
510#define SET_CCFG_TAP_DAP_0_CPU_DAP_ENABLE 0xC5
511#endif
512
518#ifndef SET_CCFG_TAP_DAP_0_PWRPROF_TAP_ENABLE
519#define SET_CCFG_TAP_DAP_0_PWRPROF_TAP_ENABLE 0xC5
520#endif
521
527#ifndef SET_CCFG_TAP_DAP_0_TEST_TAP_ENABLE
528#define SET_CCFG_TAP_DAP_0_TEST_TAP_ENABLE 0x00
529#endif
531
532#ifdef __cplusplus
533}
534#endif
535
CC26xx, CC13xx definitions.
CC26xx/CC13xx MCU I/O register definitions.
CC26xx/CC13xx CCFG register definitions.
Driver for the cc26xx/cc13xx GPIO controller.
definitions for the CC26xx/CC13XX GPT modules
CC26xx/CC13xx ROM Hard-API.
CC26xx/CC13xx MCU I/O register definitions.
CC26xx/CC13xx MCU I/O register definitions.
CC26xx/CC13xx MCU I/O register definitions.
CC26xx/CC13xx UART interface.
CC26xx/CC13xx VIMS register definitions.
CC26xx/CC13xx WDT register definitions.
Common macros and compiler attributes/pragmas configuration.