cfg_clock_common_fx_gx_mp1_c0.h

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/*
 * Copyright (C) 2018 Freie Universität Berlin
 *               2017 OTA keys S.A.
 *               2018-2020 Inria
 *
 * This file is subject to the terms and conditions of the GNU Lesser
 * General Public License v2.1. See the file LICENSE in the top level
 * directory for more details.
 */
 
#ifndef CLK_CFG_CLOCK_COMMON_FX_GX_MP1_C0_H
#define CLK_CFG_CLOCK_COMMON_FX_GX_MP1_C0_H
 
#include "kernel_defines.h"
 
#ifdef __cplusplus
extern "C" {
#endif
 
/* Select the desired system clock source between PLL, HSE or HSI */
#ifndef CONFIG_USE_CLOCK_PLL
#if IS_ACTIVE(CONFIG_USE_CLOCK_HSE) || IS_ACTIVE(CONFIG_USE_CLOCK_HSI)
#define CONFIG_USE_CLOCK_PLL            0
#else
#if defined(CPU_FAM_STM32C0)  /* PLL not supported in STM32C0 */
#define CONFIG_USE_CLOCK_PLL            0
#define CONFIG_USE_CLOCK_HSI            1
#else
#define CONFIG_USE_CLOCK_PLL            1     /* Use PLL by default */
#endif
#endif
#endif /* CONFIG_USE_CLOCK_PLL */
 
#if IS_ACTIVE(CONFIG_USE_CLOCK_PLL) && \
    (IS_ACTIVE(CONFIG_USE_CLOCK_HSE) || IS_ACTIVE(CONFIG_USE_CLOCK_HSI))
#error "Cannot use PLL as clock source with other clock configurations"
#endif
 
#if IS_ACTIVE(CONFIG_USE_CLOCK_HSE) && \
    (IS_ACTIVE(CONFIG_USE_CLOCK_PLL) || IS_ACTIVE(CONFIG_USE_CLOCK_HSI))
#error "Cannot use HSE as clock source with other clock configurations"
#endif
 
#if IS_ACTIVE(CONFIG_USE_CLOCK_HSI) && \
    (IS_ACTIVE(CONFIG_USE_CLOCK_PLL) || IS_ACTIVE(CONFIG_USE_CLOCK_HSE))
#error "Cannot use HSI as clock source with other clock configurations"
#endif
 
#ifndef CONFIG_CLOCK_HSE
#if defined(CPU_FAM_STM32G0) || defined(CPU_FAM_STM32G4) || \
    defined(CPU_FAM_STM32MP1) || defined(CPU_FAM_STM32C0)
#define CONFIG_CLOCK_HSE                       MHZ(24)
#else
#define CONFIG_CLOCK_HSE                       MHZ(8)
#endif
#endif
 
#ifndef CONFIG_CLOCK_HSI
#if defined(CPU_FAM_STM32F0) || defined(CPU_FAM_STM32F1) || \
    defined(CPU_FAM_STM32F3)
#define CONFIG_CLOCK_HSI                       MHZ(8)
#elif defined(CPU_FAM_STM32MP1)
#define CONFIG_CLOCK_HSI                       MHZ(64)
#elif defined(CPU_FAM_STM32C0)
#define CONFIG_CLOCK_HSI                       MHZ(48)
#else
#define CONFIG_CLOCK_HSI                       MHZ(16)
#endif
#endif
#ifdef __cplusplus
}
#endif
 
#endif /* CLK_CFG_CLOCK_COMMON_FX_GX_MP1_C0_H */