MSP430 F2xx/G2xx SPI configuration, CPU level. More...

Detailed Description

MSP430 F2xx/G2xx SPI configuration, CPU level.

The MSP430 F2xx/G2xx has two USCI peripherals which both can be operated in SPI mode. Each is connected to a fixed GPIO for COPI (MOSI), CIPO (MISO), and SCK, respectively. Hence, there is not much left for the board to configure anyway, so we just prepare UART configurations at CPU level for the board to refer to. The unused configuration(s) will be garbage collected by the linker.

Definition at line 172 of file periph_cpu.h.

#include <periph_cpu.h>

Data Fields
msp430_usci_params_t	usci_params
	The USCI parameters.

gpio_t	miso
	CIPO (MISO) pin.

gpio_t	mosi
	COPI (MOSI) pin.

gpio_t	sck
	SCK pin.

Field Documentation

◆ miso

gpio_t msp430_usci_spi_params_t::miso

CIPO (MISO) pin.

Definition at line 174 of file periph_cpu.h.

◆ mosi

gpio_t msp430_usci_spi_params_t::mosi

COPI (MOSI) pin.

Definition at line 175 of file periph_cpu.h.

◆ sck

gpio_t msp430_usci_spi_params_t::sck

SCK pin.

Definition at line 176 of file periph_cpu.h.

◆ usci_params

msp430_usci_params_t msp430_usci_spi_params_t::usci_params

The USCI parameters.

Definition at line 173 of file periph_cpu.h.

The documentation for this struct was generated from the following file: