boards/limifrog-v1/include/periph_conf.h
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1 /*
2  * Copyright (C) 2015 Hamburg University of Applied Sciences
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser General
5  * Public License v2.1. See the file LICENSE in the top level directory for more
6  * details.
7  */
8 
19 #ifndef PERIPH_CONF_H
20 #define PERIPH_CONF_H
21 
22 #include "periph_cpu.h"
23 
24 #ifdef __cplusplus
25 extern "C" {
26 #endif
27 
32 #define CLOCK_HSI (16000000U) /* internal oscillator */
33 #define CLOCK_CORECLOCK (32000000U) /* desired core clock frequency */
34 
35 /* configuration of PLL prescaler and multiply values */
36 /* CORECLOCK := HSI / CLOCK_PLL_DIV * CLOCK_PLL_MUL */
37 #define CLOCK_PLL_DIV RCC_CFGR_PLLDIV2
38 #define CLOCK_PLL_MUL RCC_CFGR_PLLMUL4
39 /* configuration of peripheral bus clock prescalers */
40 #define CLOCK_AHB_DIV RCC_CFGR_HPRE_DIV1 /* AHB clock -> 32MHz */
41 #define CLOCK_APB2_DIV RCC_CFGR_PPRE2_DIV1 /* APB2 clock -> 32MHz */
42 #define CLOCK_APB1_DIV RCC_CFGR_PPRE1_DIV1 /* APB1 clock -> 32MHz */
43 /* configuration of flash access cycles */
44 #define CLOCK_FLASH_LATENCY FLASH_ACR_LATENCY
45 
46 /* bus clocks for simplified peripheral initialization, UPDATE MANUALLY! */
47 #define CLOCK_AHB (CLOCK_CORECLOCK / 1)
48 #define CLOCK_APB2 (CLOCK_CORECLOCK / 1)
49 #define CLOCK_APB1 (CLOCK_CORECLOCK / 1)
50 
56 #define DAC_NUMOF (0)
57 
63 static const timer_conf_t timer_config[] = {
64  {
65  .dev = TIM5,
66  .max = 0x0000ffff,
67  .rcc_mask = RCC_APB1ENR_TIM5EN,
68  .bus = APB1,
69  .irqn = TIM5_IRQn
70  }
71 };
72 
73 #define TIMER_0_ISR (isr_tim5)
74 
75 #define TIMER_NUMOF (sizeof(timer_config) / sizeof(timer_config[0]))
76 
82 static const uart_conf_t uart_config[] = {
83  {
84  .dev = USART3,
85  .rcc_mask = RCC_APB1ENR_USART3EN,
86  .rx_pin = GPIO_PIN(PORT_C, 11),
87  .tx_pin = GPIO_PIN(PORT_C, 10),
88  .rx_af = GPIO_AF7,
89  .tx_af = GPIO_AF7,
90  .bus = APB1,
91  .irqn = USART3_IRQn
92  },
93  {
94  .dev = USART1,
95  .rcc_mask = RCC_APB2ENR_USART1EN,
96  .rx_pin = GPIO_PIN(PORT_A, 10),
97  .tx_pin = GPIO_PIN(PORT_A, 9),
98  .rx_af = GPIO_AF7,
99  .tx_af = GPIO_AF7,
100  .bus = APB2,
101  .irqn = USART1_IRQn
102  }
103 };
104 
105 #define UART_0_ISR (isr_usart3)
106 #define UART_1_ISR (isr_usart1)
107 
108 #define UART_NUMOF (sizeof(uart_config) / sizeof(uart_config[0]))
109 
118 static const uint8_t spi_divtable[2][5] = {
119  { /* for APB1 @ 32000000Hz */
120  7, /* -> 125000Hz */
121  5, /* -> 500000Hz */
122  4, /* -> 1000000Hz */
123  2, /* -> 4000000Hz */
124  1 /* -> 8000000Hz */
125  },
126  { /* for APB2 @ 32000000Hz */
127  7, /* -> 125000Hz */
128  5, /* -> 500000Hz */
129  4, /* -> 1000000Hz */
130  2, /* -> 4000000Hz */
131  1 /* -> 8000000Hz */
132  }
133 };
134 
135 static const spi_conf_t spi_config[] = {
136  {
137  .dev = SPI1,
138  .mosi_pin = GPIO_PIN(PORT_A, 7),
139  .miso_pin = GPIO_PIN(PORT_A, 6),
140  .sclk_pin = GPIO_PIN(PORT_A, 5),
141  .cs_pin = GPIO_UNDEF,
142  .af = GPIO_AF5,
143  .rccmask = RCC_APB2ENR_SPI1EN,
144  .apbbus = APB2
145  },
146  {
147  .dev = SPI3,
148  .mosi_pin = GPIO_PIN(PORT_B, 5),
149  .miso_pin = GPIO_PIN(PORT_B, 4),
150  .sclk_pin = GPIO_PIN(PORT_B, 3),
151  .cs_pin = GPIO_UNDEF,
152  .af = GPIO_AF6,
153  .rccmask = RCC_APB1ENR_SPI3EN,
154  .apbbus = APB1
155  }
156 };
157 
158 #define SPI_NUMOF (sizeof(spi_config) / sizeof(spi_config[0]))
159 
165 #define I2C_0_EN 1
166 #define I2C_1_EN 1
167 #define I2C_NUMOF (I2C_0_EN + I2C_1_EN)
168 #define I2C_IRQ_PRIO 1
169 #define I2C_APBCLK (CLOCK_APB1)
170 
171 /* I2C 0 device configuration */
172 #define I2C_0_EVT_ISR isr_i2c1_ev
173 #define I2C_0_ERR_ISR isr_i2c1_er
174 
175 /* I2C 1 device configuration */
176 #define I2C_1_EVT_ISR isr_i2c2_ev
177 #define I2C_1_ERR_ISR isr_i2c2_er
178 
179 static const i2c_conf_t i2c_config[] = {
180  /* device, port, scl-, sda-pin-number, I2C-AF, ER-IRQn, EV-IRQn */
181  {I2C1, GPIO_PIN(PORT_B, 8), GPIO_PIN(PORT_B, 9),
182  GPIO_OD_PU, GPIO_AF4, I2C1_ER_IRQn, I2C1_EV_IRQn},
183  {I2C2, GPIO_PIN(PORT_B, 10), GPIO_PIN(PORT_B, 11),
184  GPIO_OD_PU, GPIO_AF4, I2C2_ER_IRQn, I2C2_EV_IRQn},
185 };
186 
189 #ifdef __cplusplus
190 }
191 #endif
192 
193 #endif /* PERIPH_CONF_H */
194 
use alternate function 4
use alternate function 7
USART_TypeDef * dev
USART device used.
I2C configuration options.
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
use alternate function 6
use alternate function 5
UART device configuration.
#define GPIO_UNDEF
Define a custom GPIO_UNDEF value.
SPI configuration data structure.
cc2538_gptimer_t * dev
timer device
Timer configuration data.
cc2538_ssi_t * dev
SSI device.