boards/limifrog-v1/include/periph_conf.h
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1 /*
2  * Copyright (C) 2015 Hamburg University of Applied Sciences
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser General
5  * Public License v2.1. See the file LICENSE in the top level directory for more
6  * details.
7  */
8 
19 #ifndef PERIPH_CONF_H
20 #define PERIPH_CONF_H
21 
22 #include "periph_cpu.h"
23 
24 #ifdef __cplusplus
25 extern "C" {
26 #endif
27 
32 #define CLOCK_HSI (16000000U) /* internal oscillator */
33 #define CLOCK_CORECLOCK (32000000U) /* desired core clock frequency */
34 
35 /* configuration of PLL prescaler and multiply values */
36 /* CORECLOCK := HSI / CLOCK_PLL_DIV * CLOCK_PLL_MUL */
37 #define CLOCK_PLL_DIV RCC_CFGR_PLLDIV2
38 #define CLOCK_PLL_MUL RCC_CFGR_PLLMUL4
39 /* configuration of peripheral bus clock prescalers */
40 #define CLOCK_AHB_DIV RCC_CFGR_HPRE_DIV1 /* AHB clock -> 32MHz */
41 #define CLOCK_APB2_DIV RCC_CFGR_PPRE2_DIV1 /* APB2 clock -> 32MHz */
42 #define CLOCK_APB1_DIV RCC_CFGR_PPRE1_DIV1 /* APB1 clock -> 32MHz */
43 /* configuration of flash access cycles */
44 #define CLOCK_FLASH_LATENCY FLASH_ACR_LATENCY
45 
46 /* bus clocks for simplified peripheral initialization, UPDATE MANUALLY! */
47 #define CLOCK_AHB (CLOCK_CORECLOCK / 1)
48 #define CLOCK_APB2 (CLOCK_CORECLOCK / 1)
49 #define CLOCK_APB1 (CLOCK_CORECLOCK / 1)
50 
56 static const timer_conf_t timer_config[] = {
57  {
58  .dev = TIM5,
59  .max = 0x0000ffff,
60  .rcc_mask = RCC_APB1ENR_TIM5EN,
61  .bus = APB1,
62  .irqn = TIM5_IRQn
63  }
64 };
65 
66 #define TIMER_0_ISR (isr_tim5)
67 
68 #define TIMER_NUMOF (sizeof(timer_config) / sizeof(timer_config[0]))
69 
75 static const uart_conf_t uart_config[] = {
76  {
77  .dev = USART3,
78  .rcc_mask = RCC_APB1ENR_USART3EN,
79  .rx_pin = GPIO_PIN(PORT_C, 11),
80  .tx_pin = GPIO_PIN(PORT_C, 10),
81  .rx_af = GPIO_AF7,
82  .tx_af = GPIO_AF7,
83  .bus = APB1,
84  .irqn = USART3_IRQn
85  },
86  {
87  .dev = USART1,
88  .rcc_mask = RCC_APB2ENR_USART1EN,
89  .rx_pin = GPIO_PIN(PORT_A, 10),
90  .tx_pin = GPIO_PIN(PORT_A, 9),
91  .rx_af = GPIO_AF7,
92  .tx_af = GPIO_AF7,
93  .bus = APB2,
94  .irqn = USART1_IRQn
95  }
96 };
97 
98 #define UART_0_ISR (isr_usart3)
99 #define UART_1_ISR (isr_usart1)
100 
101 #define UART_NUMOF (sizeof(uart_config) / sizeof(uart_config[0]))
102 
111 static const uint8_t spi_divtable[2][5] = {
112  { /* for APB1 @ 32000000Hz */
113  7, /* -> 125000Hz */
114  5, /* -> 500000Hz */
115  4, /* -> 1000000Hz */
116  2, /* -> 4000000Hz */
117  1 /* -> 8000000Hz */
118  },
119  { /* for APB2 @ 32000000Hz */
120  7, /* -> 125000Hz */
121  5, /* -> 500000Hz */
122  4, /* -> 1000000Hz */
123  2, /* -> 4000000Hz */
124  1 /* -> 8000000Hz */
125  }
126 };
127 
128 static const spi_conf_t spi_config[] = {
129  {
130  .dev = SPI1,
131  .mosi_pin = GPIO_PIN(PORT_A, 7),
132  .miso_pin = GPIO_PIN(PORT_A, 6),
133  .sclk_pin = GPIO_PIN(PORT_A, 5),
134  .cs_pin = GPIO_UNDEF,
135  .af = GPIO_AF5,
136  .rccmask = RCC_APB2ENR_SPI1EN,
137  .apbbus = APB2
138  },
139  {
140  .dev = SPI3,
141  .mosi_pin = GPIO_PIN(PORT_B, 5),
142  .miso_pin = GPIO_PIN(PORT_B, 4),
143  .sclk_pin = GPIO_PIN(PORT_B, 3),
144  .cs_pin = GPIO_UNDEF,
145  .af = GPIO_AF6,
146  .rccmask = RCC_APB1ENR_SPI3EN,
147  .apbbus = APB1
148  }
149 };
150 
151 #define SPI_NUMOF (sizeof(spi_config) / sizeof(spi_config[0]))
152 
158 #define I2C_0_EN 1
159 #define I2C_1_EN 1
160 #define I2C_NUMOF (I2C_0_EN + I2C_1_EN)
161 #define I2C_IRQ_PRIO 1
162 #define I2C_APBCLK (CLOCK_APB1)
163 
164 /* I2C 0 device configuration */
165 #define I2C_0_EVT_ISR isr_i2c1_ev
166 #define I2C_0_ERR_ISR isr_i2c1_er
167 
168 /* I2C 1 device configuration */
169 #define I2C_1_EVT_ISR isr_i2c2_ev
170 #define I2C_1_ERR_ISR isr_i2c2_er
171 
172 static const i2c_conf_t i2c_config[] = {
173  /* device, port, scl-, sda-pin-number, I2C-AF, ER-IRQn, EV-IRQn */
174  {I2C1, GPIO_PIN(PORT_B, 8), GPIO_PIN(PORT_B, 9),
175  GPIO_OD_PU, GPIO_AF4, I2C1_ER_IRQn, I2C1_EV_IRQn},
176  {I2C2, GPIO_PIN(PORT_B, 10), GPIO_PIN(PORT_B, 11),
177  GPIO_OD_PU, GPIO_AF4, I2C2_ER_IRQn, I2C2_EV_IRQn},
178 };
179 
182 #ifdef __cplusplus
183 }
184 #endif
185 
186 #endif /* PERIPH_CONF_H */
187 
use alternate function 4
use alternate function 7
USART_TypeDef * dev
USART device used.
I2C configuration options.
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
use alternate function 6
use alternate function 5
UART device configuration.
#define GPIO_UNDEF
Define a custom GPIO_UNDEF value.
SPI module configuration options.
cc2538_gptimer_t * dev
timer device
Timer configuration data.
cc2538_ssi_t * dev
SSI device.