30#define GPIO_PORT_NUMBERING_ALPHABETIC  1 
   33#  define GPIO_PORT_0       GPIOA_BASE 
   37#  define GPIO_PORT_1       GPIOB_BASE 
   41#  define GPIO_PORT_2       GPIOC_BASE 
   45#  define GPIO_PORT_3       GPIOD_BASE 
   49#  define GPIO_PORT_4       GPIOE_BASE 
   53#  define GPIO_PORT_5       GPIOF_BASE 
   57#  define GPIO_PORT_6       GPIOG_BASE 
   61#  define GPIO_PORT_7       GPIOH_BASE 
   65#  define GPIO_PORT_8       GPIOI_BASE 
   69#  define GPIO_PORT_9       GPIOJ_BASE 
   73#  define GPIO_PORT_10      GPIOK_BASE 
   78#if defined(CPU_FAM_STM32MP1) 
   79    return GPIOA_BASE + (num << 12);
 
   81    return GPIOA_BASE + (num << 10);
 
   87#if defined(CPU_FAM_STM32MP1) 
   88    return (port - GPIOA_BASE) >> 12;
 
   90    return (port - GPIOA_BASE) >> 10;
 
   96    GPIO_TypeDef *p = (GPIO_TypeDef *)port;
 
  102    GPIO_TypeDef *p = (GPIO_TypeDef *)port;
 
  108    GPIO_TypeDef *p = (GPIO_TypeDef *)port;
 
  114    GPIO_TypeDef *p = (GPIO_TypeDef *)port;
 
  118#if defined(GPIO_BRR_BR0) && !defined(CPU_FAM_STM32F4) 
  122    volatile uint16_t *brr = (
volatile uint16_t *)&(p->BSRR);
 
  123    brr[1] = (uint16_t)mask;
 
  129    GPIO_TypeDef *p = (GPIO_TypeDef *)port;
 
  137    GPIO_TypeDef *p = (GPIO_TypeDef *)port;
 
  141#ifdef MODULE_PERIPH_GPIO_LL_SWITCH_DIR 
  146    return gpio_ll_prepare_switch_dir_impl(mask);
 
  151    GPIO_TypeDef *p = (GPIO_TypeDef *)port;
 
  159    GPIO_TypeDef *p = (GPIO_TypeDef *)port;
 
  168    return pin & 0xfffffff0LU;
 
  183    if (port < GPIOA_BASE) {
 
Platform-independent access to architecture details.
MAYBE_INLINE void irq_restore(unsigned state)
This function restores the IRQ disable bit in the status register to the value contained within passe...
MAYBE_INLINE unsigned irq_disable(void)
This function sets the IRQ disable bit in the status register.
static uint8_t gpio_get_pin_num(gpio_t pin)
Extract the pin number from a gpio_t
static void gpio_ll_set(gpio_port_t port, uword_t mask)
Perform an reg |= mask operation on the I/O register of the port.
gpio_port_t gpio_port(uword_t num)
Get the gpio_port_t value of the port number num.
static gpio_port_t gpio_port_pack_addr(void *addr)
Pack a pointer into a gpio_port_t.
static void gpio_ll_switch_dir_output(gpio_port_t port, uword_t pins)
Turn GPIO pins specified by pins (obtained from gpio_ll_prepare_switch_dir) to outputs.
static void gpio_ll_switch_dir_input(gpio_port_t port, uword_t pins)
Turn GPIO pins specified by pins (obtained from gpio_ll_prepare_switch_dir) to inputs.
static uword_t gpio_ll_read(gpio_port_t port)
Get the current input value of all GPIO pins of the given port as bitmask.
static gpio_port_t gpio_get_port(gpio_t pin)
Extract the gpio_port_t from a gpio_t
uword_t gpio_port_num(gpio_port_t port)
Get the number of the GPIO port port refers to.
static uword_t gpio_ll_prepare_switch_dir(uword_t mask)
Prepare bitmask for use with gpio_ll_switch_dir_output and gpio_ll_switch_dir_input.
static void * gpio_port_unpack_addr(gpio_port_t port)
Extract a data pointer that was packed by gpio_port_pack_addr.
static bool is_gpio_port_num_valid(uint_fast8_t num)
Check if the given number is a valid argument for gpio_port.
static uword_t gpio_ll_read_output(gpio_port_t port)
Get the current output value of all GPIO pins of the given port as bitmask.
static void gpio_ll_clear(gpio_port_t port, uword_t mask)
Perform an reg &= ~mask operation on the I/O register of the port.
static void gpio_ll_toggle(gpio_port_t port, uword_t mask)
Perform an reg ^= mask operation on the I/O register of the port.
static void gpio_ll_write(gpio_port_t port, uword_t state)
Perform a masked write operation on the I/O register of the port.
uintptr_t gpio_port_t
GPIO port type.
uint< NUM > _t uword_t
Word sized unsigned integer.
Shared CPU specific definitions for the STM32 family.