39#if IS_ACTIVE(CONFIG_EFM32_XTIMER_USE_LETIMER)
40#define XTIMER_DEV (TIMER_DEV(1))
41#define XTIMER_HZ (32768UL)
42#define XTIMER_WIDTH (16)
44#define XTIMER_DEV (TIMER_DEV(0))
45#define XTIMER_HZ (250000UL)
46#define XTIMER_WIDTH (16)
48#define XTIMER_CHAN (0)
55#define VCOM_EN_PIN GPIO_PIN(PA, 15)
62#define PB0_PIN GPIO_PIN(PD, 5)
63#define PB1_PIN GPIO_PIN(PD, 8)
70#define LED0R_PIN GPIO_PIN(PA, 12)
71#define LED0G_PIN GPIO_PIN(PA, 13)
72#define LED0B_PIN GPIO_PIN(PA, 14)
73#define LED1R_PIN GPIO_PIN(PD, 6)
74#define LED1G_PIN GPIO_PIN(PF, 12)
75#define LED1B_PIN GPIO_PIN(PE, 12)
76#define LED0_PIN LED0R_PIN
77#define LED1_PIN LED1R_PIN
84#define LED0_ON gpio_set(LED0_PIN)
85#define LED0_OFF gpio_clear(LED0_PIN)
86#define LED0_TOGGLE gpio_toggle(LED0_PIN)
87#define LED1_ON gpio_set(LED1_PIN)
88#define LED1_OFF gpio_clear(LED1_PIN)
89#define LED1_TOGGLE gpio_toggle(LED1_PIN)
98#define CORETEMP_ADC ADC_LINE(0)
Native CPU peripheral configuration.
Low-level GPIO peripheral driver interface definitions.
Low-level SPI peripheral driver interface definition.