riot_
sys
0.7.14
In riot_
sys::
bindgen
Structs
ACL_ACL_Type
APSR_Type__bindgen_ty_1
ARM_MPU_Region_t
CONTROL_Type__bindgen_ty_1
CoreDebug_Type
DWT_Type
FICR_INFO_Type
FICR_NFC_Type
FICR_TEMP_Type
FICR_TRNG90B_Type
FPU_Type
I2S_CONFIG_Type
I2S_PSEL_Type
I2S_RXD_Type
I2S_RXTXD_Type
I2S_TXD_Type
IPSR_Type__bindgen_ty_1
ITM_Type
MPU_Type
MWU_EVENTS_PREGION_Type
MWU_EVENTS_REGION_Type
MWU_PERREGION_Type
MWU_PREGION_Type
MWU_REGION_Type
NFCT_FRAMESTATUS_Type
NFCT_RXD_Type
NFCT_TXD_Type
NRF_AAR_Type
NRF_ACL_Type
NRF_CCM_Type
NRF_CC_HOST_RGF_Type
NRF_CLOCK_Type
NRF_COMP_Type
NRF_CRYPTOCELL_Type
NRF_ECB_Type
NRF_EGU_Type
NRF_FICR_Type
NRF_FPU_Type
NRF_GPIOTE_Type
NRF_GPIO_Type
NRF_I2S_Type
NRF_LPCOMP_Type
NRF_MWU_Type
NRF_NFCT_Type
NRF_NVMC_Type
NRF_PDM_Type
NRF_POWER_Type
NRF_PPI_Type
NRF_PWM_Type
NRF_QDEC_Type
NRF_QSPI_Type
NRF_RADIO_Type
NRF_RNG_Type
NRF_RTC_Type
NRF_SAADC_Type
NRF_SPIM_Type
NRF_SPIS_Type
NRF_SPI_Type
NRF_SWI_Type
NRF_TEMP_Type
NRF_TIMER_Type
NRF_TWIM_Type
NRF_TWIS_Type
NRF_TWI_Type
NRF_UARTE_Type
NRF_UART_Type
NRF_UICR_Type
NRF_USBD_Type
NRF_WDT_Type
NVIC_Type
PDM_PSEL_Type
PDM_SAMPLE_Type
POWER_RAM_Type
PPI_CH_Type
PPI_FORK_Type
PPI_TASKS_CHG_Type
PWM_PSEL_Type
PWM_SEQ_Type
QDEC_PSEL_Type
QSPI_ERASE_Type
QSPI_PSEL_Type
QSPI_READ_Type
QSPI_WRITE_Type
SAADC_CH_Type
SAADC_EVENTS_CH_Type
SAADC_RESULT_Type
SCB_Type
SCnSCB_Type
SPIM_IFTIMING_Type
SPIM_PSEL_Type
SPIM_RXD_Type
SPIM_TXD_Type
SPIS_PSEL_Type
SPIS_RXD_Type
SPIS_TXD_Type
SPI_PSEL_Type
SysTick_Type
TPI_Type
TWIM_PSEL_Type
TWIM_RXD_Type
TWIM_TXD_Type
TWIS_PSEL_Type
TWIS_RXD_Type
TWIS_TXD_Type
TWI_PSEL_Type
T_UINT16_READ
T_UINT16_WRITE
T_UINT32
T_UINT32_READ
T_UINT32_WRITE
UARTE_PSEL_Type
UARTE_RXD_Type
UARTE_TXD_Type
UART_PSEL_Type
USBD_EPIN_Type
USBD_EPOUT_Type
USBD_HALTED_Type
USBD_ISOIN_Type
USBD_ISOOUT_Type
USBD_SIZE_Type
_Bigint
__BindgenBitfieldUnit
__IncompleteArrayField
__locale_t
__lock
__sFILE
__sFILE_fake
__sbuf
__tm
_atexit
_bindgen_ty_12
_coap_request_ctx
_glue
_mbstate_t
_misc_reent
_mprec
_on_exit_args
_rand48
_reent
_sock_tl_ep
_thread
adv_report
adv_set
aes128_cmac_context_t
auto_init_module_t
ble_addr_t
ble_att_error_rsp
ble_encryption_block
ble_gap_adv_params
ble_gap_conn_desc
ble_gap_conn_params
ble_gap_disc_desc
ble_gap_disc_params
ble_gap_event
ble_gap_event__bindgen_ty_1__bindgen_ty_1
ble_gap_event__bindgen_ty_1__bindgen_ty_10
ble_gap_event__bindgen_ty_1__bindgen_ty_11
ble_gap_event__bindgen_ty_1__bindgen_ty_12
ble_gap_event__bindgen_ty_1__bindgen_ty_13
ble_gap_event__bindgen_ty_1__bindgen_ty_14
ble_gap_event__bindgen_ty_1__bindgen_ty_15
ble_gap_event__bindgen_ty_1__bindgen_ty_2
ble_gap_event__bindgen_ty_1__bindgen_ty_3
ble_gap_event__bindgen_ty_1__bindgen_ty_4
ble_gap_event__bindgen_ty_1__bindgen_ty_5
ble_gap_event__bindgen_ty_1__bindgen_ty_6
ble_gap_event__bindgen_ty_1__bindgen_ty_7
ble_gap_event__bindgen_ty_1__bindgen_ty_8
ble_gap_event__bindgen_ty_1__bindgen_ty_9
ble_gap_event_listener
ble_gap_event_listener__bindgen_ty_1
ble_gap_ext_disc_params
ble_gap_passkey_params
ble_gap_repeat_pairing
ble_gap_sec_state
ble_gap_upd_params
ble_gatt_access_ctxt
ble_gatt_attr
ble_gatt_chr
ble_gatt_chr_def
ble_gatt_dsc
ble_gatt_dsc_def
ble_gatt_error
ble_gatt_register_ctxt
ble_gatt_register_ctxt__bindgen_ty_1__bindgen_ty_1
ble_gatt_register_ctxt__bindgen_ty_1__bindgen_ty_2
ble_gatt_register_ctxt__bindgen_ty_1__bindgen_ty_3
ble_gatt_svc
ble_gatt_svc_def
ble_hci_cb_ctlr_to_host_fc_cp
ble_hci_cb_host_buf_size_cp
ble_hci_cb_host_num_comp_pkts_cp
ble_hci_cb_host_num_comp_pkts_entry
ble_hci_cb_rd_auth_pyld_tmo_cp
ble_hci_cb_rd_auth_pyld_tmo_rp
ble_hci_cb_read_tx_pwr_cp
ble_hci_cb_read_tx_pwr_rp
ble_hci_cb_set_event_mask2_cp
ble_hci_cb_set_event_mask_cp
ble_hci_cb_wr_auth_pyld_tmo_cp
ble_hci_cb_wr_auth_pyld_tmo_rp
ble_hci_cmd
ble_hci_ev
ble_hci_ev_auth_pyld_tmo
ble_hci_ev_command_complete
ble_hci_ev_command_complete_nop
ble_hci_ev_command_status
ble_hci_ev_data_buf_overflow
ble_hci_ev_disconn_cmp
ble_hci_ev_enc_key_refresh
ble_hci_ev_enrypt_chg
ble_hci_ev_hw_error
ble_hci_ev_le_meta
ble_hci_ev_le_subev_adv_rpt
ble_hci_ev_le_subev_adv_set_terminated
ble_hci_ev_le_subev_big_complete
ble_hci_ev_le_subev_big_sync_established
ble_hci_ev_le_subev_big_sync_lost
ble_hci_ev_le_subev_big_terminate_complete
ble_hci_ev_le_subev_biginfo_adv_report
ble_hci_ev_le_subev_chan_sel_alg
ble_hci_ev_le_subev_cis_established
ble_hci_ev_le_subev_cis_request
ble_hci_ev_le_subev_conn_complete
ble_hci_ev_le_subev_conn_upd_complete
ble_hci_ev_le_subev_data_len_chg
ble_hci_ev_le_subev_direct_adv_rpt
ble_hci_ev_le_subev_enh_conn_complete
ble_hci_ev_le_subev_ext_adv_rpt
ble_hci_ev_le_subev_gen_dhkey_complete
ble_hci_ev_le_subev_lt_key_req
ble_hci_ev_le_subev_path_loss_threshold
ble_hci_ev_le_subev_peer_sca_complete
ble_hci_ev_le_subev_periodic_adv_rpt
ble_hci_ev_le_subev_periodic_adv_sync_estab
ble_hci_ev_le_subev_periodic_adv_sync_lost
ble_hci_ev_le_subev_periodic_adv_sync_transfer
ble_hci_ev_le_subev_phy_update_complete
ble_hci_ev_le_subev_rd_loc_p256_pubkey
ble_hci_ev_le_subev_rd_rem_used_feat
ble_hci_ev_le_subev_rem_conn_param_req
ble_hci_ev_le_subev_scan_req_rcvd
ble_hci_ev_le_subev_scan_timeout
ble_hci_ev_le_subev_subrate_change
ble_hci_ev_le_subev_transmit_power_report
ble_hci_ev_num_comp_pkts
ble_hci_ev_rd_rem_ver_info_cmp
ble_hci_ev_vs_debug
ble_hci_ip_rd_bd_addr_rp
ble_hci_ip_rd_buf_size_rp
ble_hci_ip_rd_loc_supp_cmd_rp
ble_hci_ip_rd_loc_supp_feat_rp
ble_hci_ip_rd_local_ver_rp
ble_hci_lc_disconnect_cp
ble_hci_le_add_dev_to_periodic_adv_list_cp
ble_hci_le_add_resolv_list_cp
ble_hci_le_add_whte_list_cp
ble_hci_le_conn_update_cp
ble_hci_le_create_conn_cp
ble_hci_le_encrypt_cp
ble_hci_le_encrypt_rp
ble_hci_le_enh_read_transmit_power_level_cp
ble_hci_le_enh_read_transmit_power_level_rp
ble_hci_le_ext_create_conn_cp
ble_hci_le_gen_dhkey_cp
ble_hci_le_lt_key_req_neg_reply_cp
ble_hci_le_lt_key_req_neg_reply_rp
ble_hci_le_lt_key_req_reply_cp
ble_hci_le_lt_key_req_reply_rp
ble_hci_le_periodic_adv_create_sync_cp
ble_hci_le_periodic_adv_receive_enable_cp
ble_hci_le_periodic_adv_set_info_transfer_cp
ble_hci_le_periodic_adv_set_info_transfer_rp
ble_hci_le_periodic_adv_sync_transfer_cp
ble_hci_le_periodic_adv_sync_transfer_params_cp
ble_hci_le_periodic_adv_sync_transfer_params_rp
ble_hci_le_periodic_adv_sync_transfer_rp
ble_hci_le_periodic_adv_term_sync_cp
ble_hci_le_rand_rp
ble_hci_le_rd_adv_chan_txpwr_rp
ble_hci_le_rd_buf_size_rp
ble_hci_le_rd_buf_size_v2_rp
ble_hci_le_rd_chan_map_cp
ble_hci_le_rd_chan_map_rp
ble_hci_le_rd_loc_supp_feat_rp
ble_hci_le_rd_local_resolv_addr_cp
ble_hci_le_rd_local_resolv_addr_rp
ble_hci_le_rd_max_adv_data_len_rp
ble_hci_le_rd_max_data_len_rp
ble_hci_le_rd_num_of_adv_sets_rp
ble_hci_le_rd_peer_resolv_addr_cp
ble_hci_le_rd_peer_resolv_addr_rp
ble_hci_le_rd_periodic_adv_list_size_rp
ble_hci_le_rd_phy_cp
ble_hci_le_rd_phy_rp
ble_hci_le_rd_rem_feat_cp
ble_hci_le_rd_resolv_list_size_rp
ble_hci_le_rd_rf_path_compensation_rp
ble_hci_le_rd_sugg_def_data_len_rp
ble_hci_le_rd_supp_states_rp
ble_hci_le_rd_transmit_power_rp
ble_hci_le_rd_white_list_rp
ble_hci_le_read_remote_transmit_power_level_cp
ble_hci_le_rem_conn_param_rr_cp
ble_hci_le_rem_conn_param_rr_rp
ble_hci_le_rem_conn_params_nrr_cp
ble_hci_le_rem_conn_params_nrr_rp
ble_hci_le_rem_dev_from_periodic_adv_list_cp
ble_hci_le_remove_adv_set_cp
ble_hci_le_request_peer_sca_cp
ble_hci_le_rmv_resolve_list_cp
ble_hci_le_rmv_white_list_cp
ble_hci_le_rx_test_cp
ble_hci_le_rx_test_v2_cp
ble_hci_le_set_addr_res_en_cp
ble_hci_le_set_adv_data_cp
ble_hci_le_set_adv_enable_cp
ble_hci_le_set_adv_params_cp
ble_hci_le_set_adv_set_rnd_addr_cp
ble_hci_le_set_data_len_cp
ble_hci_le_set_data_len_rp
ble_hci_le_set_default_periodic_sync_transfer_params_cp
ble_hci_le_set_default_phy_cp
ble_hci_le_set_default_subrate_cp
ble_hci_le_set_event_mask_cp
ble_hci_le_set_ext_adv_data_cp
ble_hci_le_set_ext_adv_enable_cp
ble_hci_le_set_ext_adv_params_cp
ble_hci_le_set_ext_adv_params_rp
ble_hci_le_set_ext_scan_enable_cp
ble_hci_le_set_ext_scan_params_cp
ble_hci_le_set_ext_scan_rsp_data_cp
ble_hci_le_set_host_chan_class_cp
ble_hci_le_set_host_feat_cp
ble_hci_le_set_path_loss_report_enable_cp
ble_hci_le_set_path_loss_report_param_cp
ble_hci_le_set_periodic_adv_data_cp
ble_hci_le_set_periodic_adv_enable_cp
ble_hci_le_set_periodic_adv_params_cp
ble_hci_le_set_phy_cp
ble_hci_le_set_privacy_mode_cp
ble_hci_le_set_rand_addr_cp
ble_hci_le_set_rpa_tmo_cp
ble_hci_le_set_scan_enable_cp
ble_hci_le_set_scan_params_cp
ble_hci_le_set_scan_rsp_data_cp
ble_hci_le_set_transmit_power_report_enable_cp
ble_hci_le_start_encrypt_cp
ble_hci_le_subrate_req_cp
ble_hci_le_test_end_rp
ble_hci_le_tx_test_cp
ble_hci_le_tx_test_v2_cp
ble_hci_le_wr_rf_path_compensation_cp
ble_hci_le_wr_sugg_def_data_len_cp
ble_hci_rd_rem_ver_info_cp
ble_hci_rd_rssi_cp
ble_hci_rd_rssi_rp
ble_hci_vs_css_configure_cp
ble_hci_vs_css_cp
ble_hci_vs_css_set_conn_slot_cp
ble_hci_vs_css_set_next_slot_cp
ble_hci_vs_rd_static_addr_rp
ble_hci_vs_set_tx_pwr_cp
ble_hci_vs_set_tx_pwr_rp
ble_hs_adv_field
ble_hs_adv_fields
ble_hs_cfg
ble_hs_conn
ble_hs_stop_listener
ble_hs_stop_listener__bindgen_ty_1
ble_l2cap_chan
ble_l2cap_chan_info
ble_l2cap_event
ble_l2cap_event__bindgen_ty_1__bindgen_ty_1
ble_l2cap_event__bindgen_ty_1__bindgen_ty_2
ble_l2cap_event__bindgen_ty_1__bindgen_ty_3
ble_l2cap_event__bindgen_ty_1__bindgen_ty_4
ble_l2cap_event__bindgen_ty_1__bindgen_ty_5
ble_l2cap_event__bindgen_ty_1__bindgen_ty_6
ble_l2cap_sig_update_params
ble_l2cap_sig_update_req
ble_mbuf_hdr
ble_mbuf_hdr_rxinfo
ble_mbuf_hdr_txinfo
ble_npl_callout
ble_npl_event
ble_npl_eventq
ble_npl_mutex
ble_npl_sem
ble_sm_io
ble_sm_io__bindgen_ty_1__bindgen_ty_1
ble_sm_sc_oob_data
ble_store_key_cccd
ble_store_key_sec
ble_store_status_event
ble_store_status_event__bindgen_ty_1__bindgen_ty_1
ble_store_status_event__bindgen_ty_1__bindgen_ty_2
ble_store_value_cccd
ble_store_value_sec
ble_uuid128_t
ble_uuid16_t
ble_uuid32_t
ble_uuid_t
bluetil_ad_data_t
bluetil_ad_t
cib_t
cipher_context_t
cipher_interface_st
cipher_t
coap_block1_t
coap_block_request_t
coap_block_slicer_t
coap_hdr_t
coap_link_encoder_ctx_t
coap_optpos_t
coap_pkt_t
coap_resource_t
comp_pkt
conn_params
cose_hdr
cose_headers_t
cose_key
cose_sign
cose_sign_dec
cose_signature
cose_signature_dec
dhcpv6_duid_l2_t
dir_adv_report
div_t
ethernet_hdr_t
event
event_callback_t
event_queue_t
event_timeout_t
evtimer_event
evtimer_mbox_event_t
evtimer_msg_event_t
evtimer_t
ext_adv_report
flock
gcoap_listener
gcoap_observe_memo_t
gcoap_request_memo
gcoap_resend_t
gcoap_socket_t
gnrc_ipv6_nib_abr_t
gnrc_ipv6_nib_ft_t
gnrc_ipv6_nib_nc_t
gnrc_ipv6_nib_pl_t
gnrc_netapi_opt_t
gnrc_netif_hdr_t
gnrc_netif_ipv6_t
gnrc_netif_ops
gnrc_netif_t
gnrc_netreg_entry
gnrc_netreg_entry_cbd_t
gnrc_pktsnip
gnrc_sock_reg
gpio_conf_nrf5x__bindgen_ty_1
gpio_isr_ctx_t
hci_conn_update
hci_data_hdr
hci_le_conn_complete
hmac_context_t
i2c_conf_t
icmpv6_echo_t
icmpv6_error_dst_unr_t
icmpv6_error_param_prob_t
icmpv6_error_pkt_too_big_t
icmpv6_error_time_exc_t
icmpv6_hdr_t
imaxdiv_t
iolist
iovec
ipv6_ext_frag_t
ipv6_ext_rh_t
ipv6_ext_t
ipv6_hdr_t
isrpipe_t
itimerspec
keccak_state_t
l2scan_list
ldiv_t
list_node
lldiv_t
log
log_info
max_align_t
mbox_t
md5_ctx_t
msg_t
mtd_desc
mtd_dev_t
mutex_cancel_t
mutex_t
nanocbor_encoder
nanocbor_value
nanocoap_cache_entry_t
nanocoap_server_response_ctx_t
nanocoap_sock_t
ndp_nbr_adv_t
ndp_nbr_sol_t
ndp_opt_mtu_t
ndp_opt_pi_t
ndp_opt_rdnss_impl_t
ndp_opt_rdnss_t
ndp_opt_rh_t
ndp_opt_ri_t
ndp_opt_t
ndp_redirect_t
ndp_rtr_adv_t
ndp_rtr_sol_t
netdev
netdev_driver
netdev_radio_rx_info
netif_t
netopt_connect_request
netopt_connect_result
netopt_disconnect_request
netopt_disconnect_result
netopt_scan_request
netopt_scan_result
os_mbuf
os_mbuf__bindgen_ty_1
os_mbuf_pkthdr
os_mbuf_pkthdr__bindgen_ty_1
os_mbuf_pool
os_mbuf_pool__bindgen_ty_1
os_memblock
os_memblock__bindgen_ty_1
os_mempool
os_mempool__bindgen_ty_1
os_mempool__bindgen_ty_2
os_mempool_ext
os_mempool_info
os_mqueue
os_mqueue__bindgen_ty_1
phydat_t
pwm_conf_t
qdec_conf_t
ringbuffer_t
rmutex_t
saul_driver_t
saul_reg
saul_reg_info_t
scan_params
sema_t
sha1_context
sha256_chain_idx_elm_t
sha2xx_context_t
sha512_common_context_t
shell_command_t
shell_command_xfa_t
sock_async_ctx_t
sock_event_t
sock_ip
sock_ip_aux_rx_t
sock_ip_aux_tx_t
sock_ip_ep_t
sock_tcp
sock_tcp_queue
sock_udp
sock_udp_aux_rx_t
sock_udp_aux_tx_t
spi_conf_t
spi_gpio_mode_t
stat
statvfs
stdio_provider_t
suit_component_t
suit_condition_params_t
suit_manifest_t
suit_param_ref_t
suit_storage
timer_conf_t
timer_isr_ctx_t
timespec
timex_t
tm
tsrb
uart_conf_t
uart_isr_ctx_t
udp_hdr_t
uint16_una_t
uint32_una_t
uint64_una_t
uuid_t
vfs_DIR
vfs_dir_ops
vfs_dirent_t
vfs_file_ops
vfs_file_system_ops
vfs_file_system_t
vfs_file_t
vfs_mount_struct
xPSR_Type__bindgen_ty_1
ztimer_base
ztimer_clock
ztimer_ops_t
ztimer_periodic_t
ztimer_t
Constants
AAR_ADDRPTR_ADDRPTR_Msk
AAR_ADDRPTR_ADDRPTR_Pos
AAR_COUNT
AAR_ENABLE_ENABLE_Disabled
AAR_ENABLE_ENABLE_Enabled
AAR_ENABLE_ENABLE_Msk
AAR_ENABLE_ENABLE_Pos
AAR_EVENTS_END_EVENTS_END_Generated
AAR_EVENTS_END_EVENTS_END_Msk
AAR_EVENTS_END_EVENTS_END_NotGenerated
AAR_EVENTS_END_EVENTS_END_Pos
AAR_EVENTS_NOTRESOLVED_EVENTS_NOTRESOLVED_Generated
AAR_EVENTS_NOTRESOLVED_EVENTS_NOTRESOLVED_Msk
AAR_EVENTS_NOTRESOLVED_EVENTS_NOTRESOLVED_NotGenerated
AAR_EVENTS_NOTRESOLVED_EVENTS_NOTRESOLVED_Pos
AAR_EVENTS_RESOLVED_EVENTS_RESOLVED_Generated
AAR_EVENTS_RESOLVED_EVENTS_RESOLVED_Msk
AAR_EVENTS_RESOLVED_EVENTS_RESOLVED_NotGenerated
AAR_EVENTS_RESOLVED_EVENTS_RESOLVED_Pos
AAR_INTENCLR_END_Clear
AAR_INTENCLR_END_Disabled
AAR_INTENCLR_END_Enabled
AAR_INTENCLR_END_Msk
AAR_INTENCLR_END_Pos
AAR_INTENCLR_NOTRESOLVED_Clear
AAR_INTENCLR_NOTRESOLVED_Disabled
AAR_INTENCLR_NOTRESOLVED_Enabled
AAR_INTENCLR_NOTRESOLVED_Msk
AAR_INTENCLR_NOTRESOLVED_Pos
AAR_INTENCLR_RESOLVED_Clear
AAR_INTENCLR_RESOLVED_Disabled
AAR_INTENCLR_RESOLVED_Enabled
AAR_INTENCLR_RESOLVED_Msk
AAR_INTENCLR_RESOLVED_Pos
AAR_INTENSET_END_Disabled
AAR_INTENSET_END_Enabled
AAR_INTENSET_END_Msk
AAR_INTENSET_END_Pos
AAR_INTENSET_END_Set
AAR_INTENSET_NOTRESOLVED_Disabled
AAR_INTENSET_NOTRESOLVED_Enabled
AAR_INTENSET_NOTRESOLVED_Msk
AAR_INTENSET_NOTRESOLVED_Pos
AAR_INTENSET_NOTRESOLVED_Set
AAR_INTENSET_RESOLVED_Disabled
AAR_INTENSET_RESOLVED_Enabled
AAR_INTENSET_RESOLVED_Msk
AAR_INTENSET_RESOLVED_Pos
AAR_INTENSET_RESOLVED_Set
AAR_IRKPTR_IRKPTR_Msk
AAR_IRKPTR_IRKPTR_Pos
AAR_MAX_IRK_NUM
AAR_NIRK_NIRK_Msk
AAR_NIRK_NIRK_Pos
AAR_SCRATCHPTR_SCRATCHPTR_Msk
AAR_SCRATCHPTR_SCRATCHPTR_Pos
AAR_STATUS_STATUS_Msk
AAR_STATUS_STATUS_Pos
AAR_TASKS_START_TASKS_START_Msk
AAR_TASKS_START_TASKS_START_Pos
AAR_TASKS_START_TASKS_START_Trigger
AAR_TASKS_STOP_TASKS_STOP_Msk
AAR_TASKS_STOP_TASKS_STOP_Pos
AAR_TASKS_STOP_TASKS_STOP_Trigger
ACL_ACL_ADDR_ADDR_Msk
ACL_ACL_ADDR_ADDR_Pos
ACL_ACL_PERM_READ_Disable
ACL_ACL_PERM_READ_Enable
ACL_ACL_PERM_READ_Msk
ACL_ACL_PERM_READ_Pos
ACL_ACL_PERM_WRITE_Disable
ACL_ACL_PERM_WRITE_Enable
ACL_ACL_PERM_WRITE_Msk
ACL_ACL_PERM_WRITE_Pos
ACL_ACL_SIZE_SIZE_Msk
ACL_ACL_SIZE_SIZE_Pos
ACL_REGIONS_COUNT
ADC_NUMOF
AES128_CMAC_BLOCK_SIZE
APSR_C_Msk
APSR_C_Pos
APSR_GE_Msk
APSR_GE_Pos
APSR_N_Msk
APSR_N_Pos
APSR_Q_Msk
APSR_Q_Pos
APSR_V_Msk
APSR_V_Pos
APSR_Z_Msk
APSR_Z_Pos
ARCHITECTURE_WORD_BITS
ARCHITECTURE_WORD_BYTES
ARG_MAX
ARM_MPU_AP_FULL
ARM_MPU_AP_NONE
ARM_MPU_AP_PRIV
ARM_MPU_AP_PRO
ARM_MPU_AP_RO
ARM_MPU_AP_URO
ARM_MPU_CACHEP_NOCACHE
ARM_MPU_CACHEP_WB_NWA
ARM_MPU_CACHEP_WB_WRA
ARM_MPU_CACHEP_WT_NWA
BC_BASE_MAX
BC_DIM_MAX
BC_SCALE_MAX
BC_STRING_MAX
BIG_ENDIAN
BIT0
BIT1
BIT10
BIT11
BIT12
BIT13
BIT14
BIT15
BIT16
BIT17
BIT18
BIT19
BIT2
BIT20
BIT21
BIT22
BIT23
BIT24
BIT25
BIT26
BIT27
BIT28
BIT29
BIT3
BIT30
BIT31
BIT4
BIT5
BIT6
BIT7
BIT8
BIT9
BLE_AA_LEN
BLE_ACL_MAX_PKT_SIZE
BLE_ADDR_LEN
BLE_ADDR_PUBLIC
BLE_ADDR_PUBLIC_ID
BLE_ADDR_RANDOM
BLE_ADDR_RANDOM_ID
BLE_ADV_EXT_IND
BLE_ADV_IND
BLE_ADV_NONCON_IND
BLE_ADV_PDU_LEN
BLE_ADV_PDU_LEN_EXT
BLE_ADV_SCAN_IND
BLE_ATT_ACCESS_OP_READ
BLE_ATT_ACCESS_OP_WRITE
BLE_ATT_ATTRIBUTE_NOT_FOUND
BLE_ATT_ATTRIBUTE_NOT_LONG
BLE_ATT_ATTR_MAX_LEN
BLE_ATT_AUTH_SIGNED_WRITES
BLE_ATT_BROADCAST
BLE_ATT_ERROR_RESP
BLE_ATT_ERR_ATTR_NOT_FOUND
BLE_ATT_ERR_ATTR_NOT_LONG
BLE_ATT_ERR_INSUFFICIENT_AUTHEN
BLE_ATT_ERR_INSUFFICIENT_AUTHOR
BLE_ATT_ERR_INSUFFICIENT_ENC
BLE_ATT_ERR_INSUFFICIENT_KEY_SZ
BLE_ATT_ERR_INSUFFICIENT_RES
BLE_ATT_ERR_INVALID_ATTR_VALUE_LEN
BLE_ATT_ERR_INVALID_HANDLE
BLE_ATT_ERR_INVALID_OFFSET
BLE_ATT_ERR_INVALID_PDU
BLE_ATT_ERR_PREPARE_QUEUE_FULL
BLE_ATT_ERR_READ_NOT_PERMITTED
BLE_ATT_ERR_REQ_NOT_SUPPORTED
BLE_ATT_ERR_UNLIKELY
BLE_ATT_ERR_UNSUPPORTED_GROUP
BLE_ATT_ERR_WRITE_NOT_PERMITTED
BLE_ATT_EXEC_WRITE_REQ
BLE_ATT_EXEC_WRITE_RESP
BLE_ATT_EXT_PROPERTIES
BLE_ATT_FIND_BY_VAL_REQ
BLE_ATT_FIND_BY_VAL_RESP
BLE_ATT_FIND_INFO_REQ
BLE_ATT_FIND_INFO_RESP
BLE_ATT_FORMAT_U128
BLE_ATT_FORMAT_U16
BLE_ATT_F_READ
BLE_ATT_F_READ_AUTHEN
BLE_ATT_F_READ_AUTHOR
BLE_ATT_F_READ_ENC
BLE_ATT_F_WRITE
BLE_ATT_F_WRITE_AUTHEN
BLE_ATT_F_WRITE_AUTHOR
BLE_ATT_F_WRITE_ENC
BLE_ATT_INDICATE
BLE_ATT_INSUFFICENT_KEY_SIZE
BLE_ATT_INSUFFICIENT_AUTHEN
BLE_ATT_INSUFFICIENT_AUTHOR
BLE_ATT_INSUFFICIENT_ENCRYPTION
BLE_ATT_INSUFFICIENT_RESSOURCES
BLE_ATT_INVALID_ATTR_VAL_LEN
BLE_ATT_INVALID_HANDLE
BLE_ATT_INVALID_OFFSET
BLE_ATT_INVALID_PDU
BLE_ATT_MTU_DFLT
BLE_ATT_MTU_MAX
BLE_ATT_MTU_REQ
BLE_ATT_MTU_RESP
BLE_ATT_NOTIFY
BLE_ATT_OP_ERROR_RSP
BLE_ATT_OP_EXEC_WRITE_REQ
BLE_ATT_OP_EXEC_WRITE_RSP
BLE_ATT_OP_FIND_INFO_REQ
BLE_ATT_OP_FIND_INFO_RSP
BLE_ATT_OP_FIND_TYPE_VALUE_REQ
BLE_ATT_OP_FIND_TYPE_VALUE_RSP
BLE_ATT_OP_INDICATE_REQ
BLE_ATT_OP_INDICATE_RSP
BLE_ATT_OP_MTU_REQ
BLE_ATT_OP_MTU_RSP
BLE_ATT_OP_NOTIFY_REQ
BLE_ATT_OP_PREP_WRITE_REQ
BLE_ATT_OP_PREP_WRITE_RSP
BLE_ATT_OP_READ_BLOB_REQ
BLE_ATT_OP_READ_BLOB_RSP
BLE_ATT_OP_READ_GROUP_TYPE_REQ
BLE_ATT_OP_READ_GROUP_TYPE_RSP
BLE_ATT_OP_READ_MULT_REQ
BLE_ATT_OP_READ_MULT_RSP
BLE_ATT_OP_READ_REQ
BLE_ATT_OP_READ_RSP
BLE_ATT_OP_READ_TYPE_REQ
BLE_ATT_OP_READ_TYPE_RSP
BLE_ATT_OP_WRITE_CMD
BLE_ATT_OP_WRITE_REQ
BLE_ATT_OP_WRITE_RSP
BLE_ATT_PREPARE_QUEUE_FULL
BLE_ATT_PREP_WRITE_REQ
BLE_ATT_PREP_WRITE_RESP
BLE_ATT_READ
BLE_ATT_READ_BLOB_REQ
BLE_ATT_READ_BLOB_RESP
BLE_ATT_READ_BY_GROUP_TYPE_REQ
BLE_ATT_READ_BY_GROUP_TYPE_RESP
BLE_ATT_READ_BY_TYPE_REQ
BLE_ATT_READ_BY_TYPE_RESP
BLE_ATT_READ_MUL_REQ
BLE_ATT_READ_MUL_RESP
BLE_ATT_READ_NOT_PERMITTED
BLE_ATT_READ_REQ
BLE_ATT_READ_RESP
BLE_ATT_REQUEST_NOT_SUP
BLE_ATT_SIGNED_WRITE_CMD
BLE_ATT_ULIKELY_ERROR
BLE_ATT_UNSUPPORTED_GROUP_TYPE
BLE_ATT_UUID_CHARACTERISTIC
BLE_ATT_UUID_INCLUDE
BLE_ATT_UUID_PRIMARY_SERVICE
BLE_ATT_UUID_SECONDARY_SERVICE
BLE_ATT_VAL_CONFIRMATION
BLE_ATT_VAL_INDICATION
BLE_ATT_VAL_NOTIFICATION
BLE_ATT_WRITE
BLE_ATT_WRITE_COMMAND
BLE_ATT_WRITE_NOT_PERMITTED
BLE_ATT_WRITE_REQ
BLE_ATT_WRITE_RESP
BLE_ATT_WRITE_WO_RESP
BLE_AUX_ADV_IND
BLE_AUX_CHAIN_IND
BLE_AUX_CONNECT_REQ
BLE_AUX_SCAN_REQ
BLE_AUX_SCAN_RSP
BLE_AUX_SYNC_IND
BLE_CHANMAP_LEN
BLE_CHAN_ADV_NUMOF
BLE_CHAN_DAT_NUMOF
BLE_CHAN_NUMOF
BLE_CONNECT_IND
BLE_CONNECT_RESP
BLE_CRC_LEN
BLE_DECL_CHAR
BLE_DECL_INCLUDE
BLE_DECL_PRI_SERVICE
BLE_DECL_SEC_SERVICE
BLE_DESC_AGGR_FMT
BLE_DESC_CLIENT_CONFIG
BLE_DESC_ENV_CONFIG
BLE_DESC_ENV_MEASUREMENT
BLE_DESC_ENV_TRIGGER_SETTING
BLE_DESC_EXT_PROP
BLE_DESC_EXT_REPORT_REF
BLE_DESC_NUMOF_DIGITS
BLE_DESC_PRES_FMT
BLE_DESC_REPORT_REF
BLE_DESC_SERVER_CONFIG
BLE_DESC_TIME_TRIGGER_SETTING
BLE_DESC_USER_DESC
BLE_DESC_VALID_RANGE
BLE_DESC_VALUE_TRIGGER_SETTING
BLE_DEV_ADDR_LEN
BLE_DIRECT_IND
BLE_EDDYSTONE_MAX_UUIDS16
BLE_EDDYSTONE_URL_MAX_LEN
BLE_EDDYSTONE_URL_SCHEME_HTTP
BLE_EDDYSTONE_URL_SCHEME_HTTPS
BLE_EDDYSTONE_URL_SCHEME_HTTPS_WWW
BLE_EDDYSTONE_URL_SCHEME_HTTP_WWW
BLE_EDDYSTONE_URL_SUFFIX_BIZ
BLE_EDDYSTONE_URL_SUFFIX_BIZ_SLASH
BLE_EDDYSTONE_URL_SUFFIX_COM
BLE_EDDYSTONE_URL_SUFFIX_COM_SLASH
BLE_EDDYSTONE_URL_SUFFIX_EDU
BLE_EDDYSTONE_URL_SUFFIX_EDU_SLASH
BLE_EDDYSTONE_URL_SUFFIX_GOV
BLE_EDDYSTONE_URL_SUFFIX_GOV_SLASH
BLE_EDDYSTONE_URL_SUFFIX_INFO
BLE_EDDYSTONE_URL_SUFFIX_INFO_SLASH
BLE_EDDYSTONE_URL_SUFFIX_NET
BLE_EDDYSTONE_URL_SUFFIX_NET_SLASH
BLE_EDDYSTONE_URL_SUFFIX_NONE
BLE_EDDYSTONE_URL_SUFFIX_ORG
BLE_EDDYSTONE_URL_SUFFIX_ORG_SLASH
BLE_ENC_BLOCK_SIZE
BLE_GAP_ADV_DFLT_CHANNEL_MAP
BLE_GAP_AD_3D_INFO_DATA
BLE_GAP_AD_ADDR_PUBLIC
BLE_GAP_AD_ADDR_RANDOM
BLE_GAP_AD_ADV_INTERVAL
BLE_GAP_AD_APPEARANCE
BLE_GAP_AD_CHAN_MAP_UPDATE_IND
BLE_GAP_AD_CLASS_OF_DEVICE
BLE_GAP_AD_DEVICE_ID
BLE_GAP_AD_FLAGS
BLE_GAP_AD_INDOOR_POSITIONING
BLE_GAP_AD_LE_DEVICE_ADDR
BLE_GAP_AD_LE_ROLE
BLE_GAP_AD_LE_SEC_CON_CONF_VAL
BLE_GAP_AD_LE_SEC_CON_RAND_VAL
BLE_GAP_AD_LE_SUP_FEATURES
BLE_GAP_AD_LIST_SOL_UUID_128
BLE_GAP_AD_LIST_SOL_UUID_16
BLE_GAP_AD_LIST_SOL_UUID_32
BLE_GAP_AD_NAME
BLE_GAP_AD_NAME_SHORT
BLE_GAP_AD_PAIRING_HASH_192
BLE_GAP_AD_PAIRING_HASH_256
BLE_GAP_AD_PAIRING_RAND_192
BLE_GAP_AD_PAIRING_RAND_256
BLE_GAP_AD_SEC_MANAGER_OOB_FLAGS
BLE_GAP_AD_SEC_MANAGER_TK_VAL
BLE_GAP_AD_SERVICE_DATA
BLE_GAP_AD_SERVICE_DATA_128
BLE_GAP_AD_SERVICE_DATA_32
BLE_GAP_AD_SERVICE_DATA_UUID16
BLE_GAP_AD_SLAVE_CON_INTERVAL
BLE_GAP_AD_TRANSPORT_DISC_DATA
BLE_GAP_AD_TX_POWER_LEVEL
BLE_GAP_AD_URI
BLE_GAP_AD_UUID128_COMP
BLE_GAP_AD_UUID128_INCOMP
BLE_GAP_AD_UUID16_COMP
BLE_GAP_AD_UUID16_INCOMP
BLE_GAP_AD_UUID32_COMP
BLE_GAP_AD_UUID32_INCOMP
BLE_GAP_AD_VENDOR
BLE_GAP_CONN_DUR_DFLT
BLE_GAP_CONN_MODE_DIR
BLE_GAP_CONN_MODE_NON
BLE_GAP_CONN_MODE_UND
BLE_GAP_CONN_PAUSE_CENTRAL
BLE_GAP_CONN_PAUSE_PERIPHERAL
BLE_GAP_DISCOVERABLE
BLE_GAP_DISCOVER_LIM
BLE_GAP_DISC_DUR_DFLT
BLE_GAP_DISC_MODE_GEN
BLE_GAP_DISC_MODE_LTD
BLE_GAP_DISC_MODE_NON
BLE_GAP_EVENT_ADV_COMPLETE
BLE_GAP_EVENT_CONNECT
BLE_GAP_EVENT_CONN_UPDATE
BLE_GAP_EVENT_CONN_UPDATE_REQ
BLE_GAP_EVENT_DISC
BLE_GAP_EVENT_DISCONNECT
BLE_GAP_EVENT_DISC_COMPLETE
BLE_GAP_EVENT_ENC_CHANGE
BLE_GAP_EVENT_EXT_DISC
BLE_GAP_EVENT_IDENTITY_RESOLVED
BLE_GAP_EVENT_L2CAP_UPDATE_REQ
BLE_GAP_EVENT_MTU
BLE_GAP_EVENT_NOTIFY_RX
BLE_GAP_EVENT_NOTIFY_TX
BLE_GAP_EVENT_PASSKEY_ACTION
BLE_GAP_EVENT_PATHLOSS_THRESHOLD
BLE_GAP_EVENT_PERIODIC_REPORT
BLE_GAP_EVENT_PERIODIC_SYNC
BLE_GAP_EVENT_PERIODIC_SYNC_LOST
BLE_GAP_EVENT_PERIODIC_TRANSFER
BLE_GAP_EVENT_PHY_UPDATE_COMPLETE
BLE_GAP_EVENT_REPEAT_PAIRING
BLE_GAP_EVENT_SCAN_REQ_RCVD
BLE_GAP_EVENT_SUBSCRIBE
BLE_GAP_EVENT_TERM_FAILURE
BLE_GAP_EVENT_TRANSMIT_POWER
BLE_GAP_FLAG_BREDR_NOTSUP
BLE_GAP_INITIAL_CONN_LATENCY
BLE_GAP_INITIAL_CONN_MAX_CE_LEN
BLE_GAP_INITIAL_CONN_MIN_CE_LEN
BLE_GAP_INITIAL_SUPERVISION_TIMEOUT
BLE_GAP_LE_PHY_1M
BLE_GAP_LE_PHY_1M_MASK
BLE_GAP_LE_PHY_2M
BLE_GAP_LE_PHY_2M_MASK
BLE_GAP_LE_PHY_ANY_MASK
BLE_GAP_LE_PHY_CODED
BLE_GAP_LE_PHY_CODED_ANY
BLE_GAP_LE_PHY_CODED_MASK
BLE_GAP_LE_PHY_CODED_S2
BLE_GAP_LE_PHY_CODED_S8
BLE_GAP_PRIVATE_MODE_DEVICE
BLE_GAP_PRIVATE_MODE_NETWORK
BLE_GAP_REPEAT_PAIRING_IGNORE
BLE_GAP_REPEAT_PAIRING_RETRY
BLE_GAP_ROLE_MASTER
BLE_GAP_ROLE_SLAVE
BLE_GAP_SUBSCRIBE_REASON_RESTORE
BLE_GAP_SUBSCRIBE_REASON_TERM
BLE_GAP_SUBSCRIBE_REASON_WRITE
BLE_GATT_ACCESS_OP_READ_CHR
BLE_GATT_ACCESS_OP_READ_DSC
BLE_GATT_ACCESS_OP_WRITE_CHR
BLE_GATT_ACCESS_OP_WRITE_DSC
BLE_GATT_CHAR_BATTERY_LEVEL
BLE_GATT_CHAR_BODY_SENSE_LOC
BLE_GATT_CHAR_FW_REV_STR
BLE_GATT_CHAR_HEART_RATE_MEASURE
BLE_GATT_CHAR_HW_REV_STR
BLE_GATT_CHAR_MANUFACTURER_NAME
BLE_GATT_CHAR_MODEL_NUMBER_STR
BLE_GATT_CHAR_SERIAL_NUMBER_STR
BLE_GATT_CHAR_SW_REV_STR
BLE_GATT_CHAR_SYSTEM_ID
BLE_GATT_CHR_F_AUTH_SIGN_WRITE
BLE_GATT_CHR_F_AUX_WRITE
BLE_GATT_CHR_F_BROADCAST
BLE_GATT_CHR_F_INDICATE
BLE_GATT_CHR_F_NOTIFY
BLE_GATT_CHR_F_READ
BLE_GATT_CHR_F_READ_AUTHEN
BLE_GATT_CHR_F_READ_AUTHOR
BLE_GATT_CHR_F_READ_ENC
BLE_GATT_CHR_F_RELIABLE_WRITE
BLE_GATT_CHR_F_WRITE
BLE_GATT_CHR_F_WRITE_AUTHEN
BLE_GATT_CHR_F_WRITE_AUTHOR
BLE_GATT_CHR_F_WRITE_ENC
BLE_GATT_CHR_F_WRITE_NO_RSP
BLE_GATT_CHR_PROP_AUTH_SIGN_WRITE
BLE_GATT_CHR_PROP_BROADCAST
BLE_GATT_CHR_PROP_EXTENDED
BLE_GATT_CHR_PROP_INDICATE
BLE_GATT_CHR_PROP_NOTIFY
BLE_GATT_CHR_PROP_READ
BLE_GATT_CHR_PROP_WRITE
BLE_GATT_CHR_PROP_WRITE_NO_RSP
BLE_GATT_DSC_CLT_CFG_UUID16
BLE_GATT_REGISTER_OP_CHR
BLE_GATT_REGISTER_OP_DSC
BLE_GATT_REGISTER_OP_SVC
BLE_GATT_SVC_BAS
BLE_GATT_SVC_DEVINFO
BLE_GATT_SVC_GAP
BLE_GATT_SVC_GATT
BLE_GATT_SVC_HRS
BLE_GATT_SVC_IPSS
BLE_GATT_SVC_NDNSS
BLE_GATT_SVC_TYPE_END
BLE_GATT_SVC_TYPE_PRIMARY
BLE_GATT_SVC_TYPE_SECONDARY
BLE_GATT_SVC_UUID16
BLE_HCI_ADD_WHITE_LIST_LEN
BLE_HCI_ADV_CHANMASK_DEF
BLE_HCI_ADV_CHAN_TXPWR_MAX
BLE_HCI_ADV_CHAN_TXPWR_MIN
BLE_HCI_ADV_CONN_MASK
BLE_HCI_ADV_DATA_STATUS_COMPLETE
BLE_HCI_ADV_DATA_STATUS_INCOMPLETE
BLE_HCI_ADV_DATA_STATUS_MASK
BLE_HCI_ADV_DATA_STATUS_TRUNCATED
BLE_HCI_ADV_DIRECT_MASK
BLE_HCI_ADV_FILT_BOTH
BLE_HCI_ADV_FILT_CONN
BLE_HCI_ADV_FILT_DEF
BLE_HCI_ADV_FILT_MAX
BLE_HCI_ADV_FILT_NONE
BLE_HCI_ADV_FILT_SCAN
BLE_HCI_ADV_ITVL
BLE_HCI_ADV_ITVL_DEF
BLE_HCI_ADV_ITVL_MAX
BLE_HCI_ADV_ITVL_MIN
BLE_HCI_ADV_ITVL_NONCONN_MIN
BLE_HCI_ADV_LEGACY_MASK
BLE_HCI_ADV_OWN_ADDR_MAX
BLE_HCI_ADV_OWN_ADDR_PRIV_PUB
BLE_HCI_ADV_OWN_ADDR_PRIV_RAND
BLE_HCI_ADV_OWN_ADDR_PUBLIC
BLE_HCI_ADV_OWN_ADDR_RANDOM
BLE_HCI_ADV_PEER_ADDR_MAX
BLE_HCI_ADV_PEER_ADDR_PUBLIC
BLE_HCI_ADV_PEER_ADDR_RANDOM
BLE_HCI_ADV_RPT_EVTYPE_ADV_IND
BLE_HCI_ADV_RPT_EVTYPE_DIR_IND
BLE_HCI_ADV_RPT_EVTYPE_NONCONN_IND
BLE_HCI_ADV_RPT_EVTYPE_SCAN_IND
BLE_HCI_ADV_RPT_EVTYPE_SCAN_RSP
BLE_HCI_ADV_SCAN_MASK
BLE_HCI_ADV_SCAN_RSP_MASK
BLE_HCI_ADV_TYPE_ADV_DIRECT_IND_HD
BLE_HCI_ADV_TYPE_ADV_DIRECT_IND_LD
BLE_HCI_ADV_TYPE_ADV_IND
BLE_HCI_ADV_TYPE_ADV_NONCONN_IND
BLE_HCI_ADV_TYPE_ADV_SCAN_IND
BLE_HCI_ADV_TYPE_MAX
BLE_HCI_CONN_FILT_MAX
BLE_HCI_CONN_FILT_NO_WL
BLE_HCI_CONN_FILT_USE_WL
BLE_HCI_CONN_ITVL
BLE_HCI_CONN_ITVL_MAX
BLE_HCI_CONN_ITVL_MIN
BLE_HCI_CONN_LATENCY_MAX
BLE_HCI_CONN_LATENCY_MIN
BLE_HCI_CONN_PEER_ADDR_MAX
BLE_HCI_CONN_PEER_ADDR_PUBLIC
BLE_HCI_CONN_PEER_ADDR_PUBLIC_IDENT
BLE_HCI_CONN_PEER_ADDR_PUB_ID
BLE_HCI_CONN_PEER_ADDR_RANDOM
BLE_HCI_CONN_PEER_ADDR_RANDOM_IDENT
BLE_HCI_CONN_PEER_ADDR_RAND_ID
BLE_HCI_CONN_SPVN_TIMEOUT_MAX
BLE_HCI_CONN_SPVN_TIMEOUT_MIN
BLE_HCI_CONN_SPVN_TMO_UNITS
BLE_HCI_CREATE_CONN_LEN
BLE_HCI_CTLR_TO_HOST_FC_ACL
BLE_HCI_CTLR_TO_HOST_FC_BOTH
BLE_HCI_CTLR_TO_HOST_FC_OFF
BLE_HCI_CTLR_TO_HOST_FC_SYNC
BLE_HCI_DATA_HDR_SZ
BLE_HCI_EVCODE_AMP_START_TEST
BLE_HCI_EVCODE_AMP_STATUS_CHG
BLE_HCI_EVCODE_AUTH_CMP
BLE_HCI_EVCODE_AUTH_PYLD_TMO
BLE_HCI_EVCODE_CHAN_SELECTED
BLE_HCI_EVCODE_CHG_LINK_KEY_CMP
BLE_HCI_EVCODE_COMMAND_COMPLETE
BLE_HCI_EVCODE_COMMAND_STATUS
BLE_HCI_EVCODE_CONN_DONE
BLE_HCI_EVCODE_CONN_PKT_TYPE_CHG
BLE_HCI_EVCODE_CONN_REQUEST
BLE_HCI_EVCODE_DATA_BUF_OVERFLOW
BLE_HCI_EVCODE_DISCONN_CMP
BLE_HCI_EVCODE_DISCONN_LOGICAL_LINK
BLE_HCI_EVCODE_DISCONN_PHYS_LINK
BLE_HCI_EVCODE_ENCRYPT_CHG
BLE_HCI_EVCODE_ENC_KEY_REFRESH
BLE_HCI_EVCODE_ENH_FLUSH_COMP
BLE_HCI_EVCODE_EXT_INQ_RESULT
BLE_HCI_EVCODE_FLOW_SPEC_COMP
BLE_HCI_EVCODE_FLOW_SPEC_MODE_COMP
BLE_HCI_EVCODE_HW_ERROR
BLE_HCI_EVCODE_INQUIRY_CMP
BLE_HCI_EVCODE_INQUIRY_RESULT
BLE_HCI_EVCODE_INQ_RESULT_RSSI
BLE_HCI_EVCODE_INQ_RSP_NOTIFY
BLE_HCI_EVCODE_IO_CAP_RSP
BLE_HCI_EVCODE_KEYPRESS_NOTIFY
BLE_HCI_EVCODE_LE_META
BLE_HCI_EVCODE_LINK_KEY_NOTIFY
BLE_HCI_EVCODE_LINK_KEY_REQ
BLE_HCI_EVCODE_LNK_SPVN_TMO_CHG
BLE_HCI_EVCODE_LOGICAL_LINK_COMP
BLE_HCI_EVCODE_LOOPBACK_CMD
BLE_HCI_EVCODE_MASTER_LINK_KEY_CMP
BLE_HCI_EVCODE_MAX_SLOTS_CHG
BLE_HCI_EVCODE_MODE_CHANGE
BLE_HCI_EVCODE_NUM_COMP_DATA_BLKS
BLE_HCI_EVCODE_NUM_COMP_PKTS
BLE_HCI_EVCODE_PASSKEY_REQ
BLE_HCI_EVCODE_PHYS_LINK_COMP
BLE_HCI_EVCODE_PHYS_LINK_LOSS_EARLY
BLE_HCI_EVCODE_PHYS_LINK_RECOVERY
BLE_HCI_EVCODE_PIN_CODE_REQ
BLE_HCI_EVCODE_PSR_MODE_CHG
BLE_HCI_EVCODE_QOS_SETUP_CMP
BLE_HCI_EVCODE_QOS_VIOLATION
BLE_HCI_EVCODE_RD_REM_SUPP_FEAT_CMP
BLE_HCI_EVCODE_RD_REM_VER_INFO_CMP
BLE_HCI_EVCODE_READ_CLK_OFF_COMP
BLE_HCI_EVCODE_READ_REM_EXT_FEAT
BLE_HCI_EVCODE_REM_HOST_SUPP_FEAT
BLE_HCI_EVCODE_REM_NAME_REQ_CMP
BLE_HCI_EVCODE_REM_OOB_DATA_REQ
BLE_HCI_EVCODE_RETURN_LINK_KEYS
BLE_HCI_EVCODE_SAM_STATUS_CHG
BLE_HCI_EVCODE_SHORT_RANGE_MODE_CHG
BLE_HCI_EVCODE_SIMPLE_PAIR_COMP
BLE_HCI_EVCODE_SLAVE_BCAST_CHAN_MAP
BLE_HCI_EVCODE_SLAVE_BCAST_RX
BLE_HCI_EVCODE_SLAVE_BCAST_TMO
BLE_HCI_EVCODE_SLAVE_PAGE_RSP_TMO
BLE_HCI_EVCODE_SNIFF_SUBRATING
BLE_HCI_EVCODE_SYNCH_CONN_CHG
BLE_HCI_EVCODE_SYNCH_CONN_COMP
BLE_HCI_EVCODE_SYNCH_TRAIN_COMP
BLE_HCI_EVCODE_SYNCH_TRAIN_RCVD
BLE_HCI_EVCODE_TRIG_CLK_CAPTURE
BLE_HCI_EVCODE_TRUNC_PAGE_COMP
BLE_HCI_EVCODE_USER_CONFIRM_REQ
BLE_HCI_EVCODE_USER_PASSKEY_NOTIFY
BLE_HCI_EVCODE_VS_DEBUG
BLE_HCI_EVENT_ACL_BUF_OVERFLOW
BLE_HCI_EVOCDE_AMP_RCVR_REPORT
BLE_HCI_EVOCDE_AMP_TEST_END
BLE_HCI_EVOCDE_IO_CAP_REQ
BLE_HCI_INITIATOR_FILT_POLICY_MAX
BLE_HCI_LEGACY_ADV_EVTYPE_ADV_DIRECT_IND
BLE_HCI_LEGACY_ADV_EVTYPE_ADV_IND
BLE_HCI_LEGACY_ADV_EVTYPE_ADV_NONCON_IND
BLE_HCI_LEGACY_ADV_EVTYPE_ADV_SCAN_IND
BLE_HCI_LEGACY_ADV_EVTYPE_SCAN_RSP_ADV_IND
BLE_HCI_LEGACY_ADV_EVTYPE_SCAN_RSP_ADV_SCAN_IND
BLE_HCI_LE_ADV_RPT_NUM_RPTS_MAX
BLE_HCI_LE_ADV_RPT_NUM_RPTS_MIN
BLE_HCI_LE_CONN_COMPLETE_ROLE_MASTER
BLE_HCI_LE_CONN_COMPLETE_ROLE_SLAVE
BLE_HCI_LE_CONN_HANDLE_MAX
BLE_HCI_LE_PERIODIC_ADV_CREATE_SYNC_OPT_DISABLED
BLE_HCI_LE_PERIODIC_ADV_CREATE_SYNC_OPT_DUPLICATES
BLE_HCI_LE_PERIODIC_ADV_CREATE_SYNC_OPT_FILTER
BLE_HCI_LE_PHY_1M
BLE_HCI_LE_PHY_1M_PREF_MASK
BLE_HCI_LE_PHY_2M
BLE_HCI_LE_PHY_2M_PREF_MASK
BLE_HCI_LE_PHY_CODED
BLE_HCI_LE_PHY_CODED_ANY
BLE_HCI_LE_PHY_CODED_PREF_MASK
BLE_HCI_LE_PHY_CODED_S2
BLE_HCI_LE_PHY_CODED_S2_PREF
BLE_HCI_LE_PHY_CODED_S8
BLE_HCI_LE_PHY_CODED_S8_PREF
BLE_HCI_LE_PHY_NO_RX_PREF_MASK
BLE_HCI_LE_PHY_NO_TX_PREF_MASK
BLE_HCI_LE_PHY_PREF_MASK_ALL
BLE_HCI_LE_SET_DATA_OPER_COMPLETE
BLE_HCI_LE_SET_DATA_OPER_FIRST
BLE_HCI_LE_SET_DATA_OPER_INT
BLE_HCI_LE_SET_DATA_OPER_LAST
BLE_HCI_LE_SET_DATA_OPER_UNCHANGED
BLE_HCI_LE_SET_EXT_ADV_PROP_ANON_ADV
BLE_HCI_LE_SET_EXT_ADV_PROP_CONNECTABLE
BLE_HCI_LE_SET_EXT_ADV_PROP_DIRECTED
BLE_HCI_LE_SET_EXT_ADV_PROP_HD_DIRECTED
BLE_HCI_LE_SET_EXT_ADV_PROP_INC_TX_PWR
BLE_HCI_LE_SET_EXT_ADV_PROP_LEGACY
BLE_HCI_LE_SET_EXT_ADV_PROP_LEGACY_HD_DIR
BLE_HCI_LE_SET_EXT_ADV_PROP_LEGACY_IND
BLE_HCI_LE_SET_EXT_ADV_PROP_LEGACY_LD_DIR
BLE_HCI_LE_SET_EXT_ADV_PROP_LEGACY_NONCONN
BLE_HCI_LE_SET_EXT_ADV_PROP_LEGACY_SCAN
BLE_HCI_LE_SET_EXT_ADV_PROP_MASK
BLE_HCI_LE_SET_EXT_ADV_PROP_SCANNABLE
BLE_HCI_LE_SET_PERIODIC_ADV_PROP_INC_TX_PWR
BLE_HCI_LE_SET_PERIODIC_ADV_PROP_MASK
BLE_HCI_LE_SUBEV_ADV_RPT
BLE_HCI_LE_SUBEV_ADV_SET_TERMINATED
BLE_HCI_LE_SUBEV_BIGINFO_ADV_REPORT
BLE_HCI_LE_SUBEV_BIG_COMP
BLE_HCI_LE_SUBEV_BIG_SYNC_ESTAB
BLE_HCI_LE_SUBEV_BIG_SYNC_LOST
BLE_HCI_LE_SUBEV_BIG_TERMINATE_COMP
BLE_HCI_LE_SUBEV_CHAN_SEL_ALG
BLE_HCI_LE_SUBEV_CIS_ESTAB
BLE_HCI_LE_SUBEV_CIS_REQUEST
BLE_HCI_LE_SUBEV_CONNLESS_IQ_RPT
BLE_HCI_LE_SUBEV_CONN_COMPLETE
BLE_HCI_LE_SUBEV_CONN_IQ_RPT
BLE_HCI_LE_SUBEV_CONN_UPD_COMPLETE
BLE_HCI_LE_SUBEV_CTE_REQ_FAILED
BLE_HCI_LE_SUBEV_DATA_LEN_CHG
BLE_HCI_LE_SUBEV_DIRECT_ADV_RPT
BLE_HCI_LE_SUBEV_ENH_CONN_COMPLETE
BLE_HCI_LE_SUBEV_EXT_ADV_RPT
BLE_HCI_LE_SUBEV_GEN_DHKEY_COMPLETE
BLE_HCI_LE_SUBEV_LT_KEY_REQ
BLE_HCI_LE_SUBEV_PATH_LOSS_THRESHOLD
BLE_HCI_LE_SUBEV_PERIODIC_ADV_RPT
BLE_HCI_LE_SUBEV_PERIODIC_ADV_SYNC_ESTAB
BLE_HCI_LE_SUBEV_PERIODIC_ADV_SYNC_LOST
BLE_HCI_LE_SUBEV_PERIODIC_ADV_SYNC_TRANSFER
BLE_HCI_LE_SUBEV_PHY_UPDATE_COMPLETE
BLE_HCI_LE_SUBEV_RD_LOC_P256_PUBKEY
BLE_HCI_LE_SUBEV_RD_REM_USED_FEAT
BLE_HCI_LE_SUBEV_REM_CONN_PARM_REQ
BLE_HCI_LE_SUBEV_REQ_PEER_SCA_COMP
BLE_HCI_LE_SUBEV_SCAN_REQ_RCVD
BLE_HCI_LE_SUBEV_SCAN_TIMEOUT
BLE_HCI_LE_SUBEV_SUBRATE_CHANGE
BLE_HCI_LE_SUBEV_TRANSMIT_POWER_REPORT
BLE_HCI_MAX_ADV_DATA_LEN
BLE_HCI_MAX_EXT_ADV_DATA_LEN
BLE_HCI_MAX_EXT_SCAN_RSP_DATA_LEN
BLE_HCI_MAX_PERIODIC_ADV_DATA_LEN
BLE_HCI_MAX_SCAN_RSP_DATA_LEN
BLE_HCI_NUM_LE_CMDS
BLE_HCI_OCF_CB_HOST_BUF_SIZE
BLE_HCI_OCF_CB_HOST_NUM_COMP_PKTS
BLE_HCI_OCF_CB_RD_AUTH_PYLD_TMO
BLE_HCI_OCF_CB_READ_TX_PWR
BLE_HCI_OCF_CB_RESET
BLE_HCI_OCF_CB_SET_CTLR_TO_HOST_FC
BLE_HCI_OCF_CB_SET_EVENT_MASK
BLE_HCI_OCF_CB_SET_EVENT_MASK2
BLE_HCI_OCF_CB_WR_AUTH_PYLD_TMO
BLE_HCI_OCF_DISCONNECT_CMD
BLE_HCI_OCF_IP_RD_BD_ADDR
BLE_HCI_OCF_IP_RD_BUF_SIZE
BLE_HCI_OCF_IP_RD_LOCAL_VER
BLE_HCI_OCF_IP_RD_LOC_SUPP_CMD
BLE_HCI_OCF_IP_RD_LOC_SUPP_FEAT
BLE_HCI_OCF_LE_ADD_DEV_TO_PERIODIC_ADV_LIST
BLE_HCI_OCF_LE_ADD_RESOLV_LIST
BLE_HCI_OCF_LE_ADD_WHITE_LIST
BLE_HCI_OCF_LE_CLEAR_ADV_SETS
BLE_HCI_OCF_LE_CLEAR_PERIODIC_ADV_LIST
BLE_HCI_OCF_LE_CLEAR_WHITE_LIST
BLE_HCI_OCF_LE_CLR_RESOLV_LIST
BLE_HCI_OCF_LE_CONN_UPDATE
BLE_HCI_OCF_LE_CREATE_CONN
BLE_HCI_OCF_LE_CREATE_CONN_CANCEL
BLE_HCI_OCF_LE_ENCRYPT
BLE_HCI_OCF_LE_ENH_READ_TRANSMIT_POWER_LEVEL
BLE_HCI_OCF_LE_EXT_CREATE_CONN
BLE_HCI_OCF_LE_GENERATE_DHKEY_V2
BLE_HCI_OCF_LE_GEN_DHKEY
BLE_HCI_OCF_LE_LT_KEY_REQ_NEG_REPLY
BLE_HCI_OCF_LE_LT_KEY_REQ_REPLY
BLE_HCI_OCF_LE_MODIFY_SCA
BLE_HCI_OCF_LE_PERIODIC_ADV_CREATE_SYNC
BLE_HCI_OCF_LE_PERIODIC_ADV_CREATE_SYNC_CANCEL
BLE_HCI_OCF_LE_PERIODIC_ADV_RECEIVE_ENABLE
BLE_HCI_OCF_LE_PERIODIC_ADV_SET_INFO_TRANSFER
BLE_HCI_OCF_LE_PERIODIC_ADV_SYNC_TRANSFER
BLE_HCI_OCF_LE_PERIODIC_ADV_SYNC_TRANSFER_PARAMS
BLE_HCI_OCF_LE_PERIODIC_ADV_TERM_SYNC
BLE_HCI_OCF_LE_RAND
BLE_HCI_OCF_LE_RD_ADV_CHAN_TXPWR
BLE_HCI_OCF_LE_RD_ANTENNA_INFO
BLE_HCI_OCF_LE_RD_BUF_SIZE
BLE_HCI_OCF_LE_RD_BUF_SIZE_V2
BLE_HCI_OCF_LE_RD_CHAN_MAP
BLE_HCI_OCF_LE_RD_LOCAL_RESOLV_ADDR
BLE_HCI_OCF_LE_RD_LOC_SUPP_FEAT
BLE_HCI_OCF_LE_RD_MAX_ADV_DATA_LEN
BLE_HCI_OCF_LE_RD_MAX_DATA_LEN
BLE_HCI_OCF_LE_RD_NUM_OF_ADV_SETS
BLE_HCI_OCF_LE_RD_P256_PUBKEY
BLE_HCI_OCF_LE_RD_PEER_RESOLV_ADDR
BLE_HCI_OCF_LE_RD_PERIODIC_ADV_LIST_SIZE
BLE_HCI_OCF_LE_RD_PHY
BLE_HCI_OCF_LE_RD_REM_FEAT
BLE_HCI_OCF_LE_RD_RESOLV_LIST_SIZE
BLE_HCI_OCF_LE_RD_RF_PATH_COMPENSATION
BLE_HCI_OCF_LE_RD_SUGG_DEF_DATA_LEN
BLE_HCI_OCF_LE_RD_SUPP_STATES
BLE_HCI_OCF_LE_RD_TRANSMIT_POWER
BLE_HCI_OCF_LE_RD_WHITE_LIST_SIZE
BLE_HCI_OCF_LE_READ_REMOTE_TRANSMIT_POWER_LEVEL
BLE_HCI_OCF_LE_REMOVE_ADV_SET
BLE_HCI_OCF_LE_REM_CONN_PARAM_NRR
BLE_HCI_OCF_LE_REM_CONN_PARAM_RR
BLE_HCI_OCF_LE_REM_DEV_FROM_PERIODIC_ADV_LIST
BLE_HCI_OCF_LE_REQ_PEER_SCA
BLE_HCI_OCF_LE_RMV_RESOLV_LIST
BLE_HCI_OCF_LE_RMV_WHITE_LIST
BLE_HCI_OCF_LE_RX_TEST
BLE_HCI_OCF_LE_RX_TEST_V2
BLE_HCI_OCF_LE_RX_TEST_V3
BLE_HCI_OCF_LE_SET_ADDR_RES_EN
BLE_HCI_OCF_LE_SET_ADV_DATA
BLE_HCI_OCF_LE_SET_ADV_ENABLE
BLE_HCI_OCF_LE_SET_ADV_PARAMS
BLE_HCI_OCF_LE_SET_ADV_SET_RND_ADDR
BLE_HCI_OCF_LE_SET_CONNLESS_CTE_TX_ENABLE
BLE_HCI_OCF_LE_SET_CONNLESS_CTE_TX_PARAMS
BLE_HCI_OCF_LE_SET_CONNLESS_IQ_SAMPLING_ENABLE
BLE_HCI_OCF_LE_SET_CONN_CTE_REQ_ENABLE
BLE_HCI_OCF_LE_SET_CONN_CTE_RESP_ENABLE
BLE_HCI_OCF_LE_SET_CONN_CTE_RX_PARAMS
BLE_HCI_OCF_LE_SET_CONN_CTE_TX_PARAMS
BLE_HCI_OCF_LE_SET_DATA_LEN
BLE_HCI_OCF_LE_SET_DEFAULT_PHY
BLE_HCI_OCF_LE_SET_DEFAULT_SUBRATE
BLE_HCI_OCF_LE_SET_DEFAULT_SYNC_TRANSFER_PARAMS
BLE_HCI_OCF_LE_SET_EVENT_MASK
BLE_HCI_OCF_LE_SET_EXT_ADV_DATA
BLE_HCI_OCF_LE_SET_EXT_ADV_ENABLE
BLE_HCI_OCF_LE_SET_EXT_ADV_PARAM
BLE_HCI_OCF_LE_SET_EXT_SCAN_ENABLE
BLE_HCI_OCF_LE_SET_EXT_SCAN_PARAM
BLE_HCI_OCF_LE_SET_EXT_SCAN_RSP_DATA
BLE_HCI_OCF_LE_SET_HOST_CHAN_CLASS
BLE_HCI_OCF_LE_SET_HOST_FEAT
BLE_HCI_OCF_LE_SET_PATH_LOSS_REPORT_ENABLE
BLE_HCI_OCF_LE_SET_PATH_LOSS_REPORT_PARAM
BLE_HCI_OCF_LE_SET_PERIODIC_ADV_DATA
BLE_HCI_OCF_LE_SET_PERIODIC_ADV_ENABLE
BLE_HCI_OCF_LE_SET_PERIODIC_ADV_PARAMS
BLE_HCI_OCF_LE_SET_PHY
BLE_HCI_OCF_LE_SET_PRIVACY_MODE
BLE_HCI_OCF_LE_SET_RAND_ADDR
BLE_HCI_OCF_LE_SET_RPA_TMO
BLE_HCI_OCF_LE_SET_SCAN_ENABLE
BLE_HCI_OCF_LE_SET_SCAN_PARAMS
BLE_HCI_OCF_LE_SET_SCAN_RSP_DATA
BLE_HCI_OCF_LE_SET_TRANS_PWR_REPORT_ENABLE
BLE_HCI_OCF_LE_START_ENCRYPT
BLE_HCI_OCF_LE_SUBRATE_REQ
BLE_HCI_OCF_LE_TEST_END
BLE_HCI_OCF_LE_TX_TEST
BLE_HCI_OCF_LE_TX_TEST_V2
BLE_HCI_OCF_LE_TX_TEST_V3
BLE_HCI_OCF_LE_WR_RF_PATH_COMPENSATION
BLE_HCI_OCF_LE_WR_SUGG_DEF_DATA_LEN
BLE_HCI_OCF_RD_REM_VER_INFO
BLE_HCI_OCF_RD_RSSI
BLE_HCI_OGF_CTLR_BASEBAND
BLE_HCI_OGF_INFO_PARAMS
BLE_HCI_OGF_LE
BLE_HCI_OGF_LINK_CTRL
BLE_HCI_OGF_LINK_POLICY
BLE_HCI_OGF_STATUS_PARAMS
BLE_HCI_OGF_TESTING
BLE_HCI_OGF_VENDOR
BLE_HCI_OPCODE_NOP
BLE_HCI_PB_FIRST_FLUSH
BLE_HCI_PB_FIRST_NON_FLUSH
BLE_HCI_PB_FULL
BLE_HCI_PB_MIDDLE
BLE_HCI_PERIODIC_DATA_STATUS_COMPLETE
BLE_HCI_PERIODIC_DATA_STATUS_INCOMPLETE
BLE_HCI_PERIODIC_DATA_STATUS_TRUNCATED
BLE_HCI_PRIVACY_DEVICE
BLE_HCI_PRIVACY_NETWORK
BLE_HCI_RMV_WHITE_LIST_LEN
BLE_HCI_SCAN_FILT_MAX
BLE_HCI_SCAN_FILT_NO_WL
BLE_HCI_SCAN_FILT_NO_WL_INITA
BLE_HCI_SCAN_FILT_USE_WL
BLE_HCI_SCAN_FILT_USE_WL_INITA
BLE_HCI_SCAN_ITVL
BLE_HCI_SCAN_ITVL_DEF
BLE_HCI_SCAN_ITVL_MAX
BLE_HCI_SCAN_ITVL_MAX_EXT
BLE_HCI_SCAN_ITVL_MIN
BLE_HCI_SCAN_TYPE_ACTIVE
BLE_HCI_SCAN_TYPE_PASSIVE
BLE_HCI_SCAN_WINDOW_DEF
BLE_HCI_SCAN_WINDOW_MAX
BLE_HCI_SCAN_WINDOW_MAX_EXT
BLE_HCI_SCAN_WINDOW_MIN
BLE_HCI_SET_DATALEN_TX_OCTETS_MAX
BLE_HCI_SET_DATALEN_TX_OCTETS_MIN
BLE_HCI_SET_DATALEN_TX_TIME_MAX
BLE_HCI_SET_DATALEN_TX_TIME_MIN
BLE_HCI_VER_BCS
BLE_HCI_VER_BCS_1_0b
BLE_HCI_VER_BCS_1_1
BLE_HCI_VER_BCS_1_2
BLE_HCI_VER_BCS_2_0_EDR
BLE_HCI_VER_BCS_2_1_EDR
BLE_HCI_VER_BCS_3_0_HCS
BLE_HCI_VER_BCS_4_0
BLE_HCI_VER_BCS_4_1
BLE_HCI_VER_BCS_4_2
BLE_HCI_VER_BCS_5_0
BLE_HCI_VER_BCS_5_1
BLE_HCI_VER_BCS_5_2
BLE_HCI_VER_BCS_5_3
BLE_HCI_VS_CSS_OP_CONFIGURE
BLE_HCI_VS_CSS_OP_SET_CONN_SLOT
BLE_HCI_VS_CSS_OP_SET_NEXT_SLOT
BLE_HS_ADV_ADV_ITVL_LEN
BLE_HS_ADV_APPEARANCE_LEN
BLE_HS_ADV_FLAGS_LEN
BLE_HS_ADV_F_BREDR_UNSUP
BLE_HS_ADV_F_DISC_GEN
BLE_HS_ADV_F_DISC_LTD
BLE_HS_ADV_MAX_FIELD_SZ
BLE_HS_ADV_MAX_SZ
BLE_HS_ADV_PUBLIC_TGT_ADDR_ENTRY_LEN
BLE_HS_ADV_SLAVE_ITVL_RANGE_LEN
BLE_HS_ADV_SVC_DATA_UUID128_MIN_LEN
BLE_HS_ADV_SVC_DATA_UUID16_MIN_LEN
BLE_HS_ADV_SVC_DATA_UUID32_MIN_LEN
BLE_HS_ADV_TX_PWR_LVL_AUTO
BLE_HS_ADV_TX_PWR_LVL_LEN
BLE_HS_ADV_TYPE_ADV_ITVL
BLE_HS_ADV_TYPE_APPEARANCE
BLE_HS_ADV_TYPE_COMP_NAME
BLE_HS_ADV_TYPE_COMP_UUIDS128
BLE_HS_ADV_TYPE_COMP_UUIDS16
BLE_HS_ADV_TYPE_COMP_UUIDS32
BLE_HS_ADV_TYPE_FLAGS
BLE_HS_ADV_TYPE_INCOMP_NAME
BLE_HS_ADV_TYPE_INCOMP_UUIDS128
BLE_HS_ADV_TYPE_INCOMP_UUIDS16
BLE_HS_ADV_TYPE_INCOMP_UUIDS32
BLE_HS_ADV_TYPE_MESH_BEACON
BLE_HS_ADV_TYPE_MESH_MESSAGE
BLE_HS_ADV_TYPE_MESH_PROV
BLE_HS_ADV_TYPE_MFG_DATA
BLE_HS_ADV_TYPE_PUBLIC_TGT_ADDR
BLE_HS_ADV_TYPE_RANDOM_TGT_ADDR
BLE_HS_ADV_TYPE_SLAVE_ITVL_RANGE
BLE_HS_ADV_TYPE_SOL_UUIDS128
BLE_HS_ADV_TYPE_SOL_UUIDS16
BLE_HS_ADV_TYPE_SVC_DATA_UUID128
BLE_HS_ADV_TYPE_SVC_DATA_UUID16
BLE_HS_ADV_TYPE_SVC_DATA_UUID32
BLE_HS_ADV_TYPE_TX_PWR_LVL
BLE_HS_ADV_TYPE_URI
BLE_HS_CONN_HANDLE_NONE
BLE_HS_EAGAIN
BLE_HS_EALREADY
BLE_HS_EAPP
BLE_HS_EAUTHEN
BLE_HS_EAUTHOR
BLE_HS_EBADDATA
BLE_HS_EBUSY
BLE_HS_ECONTROLLER
BLE_HS_EDISABLED
BLE_HS_EDONE
BLE_HS_EENCRYPT
BLE_HS_EENCRYPT_KEY_SZ
BLE_HS_EINVAL
BLE_HS_EMSGSIZE
BLE_HS_ENOADDR
BLE_HS_ENOENT
BLE_HS_ENOMEM
BLE_HS_ENOMEM_EVT
BLE_HS_ENOTCONN
BLE_HS_ENOTSUP
BLE_HS_ENOTSYNCED
BLE_HS_EOS
BLE_HS_EPREEMPTED
BLE_HS_EREJECT
BLE_HS_EROLE
BLE_HS_ERR_ATT_BASE
BLE_HS_ERR_HCI_BASE
BLE_HS_ERR_HW_BASE
BLE_HS_ERR_L2C_BASE
BLE_HS_ERR_SM_PEER_BASE
BLE_HS_ERR_SM_US_BASE
BLE_HS_ESTALLED
BLE_HS_ESTORE_CAP
BLE_HS_ESTORE_FAIL
BLE_HS_ETIMEOUT
BLE_HS_ETIMEOUT_HCI
BLE_HS_EUNKNOWN
BLE_HS_IO_DISPLAY_ONLY
BLE_HS_IO_DISPLAY_YESNO
BLE_HS_IO_KEYBOARD_DISPLAY
BLE_HS_IO_KEYBOARD_ONLY
BLE_HS_IO_NO_INPUT_OUTPUT
BLE_HW_ERR_DO_NOT_USE
BLE_HW_ERR_HCI_SYNC_LOSS
BLE_L2CAP_CID_ATT
BLE_L2CAP_CID_CB_MAX
BLE_L2CAP_CID_CB_MIN
BLE_L2CAP_CID_IPSP
BLE_L2CAP_CID_SIG
BLE_L2CAP_CID_SM
BLE_L2CAP_COC_ERR_CONNECTION_SUCCESS
BLE_L2CAP_COC_ERR_INSUFFICIENT_AUTHEN
BLE_L2CAP_COC_ERR_INSUFFICIENT_AUTHOR
BLE_L2CAP_COC_ERR_INSUFFICIENT_ENC
BLE_L2CAP_COC_ERR_INSUFFICIENT_KEY_SZ
BLE_L2CAP_COC_ERR_INVALID_PARAMETERS
BLE_L2CAP_COC_ERR_INVALID_SOURCE_CID
BLE_L2CAP_COC_ERR_NO_RESOURCES
BLE_L2CAP_COC_ERR_SOURCE_CID_ALREADY_USED
BLE_L2CAP_COC_ERR_UNACCEPTABLE_PARAMETERS
BLE_L2CAP_COC_ERR_UNKNOWN_LE_PSM
BLE_L2CAP_ERR_RECONFIG_INVALID_DCID
BLE_L2CAP_ERR_RECONFIG_REDUCTION_MPS_NOT_ALLOWED
BLE_L2CAP_ERR_RECONFIG_REDUCTION_MTU_NOT_ALLOWED
BLE_L2CAP_ERR_RECONFIG_SUCCEED
BLE_L2CAP_ERR_RECONFIG_UNACCAPTED_PARAM
BLE_L2CAP_EVENT_COC_ACCEPT
BLE_L2CAP_EVENT_COC_CONNECTED
BLE_L2CAP_EVENT_COC_DATA_RECEIVED
BLE_L2CAP_EVENT_COC_DISCONNECTED
BLE_L2CAP_EVENT_COC_PEER_RECONFIGURED
BLE_L2CAP_EVENT_COC_RECONFIG_COMPLETED
BLE_L2CAP_EVENT_COC_TX_UNSTALLED
BLE_L2CAP_SIG_ERR_CMD_NOT_UNDERSTOOD
BLE_L2CAP_SIG_ERR_INVALID_CID
BLE_L2CAP_SIG_ERR_MTU_EXCEEDED
BLE_L2CAP_SIG_OP_CONFIG_REQ
BLE_L2CAP_SIG_OP_CONFIG_RSP
BLE_L2CAP_SIG_OP_CONNECT_REQ
BLE_L2CAP_SIG_OP_CONNECT_RSP
BLE_L2CAP_SIG_OP_CREATE_CHAN_REQ
BLE_L2CAP_SIG_OP_CREATE_CHAN_RSP
BLE_L2CAP_SIG_OP_CREDIT_CONNECT_REQ
BLE_L2CAP_SIG_OP_CREDIT_CONNECT_RSP
BLE_L2CAP_SIG_OP_CREDIT_RECONFIG_REQ
BLE_L2CAP_SIG_OP_CREDIT_RECONFIG_RSP
BLE_L2CAP_SIG_OP_DISCONN_REQ
BLE_L2CAP_SIG_OP_DISCONN_RSP
BLE_L2CAP_SIG_OP_ECHO_REQ
BLE_L2CAP_SIG_OP_ECHO_RSP
BLE_L2CAP_SIG_OP_FLOW_CTRL_CREDIT
BLE_L2CAP_SIG_OP_INFO_REQ
BLE_L2CAP_SIG_OP_INFO_RSP
BLE_L2CAP_SIG_OP_LE_CREDIT_CONNECT_REQ
BLE_L2CAP_SIG_OP_LE_CREDIT_CONNECT_RSP
BLE_L2CAP_SIG_OP_MAX
BLE_L2CAP_SIG_OP_MOVE_CHAN_CONF_REQ
BLE_L2CAP_SIG_OP_MOVE_CHAN_CONF_RSP
BLE_L2CAP_SIG_OP_MOVE_CHAN_REQ
BLE_L2CAP_SIG_OP_MOVE_CHAN_RSP
BLE_L2CAP_SIG_OP_REJECT
BLE_L2CAP_SIG_OP_UPDATE_REQ
BLE_L2CAP_SIG_OP_UPDATE_RSP
BLE_LL_CHANNEL_MAP_IND
BLE_LL_CONN_PARAM_REQ
BLE_LL_CONN_PARAM_RSP
BLE_LL_CONN_UPDATE_IND
BLE_LL_ENC_REQ
BLE_LL_ENC_RSP
BLE_LL_FEATURE_REQ
BLE_LL_FEATURE_RSP
BLE_LL_FLAG_CHSEL
BLE_LL_FLAG_RXADD
BLE_LL_FLAG_TXADD
BLE_LL_LENGTH_REQ
BLE_LL_LENGTH_RSP
BLE_LL_MIN_USED_CHAN_IND
BLE_LL_PAUSE_ENC_REQ
BLE_LL_PAUSE_ENC_RSP
BLE_LL_PHY_REQ
BLE_LL_PHY_RSP
BLE_LL_PHY_UPDATE_IND
BLE_LL_PING_REQ
BLE_LL_PING_RSP
BLE_LL_REJECT_EXT_IND
BLE_LL_REJECT_IND
BLE_LL_SLAVE_FEATURE_REQ
BLE_LL_START_ENC_REQ
BLE_LL_START_ENC_RSP
BLE_LL_TERMINATE_IND
BLE_LL_UNKNOWN_RSP
BLE_LL_VERSION_IND
BLE_LMP_VER_BCS
BLE_LMP_VER_BCS_1_0b
BLE_LMP_VER_BCS_1_1
BLE_LMP_VER_BCS_1_2
BLE_LMP_VER_BCS_2_0_EDR
BLE_LMP_VER_BCS_2_1_EDR
BLE_LMP_VER_BCS_3_0_HCS
BLE_LMP_VER_BCS_4_0
BLE_LMP_VER_BCS_4_1
BLE_LMP_VER_BCS_4_2
BLE_LMP_VER_BCS_5_0
BLE_LMP_VER_BCS_5_1
BLE_LMP_VER_BCS_5_2
BLE_LMP_VER_BCS_5_3
BLE_MBUF_HDR_F_AUX_INVALID
BLE_MBUF_HDR_F_AUX_PTR_WAIT
BLE_MBUF_HDR_F_CONNECT_IND_TXD
BLE_MBUF_HDR_F_CONNECT_REQ_TXD
BLE_MBUF_HDR_F_CONNECT_RSP_RXD
BLE_MBUF_HDR_F_CONN_CREDIT
BLE_MBUF_HDR_F_CONN_CREDIT_INT
BLE_MBUF_HDR_F_CRC_OK
BLE_MBUF_HDR_F_DEVMATCH
BLE_MBUF_HDR_F_EXT_ADV
BLE_MBUF_HDR_F_EXT_ADV_SEC
BLE_MBUF_HDR_F_IGNORED
BLE_MBUF_HDR_F_INITA_RESOLVED
BLE_MBUF_HDR_F_MIC_FAILURE
BLE_MBUF_HDR_F_RESOLVED
BLE_MBUF_HDR_F_RXSTATE_MASK
BLE_MBUF_HDR_F_SCAN_REQ_TXD
BLE_MBUF_HDR_F_SCAN_RSP_RXD
BLE_MBUF_HDR_F_SCAN_RSP_TXD
BLE_MBUF_HDR_F_TARGETA_RESOLVED
BLE_MBUF_HS_HDR_LEN
BLE_NPL_OS_ALIGNMENT
BLE_NPL_TIME_FOREVER
BLE_OWN_ADDR_PUBLIC
BLE_OWN_ADDR_RANDOM
BLE_OWN_ADDR_RPA_PUBLIC_DEFAULT
BLE_OWN_ADDR_RPA_RANDOM_DEFAULT
BLE_PDU_MASK
BLE_SCAN_REQ
BLE_SCAN_RESP
BLE_SM_ERR_ALREADY
BLE_SM_ERR_AUTHREQ
BLE_SM_ERR_CMD_NOT_SUPP
BLE_SM_ERR_CONFIRM_MISMATCH
BLE_SM_ERR_CROSS_TRANS
BLE_SM_ERR_DHKEY
BLE_SM_ERR_ENC_KEY_SZ
BLE_SM_ERR_INVAL
BLE_SM_ERR_MAX_PLUS_1
BLE_SM_ERR_NUMCMP
BLE_SM_ERR_OOB
BLE_SM_ERR_PAIR_NOT_SUPP
BLE_SM_ERR_PASSKEY
BLE_SM_ERR_REPEATED
BLE_SM_ERR_UNSPECIFIED
BLE_SM_IOACT_DISP
BLE_SM_IOACT_INPUT
BLE_SM_IOACT_MAX_PLUS_ONE
BLE_SM_IOACT_NONE
BLE_SM_IOACT_NUMCMP
BLE_SM_IOACT_OOB
BLE_SM_IOACT_OOB_SC
BLE_SM_IO_CAP_DISP_ONLY
BLE_SM_IO_CAP_DISP_YES_NO
BLE_SM_IO_CAP_KEYBOARD_DISP
BLE_SM_IO_CAP_KEYBOARD_ONLY
BLE_SM_IO_CAP_NO_IO
BLE_SM_IO_CAP_RESERVED
BLE_SM_PAIR_ALG_JW
BLE_SM_PAIR_ALG_NUMCMP
BLE_SM_PAIR_ALG_OOB
BLE_SM_PAIR_ALG_PASSKEY
BLE_SM_PAIR_AUTHREQ_BOND
BLE_SM_PAIR_AUTHREQ_KEYPRESS
BLE_SM_PAIR_AUTHREQ_MITM
BLE_SM_PAIR_AUTHREQ_RESERVED
BLE_SM_PAIR_AUTHREQ_SC
BLE_SM_PAIR_KEY_DIST_ENC
BLE_SM_PAIR_KEY_DIST_ID
BLE_SM_PAIR_KEY_DIST_LINK
BLE_SM_PAIR_KEY_DIST_RESERVED
BLE_SM_PAIR_KEY_DIST_SIGN
BLE_SM_PAIR_KEY_SZ_MAX
BLE_SM_PAIR_KEY_SZ_MIN
BLE_SM_PAIR_OOB_NO
BLE_SM_PAIR_OOB_RESERVED
BLE_SM_PAIR_OOB_YES
BLE_STORE_EVENT_FULL
BLE_STORE_EVENT_OVERFLOW
BLE_STORE_OBJ_TYPE_CCCD
BLE_STORE_OBJ_TYPE_OUR_SEC
BLE_STORE_OBJ_TYPE_PEER_SEC
BLE_UNIT_AMPERE
BLE_UNIT_AMPERE_HOURS
BLE_UNIT_AMPERE_PER_METRE
BLE_UNIT_AMPERE_PER_SQUARE_METRE
BLE_UNIT_ANGLE_DEGREE
BLE_UNIT_ANGLE_MINUTE
BLE_UNIT_ANGLE_SECOND
BLE_UNIT_BAR
BLE_UNIT_BARN
BLE_UNIT_BEATS_PER_MINUTE
BLE_UNIT_BECQUEREL
BLE_UNIT_BEL
BLE_UNIT_BLE_FMT_2bit
BLE_UNIT_BLE_FMT_BOOL
BLE_UNIT_BLE_FMT_DUINT16
BLE_UNIT_BLE_FMT_FLOAT
BLE_UNIT_BLE_FMT_FLOAT32
BLE_UNIT_BLE_FMT_FLOAT64
BLE_UNIT_BLE_FMT_NIBBLE
BLE_UNIT_BLE_FMT_SFLOAT
BLE_UNIT_BLE_FMT_SINT12
BLE_UNIT_BLE_FMT_SINT128
BLE_UNIT_BLE_FMT_SINT16
BLE_UNIT_BLE_FMT_SINT24
BLE_UNIT_BLE_FMT_SINT32
BLE_UNIT_BLE_FMT_SINT48
BLE_UNIT_BLE_FMT_SINT64
BLE_UNIT_BLE_FMT_SINT8
BLE_UNIT_BLE_FMT_STRUCT
BLE_UNIT_BLE_FMT_UINT12
BLE_UNIT_BLE_FMT_UINT128
BLE_UNIT_BLE_FMT_UINT16
BLE_UNIT_BLE_FMT_UINT24
BLE_UNIT_BLE_FMT_UINT32
BLE_UNIT_BLE_FMT_UINT48
BLE_UNIT_BLE_FMT_UINT64
BLE_UNIT_BLE_FMT_UINT8
BLE_UNIT_BLE_FMT_UTF16
BLE_UNIT_BLE_FMT_UTF8
BLE_UNIT_BLE_UNIT_METRE
BLE_UNIT_CANDELA
BLE_UNIT_CANDELA_PER_SQUARE_METRE
BLE_UNIT_COULOMB
BLE_UNIT_COULOMB_PER_CUBIC_METRE
BLE_UNIT_COULOMB_PER_KG
BLE_UNIT_COULOMB_PER_M2
BLE_UNIT_COUNT_PER_CUBIC_METRE
BLE_UNIT_CUBIC_METRES
BLE_UNIT_CUBIC_METRE_PER_KILOGRAM
BLE_UNIT_DAY
BLE_UNIT_DEGREE_CELSIUS
BLE_UNIT_DEGREE_FAHRENHEIT
BLE_UNIT_FARAD
BLE_UNIT_FARAD_PER_METRE
BLE_UNIT_FLUX_COULOMB_PER_M2
BLE_UNIT_FOOT
BLE_UNIT_GRAM_CALORIE
BLE_UNIT_GRAM_PER_SECOND
BLE_UNIT_GRAY
BLE_UNIT_GRAY_PER_SECOND
BLE_UNIT_HEAT_FLUX_WATT_PER_M2
BLE_UNIT_HECTARE
BLE_UNIT_HENRY
BLE_UNIT_HENRY_PER_METRE
BLE_UNIT_HERTZ
BLE_UNIT_HOUR
BLE_UNIT_INCH
BLE_UNIT_JOULE
BLE_UNIT_JOULE_PER_CUBIC_METRE
BLE_UNIT_JOULE_PER_KELVIN
BLE_UNIT_JOULE_PER_KG
BLE_UNIT_JOULE_PER_KG_KELVIN
BLE_UNIT_JOULE_PER_MOLE
BLE_UNIT_JOULE_PER_MOLE_KELVIN
BLE_UNIT_KATAL
BLE_UNIT_KATAL_PER_CUBIC_METRE
BLE_UNIT_KELVIN
BLE_UNIT_KG_CALORIE
BLE_UNIT_KG_PER_CUBIC_METRE
BLE_UNIT_KG_PER_SQUARE_METRE
BLE_UNIT_KILOGRAM
BLE_UNIT_KILOGRAM_PER_CUBIC_METRE
BLE_UNIT_KILOMETER_PER_MINUTE
BLE_UNIT_KILOMETRE_PER_HOUR
BLE_UNIT_KILOWATT_HOUR
BLE_UNIT_KNOT
BLE_UNIT_LITRE
BLE_UNIT_LITRE_PER_SECOND
BLE_UNIT_LUMEN
BLE_UNIT_LUMEN_HOUR
BLE_UNIT_LUMEN_PER_WATT
BLE_UNIT_LUX
BLE_UNIT_LUX_HOUR
BLE_UNIT_METABOLIC_EQU
BLE_UNIT_METRES_PER_SECOND
BLE_UNIT_METRES_PER_SECOND_SQUARED
BLE_UNIT_MILE
BLE_UNIT_MILE_PER_HOUR
BLE_UNIT_MILLIGRAM_PER_DECILITRE
BLE_UNIT_MILLIMETRE_OF_MERCURY
BLE_UNIT_MILLIMOLE_PER_LITRE
BLE_UNIT_MINUTE
BLE_UNIT_MLIT_PER_KG_PER_MINUTE
BLE_UNIT_MOLE
BLE_UNIT_MOLE_PER_CUBIC_METRE
BLE_UNIT_MONTH
BLE_UNIT_NAUTICAL_MILE
BLE_UNIT_NEPER
BLE_UNIT_NEWTON
BLE_UNIT_NEWTON_METRE
BLE_UNIT_NEWTON_PER_METRE
BLE_UNIT_NGSTRM
BLE_UNIT_NONE
BLE_UNIT_OHM
BLE_UNIT_PARSEC
BLE_UNIT_PASCAL
BLE_UNIT_PASCAL_SECOND
BLE_UNIT_PERCENTAGE
BLE_UNIT_PER_MILLE
BLE_UNIT_POUND
BLE_UNIT_POUND_FORCE_PER_SQU_INCH
BLE_UNIT_RADIAN
BLE_UNIT_RADIAN_PER_SECOND
BLE_UNIT_RADIAN_PER_SECOND_SQUARED
BLE_UNIT_RECIPROCAL_METRE
BLE_UNIT_REFRACTIVE_INDEX
BLE_UNIT_RELATIVE_PERMEABILITY
BLE_UNIT_REVOLUTION_PER_MINUTE
BLE_UNIT_SECOND
BLE_UNIT_SIEMENS
BLE_UNIT_SIEVERT
BLE_UNIT_SQUARE_METRES
BLE_UNIT_STEP_PER_MINUTE
BLE_UNIT_STERADIAN
BLE_UNIT_STROKE_PER_MINUTE
BLE_UNIT_TESLA
BLE_UNIT_TONNE
BLE_UNIT_VOLT
BLE_UNIT_VOLT_PER_METRE
BLE_UNIT_WATT
BLE_UNIT_WATT_PER_M2_STERADIAN
BLE_UNIT_WATT_PER_METRE_KELVIN
BLE_UNIT_WATT_PER_SQUARE_METRE
BLE_UNIT_WATT_PER_STERADIAN
BLE_UNIT_WEBER
BLE_UNIT_YARD
BLE_UNIT_YEAR
BLE_UUID_STR_LEN
BLE_UUID_TYPE_128
BLE_UUID_TYPE_16
BLE_UUID_TYPE_32
BLE_VERSION_40
BLE_VERSION_41
BLE_VERSION_42
BLE_VERSION_50
BLOCKING
BLUETIL_AD_FLAGS_DEFAULT
BLUETIL_AD_NOMEM
BLUETIL_AD_NOTFOUND
BLUETIL_AD_OK
BOARD_NRF52840DONGLE
BUFSIZ
CCM_CNFPTR_CNFPTR_Msk
CCM_CNFPTR_CNFPTR_Pos
CCM_COUNT
CCM_ENABLE_ENABLE_Disabled
CCM_ENABLE_ENABLE_Enabled
CCM_ENABLE_ENABLE_Msk
CCM_ENABLE_ENABLE_Pos
CCM_EVENTS_ENDCRYPT_EVENTS_ENDCRYPT_Generated
CCM_EVENTS_ENDCRYPT_EVENTS_ENDCRYPT_Msk
CCM_EVENTS_ENDCRYPT_EVENTS_ENDCRYPT_NotGenerated
CCM_EVENTS_ENDCRYPT_EVENTS_ENDCRYPT_Pos
CCM_EVENTS_ENDKSGEN_EVENTS_ENDKSGEN_Generated
CCM_EVENTS_ENDKSGEN_EVENTS_ENDKSGEN_Msk
CCM_EVENTS_ENDKSGEN_EVENTS_ENDKSGEN_NotGenerated
CCM_EVENTS_ENDKSGEN_EVENTS_ENDKSGEN_Pos
CCM_EVENTS_ERROR_EVENTS_ERROR_Generated
CCM_EVENTS_ERROR_EVENTS_ERROR_Msk
CCM_EVENTS_ERROR_EVENTS_ERROR_NotGenerated
CCM_EVENTS_ERROR_EVENTS_ERROR_Pos
CCM_INPTR_INPTR_Msk
CCM_INPTR_INPTR_Pos
CCM_INTENCLR_ENDCRYPT_Clear
CCM_INTENCLR_ENDCRYPT_Disabled
CCM_INTENCLR_ENDCRYPT_Enabled
CCM_INTENCLR_ENDCRYPT_Msk
CCM_INTENCLR_ENDCRYPT_Pos
CCM_INTENCLR_ENDKSGEN_Clear
CCM_INTENCLR_ENDKSGEN_Disabled
CCM_INTENCLR_ENDKSGEN_Enabled
CCM_INTENCLR_ENDKSGEN_Msk
CCM_INTENCLR_ENDKSGEN_Pos
CCM_INTENCLR_ERROR_Clear
CCM_INTENCLR_ERROR_Disabled
CCM_INTENCLR_ERROR_Enabled
CCM_INTENCLR_ERROR_Msk
CCM_INTENCLR_ERROR_Pos
CCM_INTENSET_ENDCRYPT_Disabled
CCM_INTENSET_ENDCRYPT_Enabled
CCM_INTENSET_ENDCRYPT_Msk
CCM_INTENSET_ENDCRYPT_Pos
CCM_INTENSET_ENDCRYPT_Set
CCM_INTENSET_ENDKSGEN_Disabled
CCM_INTENSET_ENDKSGEN_Enabled
CCM_INTENSET_ENDKSGEN_Msk
CCM_INTENSET_ENDKSGEN_Pos
CCM_INTENSET_ENDKSGEN_Set
CCM_INTENSET_ERROR_Disabled
CCM_INTENSET_ERROR_Enabled
CCM_INTENSET_ERROR_Msk
CCM_INTENSET_ERROR_Pos
CCM_INTENSET_ERROR_Set
CCM_MAXPACKETSIZE_MAXPACKETSIZE_Msk
CCM_MAXPACKETSIZE_MAXPACKETSIZE_Pos
CCM_MICSTATUS_MICSTATUS_CheckFailed
CCM_MICSTATUS_MICSTATUS_CheckPassed
CCM_MICSTATUS_MICSTATUS_Msk
CCM_MICSTATUS_MICSTATUS_Pos
CCM_MODE_DATARATE_125Kbps
CCM_MODE_DATARATE_1Mbit
CCM_MODE_DATARATE_2Mbit
CCM_MODE_DATARATE_500Kbps
CCM_MODE_DATARATE_Msk
CCM_MODE_DATARATE_Pos
CCM_MODE_LENGTH_Default
CCM_MODE_LENGTH_Extended
CCM_MODE_LENGTH_Msk
CCM_MODE_LENGTH_Pos
CCM_MODE_MODE_Decryption
CCM_MODE_MODE_Encryption
CCM_MODE_MODE_Msk
CCM_MODE_MODE_Pos
CCM_OUTPTR_OUTPTR_Msk
CCM_OUTPTR_OUTPTR_Pos
CCM_RATEOVERRIDE_RATEOVERRIDE_125Kbps
CCM_RATEOVERRIDE_RATEOVERRIDE_1Mbit
CCM_RATEOVERRIDE_RATEOVERRIDE_2Mbit
CCM_RATEOVERRIDE_RATEOVERRIDE_500Kbps
CCM_RATEOVERRIDE_RATEOVERRIDE_Msk
CCM_RATEOVERRIDE_RATEOVERRIDE_Pos
CCM_SCRATCHPTR_SCRATCHPTR_Msk
CCM_SCRATCHPTR_SCRATCHPTR_Pos
CCM_SHORTS_ENDKSGEN_CRYPT_Disabled
CCM_SHORTS_ENDKSGEN_CRYPT_Enabled
CCM_SHORTS_ENDKSGEN_CRYPT_Msk
CCM_SHORTS_ENDKSGEN_CRYPT_Pos
CCM_TASKS_CRYPT_TASKS_CRYPT_Msk
CCM_TASKS_CRYPT_TASKS_CRYPT_Pos
CCM_TASKS_CRYPT_TASKS_CRYPT_Trigger
CCM_TASKS_KSGEN_TASKS_KSGEN_Msk
CCM_TASKS_KSGEN_TASKS_KSGEN_Pos
CCM_TASKS_KSGEN_TASKS_KSGEN_Trigger
CCM_TASKS_RATEOVERRIDE_TASKS_RATEOVERRIDE_Msk
CCM_TASKS_RATEOVERRIDE_TASKS_RATEOVERRIDE_Pos
CCM_TASKS_RATEOVERRIDE_TASKS_RATEOVERRIDE_Trigger
CCM_TASKS_STOP_TASKS_STOP_Msk
CCM_TASKS_STOP_TASKS_STOP_Pos
CCM_TASKS_STOP_TASKS_STOP_Trigger
CC_HOST_RGF_HOST_CRYPTOKEY_SEL_HOST_CRYPTOKEY_SEL_K_DR
CC_HOST_RGF_HOST_CRYPTOKEY_SEL_HOST_CRYPTOKEY_SEL_K_PRTL
CC_HOST_RGF_HOST_CRYPTOKEY_SEL_HOST_CRYPTOKEY_SEL_Msk
CC_HOST_RGF_HOST_CRYPTOKEY_SEL_HOST_CRYPTOKEY_SEL_Pos
CC_HOST_RGF_HOST_CRYPTOKEY_SEL_HOST_CRYPTOKEY_SEL_Session
CC_HOST_RGF_HOST_IOT_KDR0_HOST_IOT_KDR0_Msk
CC_HOST_RGF_HOST_IOT_KDR0_HOST_IOT_KDR0_Pos
CC_HOST_RGF_HOST_IOT_KDR1_HOST_IOT_KDR1_Msk
CC_HOST_RGF_HOST_IOT_KDR1_HOST_IOT_KDR1_Pos
CC_HOST_RGF_HOST_IOT_KDR2_HOST_IOT_KDR2_Msk
CC_HOST_RGF_HOST_IOT_KDR2_HOST_IOT_KDR2_Pos
CC_HOST_RGF_HOST_IOT_KDR3_HOST_IOT_KDR3_Msk
CC_HOST_RGF_HOST_IOT_KDR3_HOST_IOT_KDR3_Pos
CC_HOST_RGF_HOST_IOT_KPRTL_LOCK_HOST_IOT_KPRTL_LOCK_Disabled
CC_HOST_RGF_HOST_IOT_KPRTL_LOCK_HOST_IOT_KPRTL_LOCK_Enabled
CC_HOST_RGF_HOST_IOT_KPRTL_LOCK_HOST_IOT_KPRTL_LOCK_Msk
CC_HOST_RGF_HOST_IOT_KPRTL_LOCK_HOST_IOT_KPRTL_LOCK_Pos
CC_HOST_RGF_HOST_IOT_LCS_LCS_Debug
CC_HOST_RGF_HOST_IOT_LCS_LCS_IS_VALID_Invalid
CC_HOST_RGF_HOST_IOT_LCS_LCS_IS_VALID_Msk
CC_HOST_RGF_HOST_IOT_LCS_LCS_IS_VALID_Pos
CC_HOST_RGF_HOST_IOT_LCS_LCS_IS_VALID_Valid
CC_HOST_RGF_HOST_IOT_LCS_LCS_Msk
CC_HOST_RGF_HOST_IOT_LCS_LCS_Pos
CC_HOST_RGF_HOST_IOT_LCS_LCS_Secure
CHAR_MIN
CHILD_MAX
CIPHERS_MAX_KEY_SIZE
CIPHER_ERR_BAD_CONTEXT_SIZE
CIPHER_ERR_DEC_FAILED
CIPHER_ERR_ENC_FAILED
CIPHER_ERR_INVALID_KEY_SIZE
CIPHER_ERR_INVALID_LENGTH
CIPHER_INIT_SUCCESS
CIPHER_MAX_BLOCK_SIZE
CIPHER_MAX_CONTEXT_SIZE
CLK_TCK
CLOCKS_PER_SEC
CLOCK_ALLOWED
CLOCK_CORECLOCK
CLOCK_COUNT
CLOCK_CTIV_CTIV_Msk
CLOCK_CTIV_CTIV_Pos
CLOCK_DISABLED
CLOCK_DISALLOWED
CLOCK_ENABLED
CLOCK_EVENTS_CTSTARTED_EVENTS_CTSTARTED_Generated
CLOCK_EVENTS_CTSTARTED_EVENTS_CTSTARTED_Msk
CLOCK_EVENTS_CTSTARTED_EVENTS_CTSTARTED_NotGenerated
CLOCK_EVENTS_CTSTARTED_EVENTS_CTSTARTED_Pos
CLOCK_EVENTS_CTSTOPPED_EVENTS_CTSTOPPED_Generated
CLOCK_EVENTS_CTSTOPPED_EVENTS_CTSTOPPED_Msk
CLOCK_EVENTS_CTSTOPPED_EVENTS_CTSTOPPED_NotGenerated
CLOCK_EVENTS_CTSTOPPED_EVENTS_CTSTOPPED_Pos
CLOCK_EVENTS_CTTO_EVENTS_CTTO_Generated
CLOCK_EVENTS_CTTO_EVENTS_CTTO_Msk
CLOCK_EVENTS_CTTO_EVENTS_CTTO_NotGenerated
CLOCK_EVENTS_CTTO_EVENTS_CTTO_Pos
CLOCK_EVENTS_DONE_EVENTS_DONE_Generated
CLOCK_EVENTS_DONE_EVENTS_DONE_Msk
CLOCK_EVENTS_DONE_EVENTS_DONE_NotGenerated
CLOCK_EVENTS_DONE_EVENTS_DONE_Pos
CLOCK_EVENTS_HFCLKSTARTED_EVENTS_HFCLKSTARTED_Generated
CLOCK_EVENTS_HFCLKSTARTED_EVENTS_HFCLKSTARTED_Msk
CLOCK_EVENTS_HFCLKSTARTED_EVENTS_HFCLKSTARTED_NotGenerated
CLOCK_EVENTS_HFCLKSTARTED_EVENTS_HFCLKSTARTED_Pos
CLOCK_EVENTS_LFCLKSTARTED_EVENTS_LFCLKSTARTED_Generated
CLOCK_EVENTS_LFCLKSTARTED_EVENTS_LFCLKSTARTED_Msk
CLOCK_EVENTS_LFCLKSTARTED_EVENTS_LFCLKSTARTED_NotGenerated
CLOCK_EVENTS_LFCLKSTARTED_EVENTS_LFCLKSTARTED_Pos
CLOCK_HFCLK
CLOCK_HFCLKRUN_STATUS_Msk
CLOCK_HFCLKRUN_STATUS_NotTriggered
CLOCK_HFCLKRUN_STATUS_Pos
CLOCK_HFCLKRUN_STATUS_Triggered
CLOCK_HFCLKSTAT_SRC_Msk
CLOCK_HFCLKSTAT_SRC_Pos
CLOCK_HFCLKSTAT_SRC_RC
CLOCK_HFCLKSTAT_SRC_Xtal
CLOCK_HFCLKSTAT_STATE_Msk
CLOCK_HFCLKSTAT_STATE_NotRunning
CLOCK_HFCLKSTAT_STATE_Pos
CLOCK_HFCLKSTAT_STATE_Running
CLOCK_HFXODEBOUNCE_HFXODEBOUNCE_Db1024us
CLOCK_HFXODEBOUNCE_HFXODEBOUNCE_Db256us
CLOCK_HFXODEBOUNCE_HFXODEBOUNCE_Msk
CLOCK_HFXODEBOUNCE_HFXODEBOUNCE_Pos
CLOCK_HFXO_ONBOOT
CLOCK_INTENCLR_CTSTARTED_Clear
CLOCK_INTENCLR_CTSTARTED_Disabled
CLOCK_INTENCLR_CTSTARTED_Enabled
CLOCK_INTENCLR_CTSTARTED_Msk
CLOCK_INTENCLR_CTSTARTED_Pos
CLOCK_INTENCLR_CTSTOPPED_Clear
CLOCK_INTENCLR_CTSTOPPED_Disabled
CLOCK_INTENCLR_CTSTOPPED_Enabled
CLOCK_INTENCLR_CTSTOPPED_Msk
CLOCK_INTENCLR_CTSTOPPED_Pos
CLOCK_INTENCLR_CTTO_Clear
CLOCK_INTENCLR_CTTO_Disabled
CLOCK_INTENCLR_CTTO_Enabled
CLOCK_INTENCLR_CTTO_Msk
CLOCK_INTENCLR_CTTO_Pos
CLOCK_INTENCLR_DONE_Clear
CLOCK_INTENCLR_DONE_Disabled
CLOCK_INTENCLR_DONE_Enabled
CLOCK_INTENCLR_DONE_Msk
CLOCK_INTENCLR_DONE_Pos
CLOCK_INTENCLR_HFCLKSTARTED_Clear
CLOCK_INTENCLR_HFCLKSTARTED_Disabled
CLOCK_INTENCLR_HFCLKSTARTED_Enabled
CLOCK_INTENCLR_HFCLKSTARTED_Msk
CLOCK_INTENCLR_HFCLKSTARTED_Pos
CLOCK_INTENCLR_LFCLKSTARTED_Clear
CLOCK_INTENCLR_LFCLKSTARTED_Disabled
CLOCK_INTENCLR_LFCLKSTARTED_Enabled
CLOCK_INTENCLR_LFCLKSTARTED_Msk
CLOCK_INTENCLR_LFCLKSTARTED_Pos
CLOCK_INTENSET_CTSTARTED_Disabled
CLOCK_INTENSET_CTSTARTED_Enabled
CLOCK_INTENSET_CTSTARTED_Msk
CLOCK_INTENSET_CTSTARTED_Pos
CLOCK_INTENSET_CTSTARTED_Set
CLOCK_INTENSET_CTSTOPPED_Disabled
CLOCK_INTENSET_CTSTOPPED_Enabled
CLOCK_INTENSET_CTSTOPPED_Msk
CLOCK_INTENSET_CTSTOPPED_Pos
CLOCK_INTENSET_CTSTOPPED_Set
CLOCK_INTENSET_CTTO_Disabled
CLOCK_INTENSET_CTTO_Enabled
CLOCK_INTENSET_CTTO_Msk
CLOCK_INTENSET_CTTO_Pos
CLOCK_INTENSET_CTTO_Set
CLOCK_INTENSET_DONE_Disabled
CLOCK_INTENSET_DONE_Enabled
CLOCK_INTENSET_DONE_Msk
CLOCK_INTENSET_DONE_Pos
CLOCK_INTENSET_DONE_Set
CLOCK_INTENSET_HFCLKSTARTED_Disabled
CLOCK_INTENSET_HFCLKSTARTED_Enabled
CLOCK_INTENSET_HFCLKSTARTED_Msk
CLOCK_INTENSET_HFCLKSTARTED_Pos
CLOCK_INTENSET_HFCLKSTARTED_Set
CLOCK_INTENSET_LFCLKSTARTED_Disabled
CLOCK_INTENSET_LFCLKSTARTED_Enabled
CLOCK_INTENSET_LFCLKSTARTED_Msk
CLOCK_INTENSET_LFCLKSTARTED_Pos
CLOCK_INTENSET_LFCLKSTARTED_Set
CLOCK_LFCLK
CLOCK_LFCLKRUN_STATUS_Msk
CLOCK_LFCLKRUN_STATUS_NotTriggered
CLOCK_LFCLKRUN_STATUS_Pos
CLOCK_LFCLKRUN_STATUS_Triggered
CLOCK_LFCLKSRCCOPY_SRC_Msk
CLOCK_LFCLKSRCCOPY_SRC_Pos
CLOCK_LFCLKSRCCOPY_SRC_RC
CLOCK_LFCLKSRCCOPY_SRC_Synth
CLOCK_LFCLKSRCCOPY_SRC_Xtal
CLOCK_LFCLKSRC_BYPASS_Disabled
CLOCK_LFCLKSRC_BYPASS_Enabled
CLOCK_LFCLKSRC_BYPASS_Msk
CLOCK_LFCLKSRC_BYPASS_Pos
CLOCK_LFCLKSRC_EXTERNAL_Disabled
CLOCK_LFCLKSRC_EXTERNAL_Enabled
CLOCK_LFCLKSRC_EXTERNAL_Msk
CLOCK_LFCLKSRC_EXTERNAL_Pos
CLOCK_LFCLKSRC_SRC_Msk
CLOCK_LFCLKSRC_SRC_Pos
CLOCK_LFCLKSRC_SRC_RC
CLOCK_LFCLKSRC_SRC_Synth
CLOCK_LFCLKSRC_SRC_Xtal
CLOCK_LFCLKSTAT_SRC_Msk
CLOCK_LFCLKSTAT_SRC_Pos
CLOCK_LFCLKSTAT_SRC_RC
CLOCK_LFCLKSTAT_SRC_Synth
CLOCK_LFCLKSTAT_SRC_Xtal
CLOCK_LFCLKSTAT_STATE_Msk
CLOCK_LFCLKSTAT_STATE_NotRunning
CLOCK_LFCLKSTAT_STATE_Pos
CLOCK_LFCLKSTAT_STATE_Running
CLOCK_LFRCMODE_MODE_Msk
CLOCK_LFRCMODE_MODE_Normal
CLOCK_LFRCMODE_MODE_Pos
CLOCK_LFRCMODE_MODE_ULP
CLOCK_LFRCMODE_STATUS_Msk
CLOCK_LFRCMODE_STATUS_Normal
CLOCK_LFRCMODE_STATUS_Pos
CLOCK_LFRCMODE_STATUS_ULP
CLOCK_TASKS_CAL_TASKS_CAL_Msk
CLOCK_TASKS_CAL_TASKS_CAL_Pos
CLOCK_TASKS_CAL_TASKS_CAL_Trigger
CLOCK_TASKS_CTSTART_TASKS_CTSTART_Msk
CLOCK_TASKS_CTSTART_TASKS_CTSTART_Pos
CLOCK_TASKS_CTSTART_TASKS_CTSTART_Trigger
CLOCK_TASKS_CTSTOP_TASKS_CTSTOP_Msk
CLOCK_TASKS_CTSTOP_TASKS_CTSTOP_Pos
CLOCK_TASKS_CTSTOP_TASKS_CTSTOP_Trigger
CLOCK_TASKS_HFCLKSTART_TASKS_HFCLKSTART_Msk
CLOCK_TASKS_HFCLKSTART_TASKS_HFCLKSTART_Pos
CLOCK_TASKS_HFCLKSTART_TASKS_HFCLKSTART_Trigger
CLOCK_TASKS_HFCLKSTOP_TASKS_HFCLKSTOP_Msk
CLOCK_TASKS_HFCLKSTOP_TASKS_HFCLKSTOP_Pos
CLOCK_TASKS_HFCLKSTOP_TASKS_HFCLKSTOP_Trigger
CLOCK_TASKS_LFCLKSTART_TASKS_LFCLKSTART_Msk
CLOCK_TASKS_LFCLKSTART_TASKS_LFCLKSTART_Pos
CLOCK_TASKS_LFCLKSTART_TASKS_LFCLKSTART_Trigger
CLOCK_TASKS_LFCLKSTOP_TASKS_LFCLKSTOP_Msk
CLOCK_TASKS_LFCLKSTOP_TASKS_LFCLKSTOP_Pos
CLOCK_TASKS_LFCLKSTOP_TASKS_LFCLKSTOP_Trigger
CLOCK_TRACECONFIG_TRACEMUX_GPIO
CLOCK_TRACECONFIG_TRACEMUX_Msk
CLOCK_TRACECONFIG_TRACEMUX_Parallel
CLOCK_TRACECONFIG_TRACEMUX_Pos
CLOCK_TRACECONFIG_TRACEMUX_Serial
CLOCK_TRACECONFIG_TRACEPORTSPEED_16MHz
CLOCK_TRACECONFIG_TRACEPORTSPEED_32MHz
CLOCK_TRACECONFIG_TRACEPORTSPEED_4MHz
CLOCK_TRACECONFIG_TRACEPORTSPEED_8MHz
CLOCK_TRACECONFIG_TRACEPORTSPEED_Msk
CLOCK_TRACECONFIG_TRACEPORTSPEED_Pos
COAPS_PORT
COAP_BLOCKWISE_MORE_OFF
COAP_BLOCKWISE_NUM_OFF
COAP_BLOCKWISE_SZX_MASK
COAP_BLOCKWISE_SZX_MAX
COAP_CLASS_CLIENT_FAILURE
COAP_CLASS_REQ
COAP_CLASS_SERVER_FAILURE
COAP_CLASS_SUCCESS
COAP_CODE_204
COAP_CODE_205
COAP_CODE_231
COAP_CODE_404
COAP_CODE_BAD_GATEWAY
COAP_CODE_BAD_OPTION
COAP_CODE_BAD_REQUEST
COAP_CODE_CHANGED
COAP_CODE_CONFLICT
COAP_CODE_CONTENT
COAP_CODE_CONTINUE
COAP_CODE_CREATED
COAP_CODE_DELETED
COAP_CODE_EMPTY
COAP_CODE_FORBIDDEN
COAP_CODE_GATEWAY_TIMEOUT
COAP_CODE_INTERNAL_SERVER_ERROR
COAP_CODE_METHOD_NOT_ALLOWED
COAP_CODE_NOT_ACCEPTABLE
COAP_CODE_NOT_IMPLEMENTED
COAP_CODE_PATH_NOT_FOUND
COAP_CODE_PRECONDITION_FAILED
COAP_CODE_PROXYING_NOT_SUPPORTED
COAP_CODE_REQUEST_ENTITY_INCOMPLETE
COAP_CODE_REQUEST_ENTITY_TOO_LARGE
COAP_CODE_SERVICE_UNAVAILABLE
COAP_CODE_TOO_MANY_REQUESTS
COAP_CODE_UNAUTHORIZED
COAP_CODE_UNPROCESSABLE_ENTITY
COAP_CODE_UNSUPPORTED_CONTENT_FORMAT
COAP_CODE_VALID
COAP_DEFAULT_LEISURE
COAP_DELETE
COAP_ETAG_LENGTH_MAX
COAP_FETCH
COAP_FORMAT_ACE_CBOR
COAP_FORMAT_AIF_CBOR
COAP_FORMAT_AIF_JSON
COAP_FORMAT_CBOR
COAP_FORMAT_CBOR_DEFLATE
COAP_FORMAT_CBOR_SEQ
COAP_FORMAT_COAP_GROUP_JSON
COAP_FORMAT_COSE_ENCRYPT
COAP_FORMAT_COSE_ENCRYPT0
COAP_FORMAT_COSE_KEY
COAP_FORMAT_COSE_KEY_SET
COAP_FORMAT_COSE_MAC
COAP_FORMAT_COSE_MAC0
COAP_FORMAT_COSE_SIGN
COAP_FORMAT_COSE_SIGN1
COAP_FORMAT_CSRATTRS
COAP_FORMAT_CWT
COAP_FORMAT_DNS_MESSAGE
COAP_FORMAT_DOTS_CBOR
COAP_FORMAT_EXI
COAP_FORMAT_IMAGE_GIF
COAP_FORMAT_IMAGE_JPEG
COAP_FORMAT_IMAGE_PNG
COAP_FORMAT_IMAGE_SVG_XML
COAP_FORMAT_JAVASCRIPT
COAP_FORMAT_JSON
COAP_FORMAT_JSON_DEFLATE
COAP_FORMAT_JSON_PATCH_JSON
COAP_FORMAT_LINK
COAP_FORMAT_MERGE_PATCH_JSON
COAP_FORMAT_MISSING_BLOCKS_CBOR_SEQ
COAP_FORMAT_MULTIPART_CORE
COAP_FORMAT_NONE
COAP_FORMAT_OCTET
COAP_FORMAT_OSCORE
COAP_FORMAT_PKCS10
COAP_FORMAT_PKCS7_MIME_CERTS_ONLY
COAP_FORMAT_PKCS7_MIME_SERVER_GEN
COAP_FORMAT_PKCS8
COAP_FORMAT_PKIXCMP
COAP_FORMAT_PKIX_CERT
COAP_FORMAT_PROBLEM_DETAILS_CBOR
COAP_FORMAT_SENML_CBOR
COAP_FORMAT_SENML_EXI
COAP_FORMAT_SENML_JSON
COAP_FORMAT_SENML_XML
COAP_FORMAT_SENSML_CBOR
COAP_FORMAT_SENSML_EXI
COAP_FORMAT_SENSML_JSON
COAP_FORMAT_SENSML_XML
COAP_FORMAT_SNML_ETCH_CBOR
COAP_FORMAT_SNML_ETCH_JSON
COAP_FORMAT_SWID_CBOR
COAP_FORMAT_TD_JSON
COAP_FORMAT_TEXT
COAP_FORMAT_TEXT_CSS
COAP_FORMAT_TM_JSON
COAP_FORMAT_VND_OCF_CBOR
COAP_FORMAT_VND_OMA_LWM2M_CBOR
COAP_FORMAT_VND_OMA_LWM2M_JSON
COAP_FORMAT_VND_OMA_LWM2M_TLV
COAP_FORMAT_VOUCER_COSE_CBOR
COAP_FORMAT_XML
COAP_FORMAT_YAML_DATA_CBOR
COAP_FORMAT_YAML_DATA_CBOR_ID_NAME
COAP_FORMAT_YANG_DATA_CBOR_SID
COAP_GET
COAP_IGNORE
COAP_IPATCH
COAP_LINK_FLAG_INIT_RESLIST
COAP_MATCH_SUBTREE
COAP_NSTART
COAP_OBS_DEREGISTER
COAP_OBS_REGISTER
COAP_OPT_ACCEPT
COAP_OPT_BLOCK1
COAP_OPT_BLOCK2
COAP_OPT_CONTENT_FORMAT
COAP_OPT_ECHO
COAP_OPT_EDHOC
COAP_OPT_ETAG
COAP_OPT_FINISH_NONE
COAP_OPT_FINISH_PAYLOAD
COAP_OPT_HOP_LIMIT
COAP_OPT_IF_MATCH
COAP_OPT_IF_NONE_MATCH
COAP_OPT_LOCATION_PATH
COAP_OPT_LOCATION_QUERY
COAP_OPT_MAX_AGE
COAP_OPT_NO_RESPONSE
COAP_OPT_OBSERVE
COAP_OPT_OSCORE
COAP_OPT_PROXY_SCHEME
COAP_OPT_PROXY_URI
COAP_OPT_Q_BLOCK1
COAP_OPT_Q_BLOCK2
COAP_OPT_REQUEST_TAG
COAP_OPT_SIZE1
COAP_OPT_SIZE2
COAP_OPT_URI_HOST
COAP_OPT_URI_PATH
COAP_OPT_URI_QUERY
COAP_PATCH
COAP_PAYLOAD_MARKER
COAP_PORT
COAP_POST
COAP_PUT
COAP_TOKEN_LENGTH_MAX
COAP_TYPE_ACK
COAP_TYPE_CON
COAP_TYPE_NON
COAP_TYPE_RST
COAP_V1
COLL_WEIGHTS_MAX
COMP_COUNT
COMP_ENABLE_ENABLE_Disabled
COMP_ENABLE_ENABLE_Enabled
COMP_ENABLE_ENABLE_Msk
COMP_ENABLE_ENABLE_Pos
COMP_EVENTS_CROSS_EVENTS_CROSS_Generated
COMP_EVENTS_CROSS_EVENTS_CROSS_Msk
COMP_EVENTS_CROSS_EVENTS_CROSS_NotGenerated
COMP_EVENTS_CROSS_EVENTS_CROSS_Pos
COMP_EVENTS_DOWN_EVENTS_DOWN_Generated
COMP_EVENTS_DOWN_EVENTS_DOWN_Msk
COMP_EVENTS_DOWN_EVENTS_DOWN_NotGenerated
COMP_EVENTS_DOWN_EVENTS_DOWN_Pos
COMP_EVENTS_READY_EVENTS_READY_Generated
COMP_EVENTS_READY_EVENTS_READY_Msk
COMP_EVENTS_READY_EVENTS_READY_NotGenerated
COMP_EVENTS_READY_EVENTS_READY_Pos
COMP_EVENTS_UP_EVENTS_UP_Generated
COMP_EVENTS_UP_EVENTS_UP_Msk
COMP_EVENTS_UP_EVENTS_UP_NotGenerated
COMP_EVENTS_UP_EVENTS_UP_Pos
COMP_EXTREFSEL_EXTREFSEL_AnalogReference0
COMP_EXTREFSEL_EXTREFSEL_AnalogReference1
COMP_EXTREFSEL_EXTREFSEL_AnalogReference2
COMP_EXTREFSEL_EXTREFSEL_AnalogReference3
COMP_EXTREFSEL_EXTREFSEL_AnalogReference4
COMP_EXTREFSEL_EXTREFSEL_AnalogReference5
COMP_EXTREFSEL_EXTREFSEL_AnalogReference6
COMP_EXTREFSEL_EXTREFSEL_AnalogReference7
COMP_EXTREFSEL_EXTREFSEL_Msk
COMP_EXTREFSEL_EXTREFSEL_Pos
COMP_HYST_HYST_Hyst50mV
COMP_HYST_HYST_Msk
COMP_HYST_HYST_NoHyst
COMP_HYST_HYST_Pos
COMP_INTENCLR_CROSS_Clear
COMP_INTENCLR_CROSS_Disabled
COMP_INTENCLR_CROSS_Enabled
COMP_INTENCLR_CROSS_Msk
COMP_INTENCLR_CROSS_Pos
COMP_INTENCLR_DOWN_Clear
COMP_INTENCLR_DOWN_Disabled
COMP_INTENCLR_DOWN_Enabled
COMP_INTENCLR_DOWN_Msk
COMP_INTENCLR_DOWN_Pos
COMP_INTENCLR_READY_Clear
COMP_INTENCLR_READY_Disabled
COMP_INTENCLR_READY_Enabled
COMP_INTENCLR_READY_Msk
COMP_INTENCLR_READY_Pos
COMP_INTENCLR_UP_Clear
COMP_INTENCLR_UP_Disabled
COMP_INTENCLR_UP_Enabled
COMP_INTENCLR_UP_Msk
COMP_INTENCLR_UP_Pos
COMP_INTENSET_CROSS_Disabled
COMP_INTENSET_CROSS_Enabled
COMP_INTENSET_CROSS_Msk
COMP_INTENSET_CROSS_Pos
COMP_INTENSET_CROSS_Set
COMP_INTENSET_DOWN_Disabled
COMP_INTENSET_DOWN_Enabled
COMP_INTENSET_DOWN_Msk
COMP_INTENSET_DOWN_Pos
COMP_INTENSET_DOWN_Set
COMP_INTENSET_READY_Disabled
COMP_INTENSET_READY_Enabled
COMP_INTENSET_READY_Msk
COMP_INTENSET_READY_Pos
COMP_INTENSET_READY_Set
COMP_INTENSET_UP_Disabled
COMP_INTENSET_UP_Enabled
COMP_INTENSET_UP_Msk
COMP_INTENSET_UP_Pos
COMP_INTENSET_UP_Set
COMP_INTEN_CROSS_Disabled
COMP_INTEN_CROSS_Enabled
COMP_INTEN_CROSS_Msk
COMP_INTEN_CROSS_Pos
COMP_INTEN_DOWN_Disabled
COMP_INTEN_DOWN_Enabled
COMP_INTEN_DOWN_Msk
COMP_INTEN_DOWN_Pos
COMP_INTEN_READY_Disabled
COMP_INTEN_READY_Enabled
COMP_INTEN_READY_Msk
COMP_INTEN_READY_Pos
COMP_INTEN_UP_Disabled
COMP_INTEN_UP_Enabled
COMP_INTEN_UP_Msk
COMP_INTEN_UP_Pos
COMP_MODE_MAIN_Diff
COMP_MODE_MAIN_Msk
COMP_MODE_MAIN_Pos
COMP_MODE_MAIN_SE
COMP_MODE_SP_High
COMP_MODE_SP_Low
COMP_MODE_SP_Msk
COMP_MODE_SP_Normal
COMP_MODE_SP_Pos
COMP_PSEL_PSEL_AnalogInput0
COMP_PSEL_PSEL_AnalogInput1
COMP_PSEL_PSEL_AnalogInput2
COMP_PSEL_PSEL_AnalogInput3
COMP_PSEL_PSEL_AnalogInput4
COMP_PSEL_PSEL_AnalogInput5
COMP_PSEL_PSEL_AnalogInput6
COMP_PSEL_PSEL_AnalogInput7
COMP_PSEL_PSEL_Msk
COMP_PSEL_PSEL_Pos
COMP_REFSEL_REFSEL_ARef
COMP_REFSEL_REFSEL_Int1V2
COMP_REFSEL_REFSEL_Int1V8
COMP_REFSEL_REFSEL_Int2V4
COMP_REFSEL_REFSEL_Msk
COMP_REFSEL_REFSEL_Pos
COMP_REFSEL_REFSEL_VDD
COMP_RESULT_RESULT_Above
COMP_RESULT_RESULT_Below
COMP_RESULT_RESULT_Msk
COMP_RESULT_RESULT_Pos
COMP_SHORTS_CROSS_STOP_Disabled
COMP_SHORTS_CROSS_STOP_Enabled
COMP_SHORTS_CROSS_STOP_Msk
COMP_SHORTS_CROSS_STOP_Pos
COMP_SHORTS_DOWN_STOP_Disabled
COMP_SHORTS_DOWN_STOP_Enabled
COMP_SHORTS_DOWN_STOP_Msk
COMP_SHORTS_DOWN_STOP_Pos
COMP_SHORTS_READY_SAMPLE_Disabled
COMP_SHORTS_READY_SAMPLE_Enabled
COMP_SHORTS_READY_SAMPLE_Msk
COMP_SHORTS_READY_SAMPLE_Pos
COMP_SHORTS_READY_STOP_Disabled
COMP_SHORTS_READY_STOP_Enabled
COMP_SHORTS_READY_STOP_Msk
COMP_SHORTS_READY_STOP_Pos
COMP_SHORTS_UP_STOP_Disabled
COMP_SHORTS_UP_STOP_Enabled
COMP_SHORTS_UP_STOP_Msk
COMP_SHORTS_UP_STOP_Pos
COMP_TASKS_SAMPLE_TASKS_SAMPLE_Msk
COMP_TASKS_SAMPLE_TASKS_SAMPLE_Pos
COMP_TASKS_SAMPLE_TASKS_SAMPLE_Trigger
COMP_TASKS_START_TASKS_START_Msk
COMP_TASKS_START_TASKS_START_Pos
COMP_TASKS_START_TASKS_START_Trigger
COMP_TASKS_STOP_TASKS_STOP_Msk
COMP_TASKS_STOP_TASKS_STOP_Pos
COMP_TASKS_STOP_TASKS_STOP_Trigger
COMP_TH_THDOWN_Msk
COMP_TH_THDOWN_Pos
COMP_TH_THUP_Msk
COMP_TH_THUP_Pos
CONFIG_AUTO_INIT_ENABLE_DEBUG
CONFIG_COAP_ACK_TIMEOUT_MS
CONFIG_COAP_MAX_RETRANSMIT
CONFIG_COAP_RANDOM_FACTOR_1000
CONFIG_COAP_SEPARATE_RESPONSE_TIMEOUT_MS
CONFIG_CORE_REBOOT_ON_PANIC
CONFIG_DEBUG_IRQ_DISABLE_THRESHOLD
CONFIG_DHCPV6_CLIENT_ADDR_LEASE_MAX
CONFIG_DHCPV6_CLIENT_MUD_URL
CONFIG_DHCPV6_CLIENT_PFX_LEASE_MAX
CONFIG_GCOAPS_PORT
CONFIG_GCOAP_DTLS_HANDSHAKE_TIMEOUT_MSEC
CONFIG_GCOAP_DTLS_MINIMUM_AVAILABLE_SESSIONS
CONFIG_GCOAP_DTLS_MINIMUM_AVAILABLE_SESSIONS_TIMEOUT_MSEC
CONFIG_GCOAP_NON_TIMEOUT_MSEC
CONFIG_GCOAP_NO_AUTO_INIT
CONFIG_GCOAP_OBS_CLIENTS_MAX
CONFIG_GCOAP_OBS_NOTIFIERS_MAX
CONFIG_GCOAP_OBS_REGISTRATIONS_MAX
CONFIG_GCOAP_OBS_VALUE_WIDTH
CONFIG_GCOAP_PDU_BUF_SIZE
CONFIG_GCOAP_PORT
CONFIG_GCOAP_REQ_WAITING_MAX
CONFIG_GCOAP_RESEND_BUFS_MAX
CONFIG_GCOAP_TOKENLEN
CONFIG_GNRC_IPV6_EXT_FRAG_LIMITS_POOL_SIZE
CONFIG_GNRC_IPV6_EXT_FRAG_RBUF_SIZE
CONFIG_GNRC_IPV6_EXT_FRAG_RBUF_TIMEOUT_US
CONFIG_GNRC_IPV6_EXT_FRAG_SEND_SIZE
CONFIG_GNRC_IPV6_MSG_QUEUE_SIZE_EXP
CONFIG_GNRC_IPV6_NIB_6LBR
CONFIG_GNRC_IPV6_NIB_6LN
CONFIG_GNRC_IPV6_NIB_6LR
CONFIG_GNRC_IPV6_NIB_ADD_RIO_IN_LAST_RA
CONFIG_GNRC_IPV6_NIB_ADD_RIO_IN_RA
CONFIG_GNRC_IPV6_NIB_ADV_ROUTER
CONFIG_GNRC_IPV6_NIB_ARSM
CONFIG_GNRC_IPV6_NIB_DC
CONFIG_GNRC_IPV6_NIB_DEFAULT_ROUTER_NUMOF
CONFIG_GNRC_IPV6_NIB_DNS
CONFIG_GNRC_IPV6_NIB_L2ADDR_MAX_LEN
CONFIG_GNRC_IPV6_NIB_MULTIHOP_DAD
CONFIG_GNRC_IPV6_NIB_MULTIHOP_P6C
CONFIG_GNRC_IPV6_NIB_NBR_QUEUE_CAP
CONFIG_GNRC_IPV6_NIB_NO_RTR_SOL
CONFIG_GNRC_IPV6_NIB_NUMOF
CONFIG_GNRC_IPV6_NIB_OFFL_NUMOF
CONFIG_GNRC_IPV6_NIB_QUEUE_PKT
CONFIG_GNRC_IPV6_NIB_REACH_TIME_RESET
CONFIG_GNRC_IPV6_NIB_REDIRECT
CONFIG_GNRC_IPV6_NIB_ROUTER
CONFIG_GNRC_IPV6_NIB_SLAAC
CONFIG_GNRC_IPV6_STATIC_LLADDR_IS_FIXED
CONFIG_GNRC_IPV6_STATIC_LLADDR_NETDEV_MASK
CONFIG_GNRC_NETIF_DEFAULT_HL
CONFIG_GNRC_NETIF_IPV6_ADDRS_NUMOF
CONFIG_GNRC_NETIF_IPV6_BR_AUTO_6CTX
CONFIG_GNRC_NETIF_MIN_WAIT_AFTER_SEND_US
CONFIG_GNRC_NETIF_MSG_QUEUE_SIZE_EXP
CONFIG_GNRC_NETIF_NONSTANDARD_6LO_MTU
CONFIG_GNRC_NETIF_PKTQ_POOL_SIZE
CONFIG_GNRC_NETIF_PKTQ_TIMER_US
CONFIG_GNRC_PKTBUF_CHECK_USE_AFTER_FREE
CONFIG_GNRC_PKTBUF_SIZE
CONFIG_GNRC_SOCK_MBOX_SIZE_EXP
CONFIG_GNRC_TCP_CONNECTION_TIMEOUT_DURATION_MS
CONFIG_GNRC_TCP_DEFAULT_WINDOW
CONFIG_GNRC_TCP_EVENTLOOP_MSG_QUEUE_SIZE_EXP
CONFIG_GNRC_TCP_EXPERIMENTAL_DYN_MSL_EN
CONFIG_GNRC_TCP_EXPERIMENTAL_DYN_MSL_RTO_MUL
CONFIG_GNRC_TCP_MSG_QUEUE_SIZE_EXP
CONFIG_GNRC_TCP_MSL_MS
CONFIG_GNRC_TCP_MSS
CONFIG_GNRC_TCP_MSS_MULTIPLICATOR
CONFIG_GNRC_TCP_PROBE_LOWER_BOUND_MS
CONFIG_GNRC_TCP_PROBE_UPPER_BOUND_MS
CONFIG_GNRC_TCP_RCV_BUFFERS
CONFIG_GNRC_TCP_RTO_A_DIV
CONFIG_GNRC_TCP_RTO_B_DIV
CONFIG_GNRC_TCP_RTO_GRANULARITY_MS
CONFIG_GNRC_TCP_RTO_K
CONFIG_GNRC_TCP_RTO_LOWER_BOUND_MS
CONFIG_GNRC_TCP_RTO_UPPER_BOUND_MS
CONFIG_GNRC_UDP_MSG_QUEUE_SIZE_EXP
CONFIG_IEEE802154_CCA_THRESH_DEFAULT
CONFIG_IEEE802154_DEFAULT_ACK_REQ
CONFIG_IEEE802154_DEFAULT_CHANNEL
CONFIG_IEEE802154_DEFAULT_CSMA_CA_MAX_BE
CONFIG_IEEE802154_DEFAULT_CSMA_CA_MIN_BE
CONFIG_IEEE802154_DEFAULT_CSMA_CA_RETRIES
CONFIG_IEEE802154_DEFAULT_MAX_FRAME_RETRANS
CONFIG_IEEE802154_DEFAULT_PANID
CONFIG_IEEE802154_DEFAULT_SUBGHZ_CHANNEL
CONFIG_IEEE802154_DEFAULT_SUBGHZ_PAGE
CONFIG_IEEE802154_DEFAULT_TXPOWER
CONFIG_IEEE802154_DSME_BEACON_ORDER
CONFIG_IEEE802154_DSME_CAP_REDUCTION
CONFIG_IEEE802154_DSME_GTS_EXPIRATION
CONFIG_IEEE802154_DSME_MAC_RESPONSE_WAIT_TIME
CONFIG_IEEE802154_DSME_MIN_COORD_LQI
CONFIG_IEEE802154_DSME_MULTISUPERFRAME_ORDER
CONFIG_IEEE802154_DSME_SCAN_DURATION
CONFIG_IEEE802154_DSME_SUPERFRAME_ORDER
CONFIG_MSG_QUEUE_PRINT_MAX
CONFIG_NANOCOAP_BLOCK_HEADER_MAX
CONFIG_NANOCOAP_BLOCK_SIZE_EXP_MAX
CONFIG_NANOCOAP_CACHE_ENTRIES
CONFIG_NANOCOAP_CACHE_KEY_LENGTH
CONFIG_NANOCOAP_CACHE_RESPONSE_SIZE
CONFIG_NANOCOAP_NOPTS_MAX
CONFIG_NANOCOAP_QS_MAX
CONFIG_NANOCOAP_SERVER_STACK_SIZE
CONFIG_NANOCOAP_SOCK_BLOCK_TOKEN
CONFIG_NANOCOAP_SOCK_DTLS_TAG
CONFIG_NANOCOAP_URI_MAX
CONFIG_NETIF_NAMELENMAX
CONFIG_SHELL_NO_ECHO
CONFIG_SHELL_NO_PROMPT
CONFIG_SHELL_SHUTDOWN_ON_EXIT
CONFIG_SOCK_DTLS_RETRIES
CONFIG_SOCK_DTLS_TIMEOUT_MS
CONFIG_SOCK_HOSTPORT_MAXLEN
CONFIG_SOCK_SCHEME_MAXLEN
CONFIG_SOCK_URLPATH_MAXLEN
CONFIG_SPI_DMA_THRESHOLD_BYTES
CONFIG_SPI_MBUF_SIZE
CONFIG_SUIT_COMPONENT_MAX
CONFIG_SUIT_COMPONENT_MAX_NAME_LEN
CONFIG_UART_DMA_THRESHOLD_BYTES
CONTROL_FPCA_Msk
CONTROL_FPCA_Pos
CONTROL_SPSEL_Msk
CONTROL_SPSEL_Pos
CONTROL_nPRIV_Msk
CONTROL_nPRIV_Pos
CORTEXM_SCB_CPACR_FPU_ACCESS_FULL
COSE_FLAGS_DECODE
COSE_FLAGS_ENCODE
COSE_FLAGS_ENCRYPT0
COSE_FLAGS_EXTDATA
COSE_FLAGS_SIGN1
COSE_FLAGS_UNTAGGED
COSE_HDR_FLAGS_PROTECTED
COSE_HDR_FLAGS_UNPROTECTED
COSE_HDR_MAX
COSE_MSGSIZE_MAX
COSE_RECIPIENTS_MAX
COSE_SIGNATURES_MAX
CPUID_LEN
CPU_CORE_CORTEX_M4F
CPU_CORTEXM_PRIORITY_GROUPING
CPU_DEFAULT_IRQ_PRIO
CPU_FAM_NRF52
CPU_FLASH_BASE
CPU_IRQ_NUMOF
CPU_MODEL_NRF52840XXAA
CPU_NRF52
CPU_RAM_BASE
CPU_RAM_SIZE
CRYPTOCELL_COUNT
CRYPTOCELL_ENABLE_ENABLE_Disabled
CRYPTOCELL_ENABLE_ENABLE_Enabled
CRYPTOCELL_ENABLE_ENABLE_Msk
CRYPTOCELL_ENABLE_ENABLE_Pos
CRYPTO_C25519
CS_PER_SEC
CoreDebug_BASE
CoreDebug_DCRSR_REGSEL_Msk
CoreDebug_DCRSR_REGSEL_Pos
CoreDebug_DCRSR_REGWnR_Msk
CoreDebug_DCRSR_REGWnR_Pos
CoreDebug_DEMCR_MON_EN_Msk
CoreDebug_DEMCR_MON_EN_Pos
CoreDebug_DEMCR_MON_PEND_Msk
CoreDebug_DEMCR_MON_PEND_Pos
CoreDebug_DEMCR_MON_REQ_Msk
CoreDebug_DEMCR_MON_REQ_Pos
CoreDebug_DEMCR_MON_STEP_Msk
CoreDebug_DEMCR_MON_STEP_Pos
CoreDebug_DEMCR_TRCENA_Msk
CoreDebug_DEMCR_TRCENA_Pos
CoreDebug_DEMCR_VC_BUSERR_Msk
CoreDebug_DEMCR_VC_BUSERR_Pos
CoreDebug_DEMCR_VC_CHKERR_Msk
CoreDebug_DEMCR_VC_CHKERR_Pos
CoreDebug_DEMCR_VC_CORERESET_Msk
CoreDebug_DEMCR_VC_CORERESET_Pos
CoreDebug_DEMCR_VC_HARDERR_Msk
CoreDebug_DEMCR_VC_HARDERR_Pos
CoreDebug_DEMCR_VC_INTERR_Msk
CoreDebug_DEMCR_VC_INTERR_Pos
CoreDebug_DEMCR_VC_MMERR_Msk
CoreDebug_DEMCR_VC_MMERR_Pos
CoreDebug_DEMCR_VC_NOCPERR_Msk
CoreDebug_DEMCR_VC_NOCPERR_Pos
CoreDebug_DEMCR_VC_STATERR_Msk
CoreDebug_DEMCR_VC_STATERR_Pos
CoreDebug_DHCSR_C_DEBUGEN_Msk
CoreDebug_DHCSR_C_DEBUGEN_Pos
CoreDebug_DHCSR_C_HALT_Msk
CoreDebug_DHCSR_C_HALT_Pos
CoreDebug_DHCSR_C_MASKINTS_Msk
CoreDebug_DHCSR_C_MASKINTS_Pos
CoreDebug_DHCSR_C_SNAPSTALL_Msk
CoreDebug_DHCSR_C_SNAPSTALL_Pos
CoreDebug_DHCSR_C_STEP_Msk
CoreDebug_DHCSR_C_STEP_Pos
CoreDebug_DHCSR_DBGKEY_Msk
CoreDebug_DHCSR_DBGKEY_Pos
CoreDebug_DHCSR_S_HALT_Msk
CoreDebug_DHCSR_S_HALT_Pos
CoreDebug_DHCSR_S_LOCKUP_Msk
CoreDebug_DHCSR_S_LOCKUP_Pos
CoreDebug_DHCSR_S_REGRDY_Msk
CoreDebug_DHCSR_S_REGRDY_Pos
CoreDebug_DHCSR_S_RESET_ST_Msk
CoreDebug_DHCSR_S_RESET_ST_Pos
CoreDebug_DHCSR_S_RETIRE_ST_Msk
CoreDebug_DHCSR_S_RETIRE_ST_Pos
CoreDebug_DHCSR_S_SLEEP_Msk
CoreDebug_DHCSR_S_SLEEP_Pos
DEBUG_ASSERT_NO_PANIC
DEVELHELP
DHCPV6_CLIENT_ADDRS_NUMOF
DHCPV6_CLIENT_BUFLEN
DHCPV6_CLIENT_CONF_MODE_INACTIVE
DHCPV6_CLIENT_CONF_MODE_STATEFUL
DHCPV6_CLIENT_CONF_MODE_STATELESS
DHCPV6_CLIENT_PRIORITY
DHCPV6_CLIENT_SEND_BUFLEN
DHCPV6_CLIENT_STACK_SIZE
DWT_BASE
DWT_CPICNT_CPICNT_Msk
DWT_CPICNT_CPICNT_Pos
DWT_CTRL_CPIEVTENA_Msk
DWT_CTRL_CPIEVTENA_Pos
DWT_CTRL_CYCCNTENA_Msk
DWT_CTRL_CYCCNTENA_Pos
DWT_CTRL_CYCEVTENA_Msk
DWT_CTRL_CYCEVTENA_Pos
DWT_CTRL_CYCTAP_Msk
DWT_CTRL_CYCTAP_Pos
DWT_CTRL_EXCEVTENA_Msk
DWT_CTRL_EXCEVTENA_Pos
DWT_CTRL_EXCTRCENA_Msk
DWT_CTRL_EXCTRCENA_Pos
DWT_CTRL_FOLDEVTENA_Msk
DWT_CTRL_FOLDEVTENA_Pos
DWT_CTRL_LSUEVTENA_Msk
DWT_CTRL_LSUEVTENA_Pos
DWT_CTRL_NOCYCCNT_Msk
DWT_CTRL_NOCYCCNT_Pos
DWT_CTRL_NOEXTTRIG_Msk
DWT_CTRL_NOEXTTRIG_Pos
DWT_CTRL_NOPRFCNT_Msk
DWT_CTRL_NOPRFCNT_Pos
DWT_CTRL_NOTRCPKT_Msk
DWT_CTRL_NOTRCPKT_Pos
DWT_CTRL_NUMCOMP_Msk
DWT_CTRL_NUMCOMP_Pos
DWT_CTRL_PCSAMPLENA_Msk
DWT_CTRL_PCSAMPLENA_Pos
DWT_CTRL_POSTINIT_Msk
DWT_CTRL_POSTINIT_Pos
DWT_CTRL_POSTPRESET_Msk
DWT_CTRL_POSTPRESET_Pos
DWT_CTRL_SLEEPEVTENA_Msk
DWT_CTRL_SLEEPEVTENA_Pos
DWT_CTRL_SYNCTAP_Msk
DWT_CTRL_SYNCTAP_Pos
DWT_EXCCNT_EXCCNT_Msk
DWT_EXCCNT_EXCCNT_Pos
DWT_FOLDCNT_FOLDCNT_Msk
DWT_FOLDCNT_FOLDCNT_Pos
DWT_FUNCTION_CYCMATCH_Msk
DWT_FUNCTION_CYCMATCH_Pos
DWT_FUNCTION_DATAVADDR0_Msk
DWT_FUNCTION_DATAVADDR0_Pos
DWT_FUNCTION_DATAVADDR1_Msk
DWT_FUNCTION_DATAVADDR1_Pos
DWT_FUNCTION_DATAVMATCH_Msk
DWT_FUNCTION_DATAVMATCH_Pos
DWT_FUNCTION_DATAVSIZE_Msk
DWT_FUNCTION_DATAVSIZE_Pos
DWT_FUNCTION_EMITRANGE_Msk
DWT_FUNCTION_EMITRANGE_Pos
DWT_FUNCTION_FUNCTION_Msk
DWT_FUNCTION_FUNCTION_Pos
DWT_FUNCTION_LNK1ENA_Msk
DWT_FUNCTION_LNK1ENA_Pos
DWT_FUNCTION_MATCHED_Msk
DWT_FUNCTION_MATCHED_Pos
DWT_LSUCNT_LSUCNT_Msk
DWT_LSUCNT_LSUCNT_Pos
DWT_MASK_MASK_Msk
DWT_MASK_MASK_Pos
DWT_SLEEPCNT_SLEEPCNT_Msk
DWT_SLEEPCNT_SLEEPCNT_Pos
E2BIG
EACCES
EADDRINUSE
EADDRNOTAVAIL
EAFNOSUPPORT
EAGAIN
EALREADY
EBADF
EBADMSG
EBUSY
ECANCELED
ECB_COUNT
ECB_ECBDATAPTR_ECBDATAPTR_Msk
ECB_ECBDATAPTR_ECBDATAPTR_Pos
ECB_EVENTS_ENDECB_EVENTS_ENDECB_Generated
ECB_EVENTS_ENDECB_EVENTS_ENDECB_Msk
ECB_EVENTS_ENDECB_EVENTS_ENDECB_NotGenerated
ECB_EVENTS_ENDECB_EVENTS_ENDECB_Pos
ECB_EVENTS_ERRORECB_EVENTS_ERRORECB_Generated
ECB_EVENTS_ERRORECB_EVENTS_ERRORECB_Msk
ECB_EVENTS_ERRORECB_EVENTS_ERRORECB_NotGenerated
ECB_EVENTS_ERRORECB_EVENTS_ERRORECB_Pos
ECB_INTENCLR_ENDECB_Clear
ECB_INTENCLR_ENDECB_Disabled
ECB_INTENCLR_ENDECB_Enabled
ECB_INTENCLR_ENDECB_Msk
ECB_INTENCLR_ENDECB_Pos
ECB_INTENCLR_ERRORECB_Clear
ECB_INTENCLR_ERRORECB_Disabled
ECB_INTENCLR_ERRORECB_Enabled
ECB_INTENCLR_ERRORECB_Msk
ECB_INTENCLR_ERRORECB_Pos
ECB_INTENSET_ENDECB_Disabled
ECB_INTENSET_ENDECB_Enabled
ECB_INTENSET_ENDECB_Msk
ECB_INTENSET_ENDECB_Pos
ECB_INTENSET_ENDECB_Set
ECB_INTENSET_ERRORECB_Disabled
ECB_INTENSET_ERRORECB_Enabled
ECB_INTENSET_ERRORECB_Msk
ECB_INTENSET_ERRORECB_Pos
ECB_INTENSET_ERRORECB_Set
ECB_TASKS_STARTECB_TASKS_STARTECB_Msk
ECB_TASKS_STARTECB_TASKS_STARTECB_Pos
ECB_TASKS_STARTECB_TASKS_STARTECB_Trigger
ECB_TASKS_STOPECB_TASKS_STOPECB_Msk
ECB_TASKS_STOPECB_TASKS_STOPECB_Pos
ECB_TASKS_STOPECB_TASKS_STOPECB_Trigger
ECHILD
ECONNABORTED
ECONNREFUSED
ECONNRESET
EDEADLK
EDESTADDRREQ
EDOM
EDQUOT
EEXIST
EFAULT
EFBIG
EFTYPE
EGU0_CH_NUM
EGU1_CH_NUM
EGU2_CH_NUM
EGU3_CH_NUM
EGU4_CH_NUM
EGU5_CH_NUM
EGU_COUNT
EGU_EVENTS_TRIGGERED_EVENTS_TRIGGERED_Generated
EGU_EVENTS_TRIGGERED_EVENTS_TRIGGERED_Msk
EGU_EVENTS_TRIGGERED_EVENTS_TRIGGERED_NotGenerated
EGU_EVENTS_TRIGGERED_EVENTS_TRIGGERED_Pos
EGU_INTENCLR_TRIGGERED0_Clear
EGU_INTENCLR_TRIGGERED0_Disabled
EGU_INTENCLR_TRIGGERED0_Enabled
EGU_INTENCLR_TRIGGERED0_Msk
EGU_INTENCLR_TRIGGERED0_Pos
EGU_INTENCLR_TRIGGERED10_Clear
EGU_INTENCLR_TRIGGERED10_Disabled
EGU_INTENCLR_TRIGGERED10_Enabled
EGU_INTENCLR_TRIGGERED10_Msk
EGU_INTENCLR_TRIGGERED10_Pos
EGU_INTENCLR_TRIGGERED11_Clear
EGU_INTENCLR_TRIGGERED11_Disabled
EGU_INTENCLR_TRIGGERED11_Enabled
EGU_INTENCLR_TRIGGERED11_Msk
EGU_INTENCLR_TRIGGERED11_Pos
EGU_INTENCLR_TRIGGERED12_Clear
EGU_INTENCLR_TRIGGERED12_Disabled
EGU_INTENCLR_TRIGGERED12_Enabled
EGU_INTENCLR_TRIGGERED12_Msk
EGU_INTENCLR_TRIGGERED12_Pos
EGU_INTENCLR_TRIGGERED13_Clear
EGU_INTENCLR_TRIGGERED13_Disabled
EGU_INTENCLR_TRIGGERED13_Enabled
EGU_INTENCLR_TRIGGERED13_Msk
EGU_INTENCLR_TRIGGERED13_Pos
EGU_INTENCLR_TRIGGERED14_Clear
EGU_INTENCLR_TRIGGERED14_Disabled
EGU_INTENCLR_TRIGGERED14_Enabled
EGU_INTENCLR_TRIGGERED14_Msk
EGU_INTENCLR_TRIGGERED14_Pos
EGU_INTENCLR_TRIGGERED15_Clear
EGU_INTENCLR_TRIGGERED15_Disabled
EGU_INTENCLR_TRIGGERED15_Enabled
EGU_INTENCLR_TRIGGERED15_Msk
EGU_INTENCLR_TRIGGERED15_Pos
EGU_INTENCLR_TRIGGERED1_Clear
EGU_INTENCLR_TRIGGERED1_Disabled
EGU_INTENCLR_TRIGGERED1_Enabled
EGU_INTENCLR_TRIGGERED1_Msk
EGU_INTENCLR_TRIGGERED1_Pos
EGU_INTENCLR_TRIGGERED2_Clear
EGU_INTENCLR_TRIGGERED2_Disabled
EGU_INTENCLR_TRIGGERED2_Enabled
EGU_INTENCLR_TRIGGERED2_Msk
EGU_INTENCLR_TRIGGERED2_Pos
EGU_INTENCLR_TRIGGERED3_Clear
EGU_INTENCLR_TRIGGERED3_Disabled
EGU_INTENCLR_TRIGGERED3_Enabled
EGU_INTENCLR_TRIGGERED3_Msk
EGU_INTENCLR_TRIGGERED3_Pos
EGU_INTENCLR_TRIGGERED4_Clear
EGU_INTENCLR_TRIGGERED4_Disabled
EGU_INTENCLR_TRIGGERED4_Enabled
EGU_INTENCLR_TRIGGERED4_Msk
EGU_INTENCLR_TRIGGERED4_Pos
EGU_INTENCLR_TRIGGERED5_Clear
EGU_INTENCLR_TRIGGERED5_Disabled
EGU_INTENCLR_TRIGGERED5_Enabled
EGU_INTENCLR_TRIGGERED5_Msk
EGU_INTENCLR_TRIGGERED5_Pos
EGU_INTENCLR_TRIGGERED6_Clear
EGU_INTENCLR_TRIGGERED6_Disabled
EGU_INTENCLR_TRIGGERED6_Enabled
EGU_INTENCLR_TRIGGERED6_Msk
EGU_INTENCLR_TRIGGERED6_Pos
EGU_INTENCLR_TRIGGERED7_Clear
EGU_INTENCLR_TRIGGERED7_Disabled
EGU_INTENCLR_TRIGGERED7_Enabled
EGU_INTENCLR_TRIGGERED7_Msk
EGU_INTENCLR_TRIGGERED7_Pos
EGU_INTENCLR_TRIGGERED8_Clear
EGU_INTENCLR_TRIGGERED8_Disabled
EGU_INTENCLR_TRIGGERED8_Enabled
EGU_INTENCLR_TRIGGERED8_Msk
EGU_INTENCLR_TRIGGERED8_Pos
EGU_INTENCLR_TRIGGERED9_Clear
EGU_INTENCLR_TRIGGERED9_Disabled
EGU_INTENCLR_TRIGGERED9_Enabled
EGU_INTENCLR_TRIGGERED9_Msk
EGU_INTENCLR_TRIGGERED9_Pos
EGU_INTENSET_TRIGGERED0_Disabled
EGU_INTENSET_TRIGGERED0_Enabled
EGU_INTENSET_TRIGGERED0_Msk
EGU_INTENSET_TRIGGERED0_Pos
EGU_INTENSET_TRIGGERED0_Set
EGU_INTENSET_TRIGGERED10_Disabled
EGU_INTENSET_TRIGGERED10_Enabled
EGU_INTENSET_TRIGGERED10_Msk
EGU_INTENSET_TRIGGERED10_Pos
EGU_INTENSET_TRIGGERED10_Set
EGU_INTENSET_TRIGGERED11_Disabled
EGU_INTENSET_TRIGGERED11_Enabled
EGU_INTENSET_TRIGGERED11_Msk
EGU_INTENSET_TRIGGERED11_Pos
EGU_INTENSET_TRIGGERED11_Set
EGU_INTENSET_TRIGGERED12_Disabled
EGU_INTENSET_TRIGGERED12_Enabled
EGU_INTENSET_TRIGGERED12_Msk
EGU_INTENSET_TRIGGERED12_Pos
EGU_INTENSET_TRIGGERED12_Set
EGU_INTENSET_TRIGGERED13_Disabled
EGU_INTENSET_TRIGGERED13_Enabled
EGU_INTENSET_TRIGGERED13_Msk
EGU_INTENSET_TRIGGERED13_Pos
EGU_INTENSET_TRIGGERED13_Set
EGU_INTENSET_TRIGGERED14_Disabled
EGU_INTENSET_TRIGGERED14_Enabled
EGU_INTENSET_TRIGGERED14_Msk
EGU_INTENSET_TRIGGERED14_Pos
EGU_INTENSET_TRIGGERED14_Set
EGU_INTENSET_TRIGGERED15_Disabled
EGU_INTENSET_TRIGGERED15_Enabled
EGU_INTENSET_TRIGGERED15_Msk
EGU_INTENSET_TRIGGERED15_Pos
EGU_INTENSET_TRIGGERED15_Set
EGU_INTENSET_TRIGGERED1_Disabled
EGU_INTENSET_TRIGGERED1_Enabled
EGU_INTENSET_TRIGGERED1_Msk
EGU_INTENSET_TRIGGERED1_Pos
EGU_INTENSET_TRIGGERED1_Set
EGU_INTENSET_TRIGGERED2_Disabled
EGU_INTENSET_TRIGGERED2_Enabled
EGU_INTENSET_TRIGGERED2_Msk
EGU_INTENSET_TRIGGERED2_Pos
EGU_INTENSET_TRIGGERED2_Set
EGU_INTENSET_TRIGGERED3_Disabled
EGU_INTENSET_TRIGGERED3_Enabled
EGU_INTENSET_TRIGGERED3_Msk
EGU_INTENSET_TRIGGERED3_Pos
EGU_INTENSET_TRIGGERED3_Set
EGU_INTENSET_TRIGGERED4_Disabled
EGU_INTENSET_TRIGGERED4_Enabled
EGU_INTENSET_TRIGGERED4_Msk
EGU_INTENSET_TRIGGERED4_Pos
EGU_INTENSET_TRIGGERED4_Set
EGU_INTENSET_TRIGGERED5_Disabled
EGU_INTENSET_TRIGGERED5_Enabled
EGU_INTENSET_TRIGGERED5_Msk
EGU_INTENSET_TRIGGERED5_Pos
EGU_INTENSET_TRIGGERED5_Set
EGU_INTENSET_TRIGGERED6_Disabled
EGU_INTENSET_TRIGGERED6_Enabled
EGU_INTENSET_TRIGGERED6_Msk
EGU_INTENSET_TRIGGERED6_Pos
EGU_INTENSET_TRIGGERED6_Set
EGU_INTENSET_TRIGGERED7_Disabled
EGU_INTENSET_TRIGGERED7_Enabled
EGU_INTENSET_TRIGGERED7_Msk
EGU_INTENSET_TRIGGERED7_Pos
EGU_INTENSET_TRIGGERED7_Set
EGU_INTENSET_TRIGGERED8_Disabled
EGU_INTENSET_TRIGGERED8_Enabled
EGU_INTENSET_TRIGGERED8_Msk
EGU_INTENSET_TRIGGERED8_Pos
EGU_INTENSET_TRIGGERED8_Set
EGU_INTENSET_TRIGGERED9_Disabled
EGU_INTENSET_TRIGGERED9_Enabled
EGU_INTENSET_TRIGGERED9_Msk
EGU_INTENSET_TRIGGERED9_Pos
EGU_INTENSET_TRIGGERED9_Set
EGU_INTEN_TRIGGERED0_Disabled
EGU_INTEN_TRIGGERED0_Enabled
EGU_INTEN_TRIGGERED0_Msk
EGU_INTEN_TRIGGERED0_Pos
EGU_INTEN_TRIGGERED10_Disabled
EGU_INTEN_TRIGGERED10_Enabled
EGU_INTEN_TRIGGERED10_Msk
EGU_INTEN_TRIGGERED10_Pos
EGU_INTEN_TRIGGERED11_Disabled
EGU_INTEN_TRIGGERED11_Enabled
EGU_INTEN_TRIGGERED11_Msk
EGU_INTEN_TRIGGERED11_Pos
EGU_INTEN_TRIGGERED12_Disabled
EGU_INTEN_TRIGGERED12_Enabled
EGU_INTEN_TRIGGERED12_Msk
EGU_INTEN_TRIGGERED12_Pos
EGU_INTEN_TRIGGERED13_Disabled
EGU_INTEN_TRIGGERED13_Enabled
EGU_INTEN_TRIGGERED13_Msk
EGU_INTEN_TRIGGERED13_Pos
EGU_INTEN_TRIGGERED14_Disabled
EGU_INTEN_TRIGGERED14_Enabled
EGU_INTEN_TRIGGERED14_Msk
EGU_INTEN_TRIGGERED14_Pos
EGU_INTEN_TRIGGERED15_Disabled
EGU_INTEN_TRIGGERED15_Enabled
EGU_INTEN_TRIGGERED15_Msk
EGU_INTEN_TRIGGERED15_Pos
EGU_INTEN_TRIGGERED1_Disabled
EGU_INTEN_TRIGGERED1_Enabled
EGU_INTEN_TRIGGERED1_Msk
EGU_INTEN_TRIGGERED1_Pos
EGU_INTEN_TRIGGERED2_Disabled
EGU_INTEN_TRIGGERED2_Enabled
EGU_INTEN_TRIGGERED2_Msk
EGU_INTEN_TRIGGERED2_Pos
EGU_INTEN_TRIGGERED3_Disabled
EGU_INTEN_TRIGGERED3_Enabled
EGU_INTEN_TRIGGERED3_Msk
EGU_INTEN_TRIGGERED3_Pos
EGU_INTEN_TRIGGERED4_Disabled
EGU_INTEN_TRIGGERED4_Enabled
EGU_INTEN_TRIGGERED4_Msk
EGU_INTEN_TRIGGERED4_Pos
EGU_INTEN_TRIGGERED5_Disabled
EGU_INTEN_TRIGGERED5_Enabled
EGU_INTEN_TRIGGERED5_Msk
EGU_INTEN_TRIGGERED5_Pos
EGU_INTEN_TRIGGERED6_Disabled
EGU_INTEN_TRIGGERED6_Enabled
EGU_INTEN_TRIGGERED6_Msk
EGU_INTEN_TRIGGERED6_Pos
EGU_INTEN_TRIGGERED7_Disabled
EGU_INTEN_TRIGGERED7_Enabled
EGU_INTEN_TRIGGERED7_Msk
EGU_INTEN_TRIGGERED7_Pos
EGU_INTEN_TRIGGERED8_Disabled
EGU_INTEN_TRIGGERED8_Enabled
EGU_INTEN_TRIGGERED8_Msk
EGU_INTEN_TRIGGERED8_Pos
EGU_INTEN_TRIGGERED9_Disabled
EGU_INTEN_TRIGGERED9_Enabled
EGU_INTEN_TRIGGERED9_Msk
EGU_INTEN_TRIGGERED9_Pos
EGU_TASKS_TRIGGER_TASKS_TRIGGER_Msk
EGU_TASKS_TRIGGER_TASKS_TRIGGER_Pos
EGU_TASKS_TRIGGER_TASKS_TRIGGER_Trigger
EHOSTDOWN
EHOSTUNREACH
EIDRM
EILSEQ
EINPROGRESS
EINTR
EINVAL
EIO
EISCONN
EISDIR
ELOOP
EMFILE
EMLINK
EMSGSIZE
EMULTIHOP
ENAMETOOLONG
ENETDOWN
ENETRESET
ENETUNREACH
ENFILE
ENOBUFS
ENODATA
ENODEV
ENOENT
ENOEXEC
ENOLCK
ENOLINK
ENOMEM
ENOMSG
ENOPROTOOPT
ENOSPC
ENOSR
ENOSTR
ENOSYS
ENOTCONN
ENOTDIR
ENOTEMPTY
ENOTRECOVERABLE
ENOTSOCK
ENOTSUP
ENOTTY
ENXIO
EOF
EOPNOTSUPP
EOVERFLOW
EOWNERDEAD
EPERM
EPFNOSUPPORT
EPIPE
EPROTO
EPROTONOSUPPORT
EPROTOTYPE
ERANGE
EROFS
ESPIPE
ESRCH
ESTALE
ETHERNET_ADDR_LEN
ETHERTYPE_6LOENC
ETHERTYPE_ARP
ETHERTYPE_CCNX
ETHERTYPE_CUSTOM
ETHERTYPE_IPV4
ETHERTYPE_IPV6
ETHERTYPE_NDN
ETHERTYPE_RESERVED
ETHERTYPE_UNKNOWN
ETH_ALEN
ETIME
ETIMEDOUT
ETOOMANYREFS
ETXTBSY
EUI64_GROUP_FLAG
EUI64_LOCAL_FLAG
EWOULDBLOCK
EXC_RETURN_HANDLER
EXC_RETURN_HANDLER_FPU
EXC_RETURN_THREAD_MSP
EXC_RETURN_THREAD_MSP_FPU
EXC_RETURN_THREAD_PSP
EXC_RETURN_THREAD_PSP_FPU
EXDEV
EXIT_FAILURE
EXIT_SUCCESS
EXPR_NEST_MAX
FATFS_VFS_DIR_BUFFER_SIZE
FATFS_VFS_FILE_BUFFER_SIZE
FD_CLOEXEC
FICR_CODEPAGESIZE_CODEPAGESIZE_Msk
FICR_CODEPAGESIZE_CODEPAGESIZE_Pos
FICR_CODESIZE_CODESIZE_Msk
FICR_CODESIZE_CODESIZE_Pos
FICR_DEVICEADDRTYPE_DEVICEADDRTYPE_Msk
FICR_DEVICEADDRTYPE_DEVICEADDRTYPE_Pos
FICR_DEVICEADDRTYPE_DEVICEADDRTYPE_Public
FICR_DEVICEADDRTYPE_DEVICEADDRTYPE_Random
FICR_DEVICEADDR_DEVICEADDR_Msk
FICR_DEVICEADDR_DEVICEADDR_Pos
FICR_DEVICEID_DEVICEID_Msk
FICR_DEVICEID_DEVICEID_Pos
FICR_ER_ER_Msk
FICR_ER_ER_Pos
FICR_INFO_FLASH_FLASH_K1024
FICR_INFO_FLASH_FLASH_K128
FICR_INFO_FLASH_FLASH_K2048
FICR_INFO_FLASH_FLASH_K256
FICR_INFO_FLASH_FLASH_K512
FICR_INFO_FLASH_FLASH_Msk
FICR_INFO_FLASH_FLASH_Pos
FICR_INFO_FLASH_FLASH_Unspecified
FICR_INFO_PACKAGE_PACKAGE_CK
FICR_INFO_PACKAGE_PACKAGE_Msk
FICR_INFO_PACKAGE_PACKAGE_Pos
FICR_INFO_PACKAGE_PACKAGE_QI
FICR_INFO_PACKAGE_PACKAGE_Unspecified
FICR_INFO_PART_PART_Msk
FICR_INFO_PART_PART_N52833
FICR_INFO_PART_PART_N52840
FICR_INFO_PART_PART_Pos
FICR_INFO_PART_PART_Unspecified
FICR_INFO_RAM_RAM_K128
FICR_INFO_RAM_RAM_K16
FICR_INFO_RAM_RAM_K256
FICR_INFO_RAM_RAM_K32
FICR_INFO_RAM_RAM_K64
FICR_INFO_RAM_RAM_Msk
FICR_INFO_RAM_RAM_Pos
FICR_INFO_RAM_RAM_Unspecified
FICR_INFO_VARIANT_VARIANT_AAAA
FICR_INFO_VARIANT_VARIANT_AAAB
FICR_INFO_VARIANT_VARIANT_AABA
FICR_INFO_VARIANT_VARIANT_AABB
FICR_INFO_VARIANT_VARIANT_AACA
FICR_INFO_VARIANT_VARIANT_BAAA
FICR_INFO_VARIANT_VARIANT_CAAA
FICR_INFO_VARIANT_VARIANT_Msk
FICR_INFO_VARIANT_VARIANT_Pos
FICR_INFO_VARIANT_VARIANT_Unspecified
FICR_IR_IR_Msk
FICR_IR_IR_Pos
FICR_NFC_TAGHEADER0_MFGID_Msk
FICR_NFC_TAGHEADER0_MFGID_Pos
FICR_NFC_TAGHEADER0_UD1_Msk
FICR_NFC_TAGHEADER0_UD1_Pos
FICR_NFC_TAGHEADER0_UD2_Msk
FICR_NFC_TAGHEADER0_UD2_Pos
FICR_NFC_TAGHEADER0_UD3_Msk
FICR_NFC_TAGHEADER0_UD3_Pos
FICR_NFC_TAGHEADER1_UD4_Msk
FICR_NFC_TAGHEADER1_UD4_Pos
FICR_NFC_TAGHEADER1_UD5_Msk
FICR_NFC_TAGHEADER1_UD5_Pos
FICR_NFC_TAGHEADER1_UD6_Msk
FICR_NFC_TAGHEADER1_UD6_Pos
FICR_NFC_TAGHEADER1_UD7_Msk
FICR_NFC_TAGHEADER1_UD7_Pos
FICR_NFC_TAGHEADER2_UD10_Msk
FICR_NFC_TAGHEADER2_UD10_Pos
FICR_NFC_TAGHEADER2_UD11_Msk
FICR_NFC_TAGHEADER2_UD11_Pos
FICR_NFC_TAGHEADER2_UD8_Msk
FICR_NFC_TAGHEADER2_UD8_Pos
FICR_NFC_TAGHEADER2_UD9_Msk
FICR_NFC_TAGHEADER2_UD9_Pos
FICR_NFC_TAGHEADER3_UD12_Msk
FICR_NFC_TAGHEADER3_UD12_Pos
FICR_NFC_TAGHEADER3_UD13_Msk
FICR_NFC_TAGHEADER3_UD13_Pos
FICR_NFC_TAGHEADER3_UD14_Msk
FICR_NFC_TAGHEADER3_UD14_Pos
FICR_NFC_TAGHEADER3_UD15_Msk
FICR_NFC_TAGHEADER3_UD15_Pos
FICR_PRODTEST_PRODTEST_Done
FICR_PRODTEST_PRODTEST_Msk
FICR_PRODTEST_PRODTEST_NotDone
FICR_PRODTEST_PRODTEST_Pos
FICR_TEMP_A0_A_Msk
FICR_TEMP_A0_A_Pos
FICR_TEMP_A1_A_Msk
FICR_TEMP_A1_A_Pos
FICR_TEMP_A2_A_Msk
FICR_TEMP_A2_A_Pos
FICR_TEMP_A3_A_Msk
FICR_TEMP_A3_A_Pos
FICR_TEMP_A4_A_Msk
FICR_TEMP_A4_A_Pos
FICR_TEMP_A5_A_Msk
FICR_TEMP_A5_A_Pos
FICR_TEMP_B0_B_Msk
FICR_TEMP_B0_B_Pos
FICR_TEMP_B1_B_Msk
FICR_TEMP_B1_B_Pos
FICR_TEMP_B2_B_Msk
FICR_TEMP_B2_B_Pos
FICR_TEMP_B3_B_Msk
FICR_TEMP_B3_B_Pos
FICR_TEMP_B4_B_Msk
FICR_TEMP_B4_B_Pos
FICR_TEMP_B5_B_Msk
FICR_TEMP_B5_B_Pos
FICR_TEMP_T0_T_Msk
FICR_TEMP_T0_T_Pos
FICR_TEMP_T1_T_Msk
FICR_TEMP_T1_T_Pos
FICR_TEMP_T2_T_Msk
FICR_TEMP_T2_T_Pos
FICR_TEMP_T3_T_Msk
FICR_TEMP_T3_T_Pos
FICR_TEMP_T4_T_Msk
FICR_TEMP_T4_T_Pos
FICR_TRNG90B_APCUTOFF_APCUTOFF_Msk
FICR_TRNG90B_APCUTOFF_APCUTOFF_Pos
FICR_TRNG90B_BYTES_BYTES_Msk
FICR_TRNG90B_BYTES_BYTES_Pos
FICR_TRNG90B_RCCUTOFF_RCCUTOFF_Msk
FICR_TRNG90B_RCCUTOFF_RCCUTOFF_Pos
FICR_TRNG90B_ROSC1_ROSC1_Msk
FICR_TRNG90B_ROSC1_ROSC1_Pos
FICR_TRNG90B_ROSC2_ROSC2_Msk
FICR_TRNG90B_ROSC2_ROSC2_Pos
FICR_TRNG90B_ROSC3_ROSC3_Msk
FICR_TRNG90B_ROSC3_ROSC3_Pos
FICR_TRNG90B_ROSC4_ROSC4_Msk
FICR_TRNG90B_ROSC4_ROSC4_Pos
FICR_TRNG90B_STARTUP_STARTUP_Msk
FICR_TRNG90B_STARTUP_STARTUP_Pos
FILENAME_MAX
FLASHPAGE_NUMOF
FLASHPAGE_SIZE
FLASHPAGE_WRITE_BLOCK_ALIGNMENT
FLASHPAGE_WRITE_BLOCK_SIZE
FOPEN_MAX
FPU_BASE
FPU_COUNT
FPU_FPCAR_ADDRESS_Msk
FPU_FPCAR_ADDRESS_Pos
FPU_FPCCR_ASPEN_Msk
FPU_FPCCR_ASPEN_Pos
FPU_FPCCR_BFRDY_Msk
FPU_FPCCR_BFRDY_Pos
FPU_FPCCR_HFRDY_Msk
FPU_FPCCR_HFRDY_Pos
FPU_FPCCR_LSPACT_Msk
FPU_FPCCR_LSPACT_Pos
FPU_FPCCR_LSPEN_Msk
FPU_FPCCR_LSPEN_Pos
FPU_FPCCR_MMRDY_Msk
FPU_FPCCR_MMRDY_Pos
FPU_FPCCR_MONRDY_Msk
FPU_FPCCR_MONRDY_Pos
FPU_FPCCR_THREAD_Msk
FPU_FPCCR_THREAD_Pos
FPU_FPCCR_USER_Msk
FPU_FPCCR_USER_Pos
FPU_FPDSCR_AHP_Msk
FPU_FPDSCR_AHP_Pos
FPU_FPDSCR_DN_Msk
FPU_FPDSCR_DN_Pos
FPU_FPDSCR_FZ_Msk
FPU_FPDSCR_FZ_Pos
FPU_FPDSCR_RMode_Msk
FPU_FPDSCR_RMode_Pos
FPU_MVFR0_A_SIMD_registers_Msk
FPU_MVFR0_A_SIMD_registers_Pos
FPU_MVFR0_Divide_Msk
FPU_MVFR0_Divide_Pos
FPU_MVFR0_Double_precision_Msk
FPU_MVFR0_Double_precision_Pos
FPU_MVFR0_FP_excep_trapping_Msk
FPU_MVFR0_FP_excep_trapping_Pos
FPU_MVFR0_FP_rounding_modes_Msk
FPU_MVFR0_FP_rounding_modes_Pos
FPU_MVFR0_Short_vectors_Msk
FPU_MVFR0_Short_vectors_Pos
FPU_MVFR0_Single_precision_Msk
FPU_MVFR0_Single_precision_Pos
FPU_MVFR0_Square_root_Msk
FPU_MVFR0_Square_root_Pos
FPU_MVFR1_D_NaN_mode_Msk
FPU_MVFR1_D_NaN_mode_Pos
FPU_MVFR1_FP_HPFP_Msk
FPU_MVFR1_FP_HPFP_Pos
FPU_MVFR1_FP_fused_MAC_Msk
FPU_MVFR1_FP_fused_MAC_Pos
FPU_MVFR1_FtZ_mode_Msk
FPU_MVFR1_FtZ_mode_Pos
FPU_MVFR2_VFP_Misc_Msk
FPU_MVFR2_VFP_Misc_Pos
F_DUPFD
F_GETFD
F_GETFL
F_GETLK
F_OK
F_RDLCK
F_SETFD
F_SETFL
F_SETLK
F_SETLKW
F_UNLCK
F_WRLCK
GCOAP_DTLS_EXTRA_STACKSIZE
GCOAP_MEMO_ERR
GCOAP_MEMO_RESP
GCOAP_MEMO_RESP_TRUNC
GCOAP_MEMO_RETRANSMIT
GCOAP_MEMO_TIMEOUT
GCOAP_MEMO_UNUSED
GCOAP_MEMO_WAIT
GCOAP_OBS_INIT_ERR
GCOAP_OBS_INIT_OK
GCOAP_OBS_INIT_UNUSED
GCOAP_OBS_MEMO_IDLE
GCOAP_OBS_MEMO_PENDING
GCOAP_OBS_MEMO_UNUSED
GCOAP_OBS_TICK_EXPONENT
GCOAP_PAYLOAD_MARKER
GCOAP_RESOURCE_ERROR
GCOAP_RESOURCE_FOUND
GCOAP_RESOURCE_NO_PATH
GCOAP_RESOURCE_WRONG_METHOD
GCOAP_SEND_LIMIT_NON
GCOAP_TOKENLEN_MAX
GCOAP_VFS_EXTRA_STACKSIZE
GNRC_IPV6_MSG_QUEUE_SIZE
GNRC_IPV6_NIB_ABR_TIMEOUT
GNRC_IPV6_NIB_ADDR_REG_TIMEOUT
GNRC_IPV6_NIB_DAD
GNRC_IPV6_NIB_DELAY_TIMEOUT
GNRC_IPV6_NIB_IFACE_DOWN
GNRC_IPV6_NIB_IFACE_UP
GNRC_IPV6_NIB_NC_INFO_AR_STATE_GC
GNRC_IPV6_NIB_NC_INFO_AR_STATE_MANUAL
GNRC_IPV6_NIB_NC_INFO_AR_STATE_MASK
GNRC_IPV6_NIB_NC_INFO_AR_STATE_POS
GNRC_IPV6_NIB_NC_INFO_AR_STATE_REGISTERED
GNRC_IPV6_NIB_NC_INFO_AR_STATE_TENTATIVE
GNRC_IPV6_NIB_NC_INFO_IFACE_MASK
GNRC_IPV6_NIB_NC_INFO_IFACE_POS
GNRC_IPV6_NIB_NC_INFO_IS_ROUTER
GNRC_IPV6_NIB_NC_INFO_NUD_STATE_DELAY
GNRC_IPV6_NIB_NC_INFO_NUD_STATE_INCOMPLETE
GNRC_IPV6_NIB_NC_INFO_NUD_STATE_MASK
GNRC_IPV6_NIB_NC_INFO_NUD_STATE_PROBE
GNRC_IPV6_NIB_NC_INFO_NUD_STATE_REACHABLE
GNRC_IPV6_NIB_NC_INFO_NUD_STATE_STALE
GNRC_IPV6_NIB_NC_INFO_NUD_STATE_UNMANAGED
GNRC_IPV6_NIB_NC_INFO_NUD_STATE_UNREACHABLE
GNRC_IPV6_NIB_PFX_TIMEOUT
GNRC_IPV6_NIB_RDNSS_TIMEOUT
GNRC_IPV6_NIB_REACH_TIMEOUT
GNRC_IPV6_NIB_RECALC_REACH_TIME
GNRC_IPV6_NIB_REPLY_RS
GNRC_IPV6_NIB_REREG_ADDRESS
GNRC_IPV6_NIB_ROUTE_INFO_TYPE_NSC
GNRC_IPV6_NIB_ROUTE_INFO_TYPE_RN
GNRC_IPV6_NIB_ROUTE_INFO_TYPE_RRQ
GNRC_IPV6_NIB_ROUTE_INFO_TYPE_UNDEF
GNRC_IPV6_NIB_ROUTE_TIMEOUT
GNRC_IPV6_NIB_RTR_TIMEOUT
GNRC_IPV6_NIB_SEARCH_RTR
GNRC_IPV6_NIB_SND_MC_NS
GNRC_IPV6_NIB_SND_MC_RA
GNRC_IPV6_NIB_SND_NA
GNRC_IPV6_NIB_SND_UC_NS
GNRC_IPV6_NIB_VALID_ADDR
GNRC_IPV6_PRIO
GNRC_IPV6_STACK_SIZE
GNRC_NETAPI_MSG_TYPE_ACK
GNRC_NETAPI_MSG_TYPE_GET
GNRC_NETAPI_MSG_TYPE_RCV
GNRC_NETAPI_MSG_TYPE_SET
GNRC_NETAPI_MSG_TYPE_SND
GNRC_NETERR_MSG_TYPE
GNRC_NETERR_SUCCESS
GNRC_NETIF_AAC_AUTO
GNRC_NETIF_AAC_DHCP
GNRC_NETIF_AAC_NONE
GNRC_NETIF_EVQ_INDEX_PRIO_HIGH
GNRC_NETIF_EVQ_INDEX_PRIO_LOW
GNRC_NETIF_EVQ_NUMOF
GNRC_NETIF_FLAGS_6LN
GNRC_NETIF_FLAGS_6LO
GNRC_NETIF_FLAGS_6LO_ABR
GNRC_NETIF_FLAGS_6LO_BACKBONE
GNRC_NETIF_FLAGS_6LO_HC
GNRC_NETIF_FLAGS_6LO_MESH
GNRC_NETIF_FLAGS_HAS_L2ADDR
GNRC_NETIF_FLAGS_IPV6_ADV_CUR_HL
GNRC_NETIF_FLAGS_IPV6_ADV_MTU
GNRC_NETIF_FLAGS_IPV6_ADV_O_FLAG
GNRC_NETIF_FLAGS_IPV6_ADV_REACH_TIME
GNRC_NETIF_FLAGS_IPV6_ADV_RETRANS_TIMER
GNRC_NETIF_FLAGS_IPV6_FORWARDING
GNRC_NETIF_FLAGS_IPV6_RTR_ADV
GNRC_NETIF_FLAGS_RAWMODE
GNRC_NETIF_FLAGS_TX_FROM_PKTQUEUE
GNRC_NETIF_HDR_FLAGS_BROADCAST
GNRC_NETIF_HDR_FLAGS_MORE_DATA
GNRC_NETIF_HDR_FLAGS_MULTICAST
GNRC_NETIF_HDR_FLAGS_TIMESTAMP
GNRC_NETIF_HDR_L2ADDR_MAX_LEN
GNRC_NETIF_HDR_L2ADDR_PRINT_LEN
GNRC_NETIF_HDR_NO_LQI
GNRC_NETIF_IPV6_ADDRS_FLAGS_ANYCAST
GNRC_NETIF_IPV6_ADDRS_FLAGS_STATE_DEPRECATED
GNRC_NETIF_IPV6_ADDRS_FLAGS_STATE_MASK
GNRC_NETIF_IPV6_ADDRS_FLAGS_STATE_TENTATIVE
GNRC_NETIF_IPV6_ADDRS_FLAGS_STATE_VALID
GNRC_NETIF_IPV6_GROUPS_NUMOF
GNRC_NETIF_IPV6_RTR_ADDR
GNRC_NETIF_L2ADDR_MAXLEN
GNRC_NETIF_MSG_QUEUE_SIZE
GNRC_NETIF_PKTQ_DEQUEUE_MSG
GNRC_NETIF_PRIO
GNRC_NETIF_RPL_ADDR
GNRC_NETREG_DEMUX_CTX_ALL
GNRC_PKTBUF_CANARY
GNRC_SOCK_MBOX_SIZE
GNRC_TCP_NO_TIMEOUT
GNRC_TCP_RCV_BUF_SIZE
GNRC_UDP_MSG_QUEUE_SIZE
GNRC_UDP_PRIO
GNRC_UDP_STACK_SIZE
GPIOTE_CH_NUM
GPIOTE_CONFIG_MODE_Disabled
GPIOTE_CONFIG_MODE_Event
GPIOTE_CONFIG_MODE_Msk
GPIOTE_CONFIG_MODE_Pos
GPIOTE_CONFIG_MODE_Task
GPIOTE_CONFIG_OUTINIT_High
GPIOTE_CONFIG_OUTINIT_Low
GPIOTE_CONFIG_OUTINIT_Msk
GPIOTE_CONFIG_OUTINIT_Pos
GPIOTE_CONFIG_POLARITY_HiToLo
GPIOTE_CONFIG_POLARITY_LoToHi
GPIOTE_CONFIG_POLARITY_Msk
GPIOTE_CONFIG_POLARITY_None
GPIOTE_CONFIG_POLARITY_Pos
GPIOTE_CONFIG_POLARITY_Toggle
GPIOTE_CONFIG_PORT_Msk
GPIOTE_CONFIG_PORT_Pos
GPIOTE_CONFIG_PSEL_Msk
GPIOTE_CONFIG_PSEL_Pos
GPIOTE_COUNT
GPIOTE_EVENTS_IN_EVENTS_IN_Generated
GPIOTE_EVENTS_IN_EVENTS_IN_Msk
GPIOTE_EVENTS_IN_EVENTS_IN_NotGenerated
GPIOTE_EVENTS_IN_EVENTS_IN_Pos
GPIOTE_EVENTS_PORT_EVENTS_PORT_Generated
GPIOTE_EVENTS_PORT_EVENTS_PORT_Msk
GPIOTE_EVENTS_PORT_EVENTS_PORT_NotGenerated
GPIOTE_EVENTS_PORT_EVENTS_PORT_Pos
GPIOTE_INTENCLR_IN0_Clear
GPIOTE_INTENCLR_IN0_Disabled
GPIOTE_INTENCLR_IN0_Enabled
GPIOTE_INTENCLR_IN0_Msk
GPIOTE_INTENCLR_IN0_Pos
GPIOTE_INTENCLR_IN1_Clear
GPIOTE_INTENCLR_IN1_Disabled
GPIOTE_INTENCLR_IN1_Enabled
GPIOTE_INTENCLR_IN1_Msk
GPIOTE_INTENCLR_IN1_Pos
GPIOTE_INTENCLR_IN2_Clear
GPIOTE_INTENCLR_IN2_Disabled
GPIOTE_INTENCLR_IN2_Enabled
GPIOTE_INTENCLR_IN2_Msk
GPIOTE_INTENCLR_IN2_Pos
GPIOTE_INTENCLR_IN3_Clear
GPIOTE_INTENCLR_IN3_Disabled
GPIOTE_INTENCLR_IN3_Enabled
GPIOTE_INTENCLR_IN3_Msk
GPIOTE_INTENCLR_IN3_Pos
GPIOTE_INTENCLR_IN4_Clear
GPIOTE_INTENCLR_IN4_Disabled
GPIOTE_INTENCLR_IN4_Enabled
GPIOTE_INTENCLR_IN4_Msk
GPIOTE_INTENCLR_IN4_Pos
GPIOTE_INTENCLR_IN5_Clear
GPIOTE_INTENCLR_IN5_Disabled
GPIOTE_INTENCLR_IN5_Enabled
GPIOTE_INTENCLR_IN5_Msk
GPIOTE_INTENCLR_IN5_Pos
GPIOTE_INTENCLR_IN6_Clear
GPIOTE_INTENCLR_IN6_Disabled
GPIOTE_INTENCLR_IN6_Enabled
GPIOTE_INTENCLR_IN6_Msk
GPIOTE_INTENCLR_IN6_Pos
GPIOTE_INTENCLR_IN7_Clear
GPIOTE_INTENCLR_IN7_Disabled
GPIOTE_INTENCLR_IN7_Enabled
GPIOTE_INTENCLR_IN7_Msk
GPIOTE_INTENCLR_IN7_Pos
GPIOTE_INTENCLR_PORT_Clear
GPIOTE_INTENCLR_PORT_Disabled
GPIOTE_INTENCLR_PORT_Enabled
GPIOTE_INTENCLR_PORT_Msk
GPIOTE_INTENCLR_PORT_Pos
GPIOTE_INTENSET_IN0_Disabled
GPIOTE_INTENSET_IN0_Enabled
GPIOTE_INTENSET_IN0_Msk
GPIOTE_INTENSET_IN0_Pos
GPIOTE_INTENSET_IN0_Set
GPIOTE_INTENSET_IN1_Disabled
GPIOTE_INTENSET_IN1_Enabled
GPIOTE_INTENSET_IN1_Msk
GPIOTE_INTENSET_IN1_Pos
GPIOTE_INTENSET_IN1_Set
GPIOTE_INTENSET_IN2_Disabled
GPIOTE_INTENSET_IN2_Enabled
GPIOTE_INTENSET_IN2_Msk
GPIOTE_INTENSET_IN2_Pos
GPIOTE_INTENSET_IN2_Set
GPIOTE_INTENSET_IN3_Disabled
GPIOTE_INTENSET_IN3_Enabled
GPIOTE_INTENSET_IN3_Msk
GPIOTE_INTENSET_IN3_Pos
GPIOTE_INTENSET_IN3_Set
GPIOTE_INTENSET_IN4_Disabled
GPIOTE_INTENSET_IN4_Enabled
GPIOTE_INTENSET_IN4_Msk
GPIOTE_INTENSET_IN4_Pos
GPIOTE_INTENSET_IN4_Set
GPIOTE_INTENSET_IN5_Disabled
GPIOTE_INTENSET_IN5_Enabled
GPIOTE_INTENSET_IN5_Msk
GPIOTE_INTENSET_IN5_Pos
GPIOTE_INTENSET_IN5_Set
GPIOTE_INTENSET_IN6_Disabled
GPIOTE_INTENSET_IN6_Enabled
GPIOTE_INTENSET_IN6_Msk
GPIOTE_INTENSET_IN6_Pos
GPIOTE_INTENSET_IN6_Set
GPIOTE_INTENSET_IN7_Disabled
GPIOTE_INTENSET_IN7_Enabled
GPIOTE_INTENSET_IN7_Msk
GPIOTE_INTENSET_IN7_Pos
GPIOTE_INTENSET_IN7_Set
GPIOTE_INTENSET_PORT_Disabled
GPIOTE_INTENSET_PORT_Enabled
GPIOTE_INTENSET_PORT_Msk
GPIOTE_INTENSET_PORT_Pos
GPIOTE_INTENSET_PORT_Set
GPIOTE_TASKS_CLR_TASKS_CLR_Msk
GPIOTE_TASKS_CLR_TASKS_CLR_Pos
GPIOTE_TASKS_CLR_TASKS_CLR_Trigger
GPIOTE_TASKS_OUT_TASKS_OUT_Msk
GPIOTE_TASKS_OUT_TASKS_OUT_Pos
GPIOTE_TASKS_OUT_TASKS_OUT_Trigger
GPIOTE_TASKS_SET_TASKS_SET_Msk
GPIOTE_TASKS_SET_TASKS_SET_Pos
GPIOTE_TASKS_SET_TASKS_SET_Trigger
GPIO_COUNT
GPIO_DETECTMODE_DETECTMODE_Default
GPIO_DETECTMODE_DETECTMODE_LDETECT
GPIO_DETECTMODE_DETECTMODE_Msk
GPIO_DETECTMODE_DETECTMODE_Pos
GPIO_DIRCLR_PIN0_Clear
GPIO_DIRCLR_PIN0_Input
GPIO_DIRCLR_PIN0_Msk
GPIO_DIRCLR_PIN0_Output
GPIO_DIRCLR_PIN0_Pos
GPIO_DIRCLR_PIN10_Clear
GPIO_DIRCLR_PIN10_Input
GPIO_DIRCLR_PIN10_Msk
GPIO_DIRCLR_PIN10_Output
GPIO_DIRCLR_PIN10_Pos
GPIO_DIRCLR_PIN11_Clear
GPIO_DIRCLR_PIN11_Input
GPIO_DIRCLR_PIN11_Msk
GPIO_DIRCLR_PIN11_Output
GPIO_DIRCLR_PIN11_Pos
GPIO_DIRCLR_PIN12_Clear
GPIO_DIRCLR_PIN12_Input
GPIO_DIRCLR_PIN12_Msk
GPIO_DIRCLR_PIN12_Output
GPIO_DIRCLR_PIN12_Pos
GPIO_DIRCLR_PIN13_Clear
GPIO_DIRCLR_PIN13_Input
GPIO_DIRCLR_PIN13_Msk
GPIO_DIRCLR_PIN13_Output
GPIO_DIRCLR_PIN13_Pos
GPIO_DIRCLR_PIN14_Clear
GPIO_DIRCLR_PIN14_Input
GPIO_DIRCLR_PIN14_Msk
GPIO_DIRCLR_PIN14_Output
GPIO_DIRCLR_PIN14_Pos
GPIO_DIRCLR_PIN15_Clear
GPIO_DIRCLR_PIN15_Input
GPIO_DIRCLR_PIN15_Msk
GPIO_DIRCLR_PIN15_Output
GPIO_DIRCLR_PIN15_Pos
GPIO_DIRCLR_PIN16_Clear
GPIO_DIRCLR_PIN16_Input
GPIO_DIRCLR_PIN16_Msk
GPIO_DIRCLR_PIN16_Output
GPIO_DIRCLR_PIN16_Pos
GPIO_DIRCLR_PIN17_Clear
GPIO_DIRCLR_PIN17_Input
GPIO_DIRCLR_PIN17_Msk
GPIO_DIRCLR_PIN17_Output
GPIO_DIRCLR_PIN17_Pos
GPIO_DIRCLR_PIN18_Clear
GPIO_DIRCLR_PIN18_Input
GPIO_DIRCLR_PIN18_Msk
GPIO_DIRCLR_PIN18_Output
GPIO_DIRCLR_PIN18_Pos
GPIO_DIRCLR_PIN19_Clear
GPIO_DIRCLR_PIN19_Input
GPIO_DIRCLR_PIN19_Msk
GPIO_DIRCLR_PIN19_Output
GPIO_DIRCLR_PIN19_Pos
GPIO_DIRCLR_PIN1_Clear
GPIO_DIRCLR_PIN1_Input
GPIO_DIRCLR_PIN1_Msk
GPIO_DIRCLR_PIN1_Output
GPIO_DIRCLR_PIN1_Pos
GPIO_DIRCLR_PIN20_Clear
GPIO_DIRCLR_PIN20_Input
GPIO_DIRCLR_PIN20_Msk
GPIO_DIRCLR_PIN20_Output
GPIO_DIRCLR_PIN20_Pos
GPIO_DIRCLR_PIN21_Clear
GPIO_DIRCLR_PIN21_Input
GPIO_DIRCLR_PIN21_Msk
GPIO_DIRCLR_PIN21_Output
GPIO_DIRCLR_PIN21_Pos
GPIO_DIRCLR_PIN22_Clear
GPIO_DIRCLR_PIN22_Input
GPIO_DIRCLR_PIN22_Msk
GPIO_DIRCLR_PIN22_Output
GPIO_DIRCLR_PIN22_Pos
GPIO_DIRCLR_PIN23_Clear
GPIO_DIRCLR_PIN23_Input
GPIO_DIRCLR_PIN23_Msk
GPIO_DIRCLR_PIN23_Output
GPIO_DIRCLR_PIN23_Pos
GPIO_DIRCLR_PIN24_Clear
GPIO_DIRCLR_PIN24_Input
GPIO_DIRCLR_PIN24_Msk
GPIO_DIRCLR_PIN24_Output
GPIO_DIRCLR_PIN24_Pos
GPIO_DIRCLR_PIN25_Clear
GPIO_DIRCLR_PIN25_Input
GPIO_DIRCLR_PIN25_Msk
GPIO_DIRCLR_PIN25_Output
GPIO_DIRCLR_PIN25_Pos
GPIO_DIRCLR_PIN26_Clear
GPIO_DIRCLR_PIN26_Input
GPIO_DIRCLR_PIN26_Msk
GPIO_DIRCLR_PIN26_Output
GPIO_DIRCLR_PIN26_Pos
GPIO_DIRCLR_PIN27_Clear
GPIO_DIRCLR_PIN27_Input
GPIO_DIRCLR_PIN27_Msk
GPIO_DIRCLR_PIN27_Output
GPIO_DIRCLR_PIN27_Pos
GPIO_DIRCLR_PIN28_Clear
GPIO_DIRCLR_PIN28_Input
GPIO_DIRCLR_PIN28_Msk
GPIO_DIRCLR_PIN28_Output
GPIO_DIRCLR_PIN28_Pos
GPIO_DIRCLR_PIN29_Clear
GPIO_DIRCLR_PIN29_Input
GPIO_DIRCLR_PIN29_Msk
GPIO_DIRCLR_PIN29_Output
GPIO_DIRCLR_PIN29_Pos
GPIO_DIRCLR_PIN2_Clear
GPIO_DIRCLR_PIN2_Input
GPIO_DIRCLR_PIN2_Msk
GPIO_DIRCLR_PIN2_Output
GPIO_DIRCLR_PIN2_Pos
GPIO_DIRCLR_PIN30_Clear
GPIO_DIRCLR_PIN30_Input
GPIO_DIRCLR_PIN30_Msk
GPIO_DIRCLR_PIN30_Output
GPIO_DIRCLR_PIN30_Pos
GPIO_DIRCLR_PIN31_Clear
GPIO_DIRCLR_PIN31_Input
GPIO_DIRCLR_PIN31_Msk
GPIO_DIRCLR_PIN31_Output
GPIO_DIRCLR_PIN31_Pos
GPIO_DIRCLR_PIN3_Clear
GPIO_DIRCLR_PIN3_Input
GPIO_DIRCLR_PIN3_Msk
GPIO_DIRCLR_PIN3_Output
GPIO_DIRCLR_PIN3_Pos
GPIO_DIRCLR_PIN4_Clear
GPIO_DIRCLR_PIN4_Input
GPIO_DIRCLR_PIN4_Msk
GPIO_DIRCLR_PIN4_Output
GPIO_DIRCLR_PIN4_Pos
GPIO_DIRCLR_PIN5_Clear
GPIO_DIRCLR_PIN5_Input
GPIO_DIRCLR_PIN5_Msk
GPIO_DIRCLR_PIN5_Output
GPIO_DIRCLR_PIN5_Pos
GPIO_DIRCLR_PIN6_Clear
GPIO_DIRCLR_PIN6_Input
GPIO_DIRCLR_PIN6_Msk
GPIO_DIRCLR_PIN6_Output
GPIO_DIRCLR_PIN6_Pos
GPIO_DIRCLR_PIN7_Clear
GPIO_DIRCLR_PIN7_Input
GPIO_DIRCLR_PIN7_Msk
GPIO_DIRCLR_PIN7_Output
GPIO_DIRCLR_PIN7_Pos
GPIO_DIRCLR_PIN8_Clear
GPIO_DIRCLR_PIN8_Input
GPIO_DIRCLR_PIN8_Msk
GPIO_DIRCLR_PIN8_Output
GPIO_DIRCLR_PIN8_Pos
GPIO_DIRCLR_PIN9_Clear
GPIO_DIRCLR_PIN9_Input
GPIO_DIRCLR_PIN9_Msk
GPIO_DIRCLR_PIN9_Output
GPIO_DIRCLR_PIN9_Pos
GPIO_DIRSET_PIN0_Input
GPIO_DIRSET_PIN0_Msk
GPIO_DIRSET_PIN0_Output
GPIO_DIRSET_PIN0_Pos
GPIO_DIRSET_PIN0_Set
GPIO_DIRSET_PIN10_Input
GPIO_DIRSET_PIN10_Msk
GPIO_DIRSET_PIN10_Output
GPIO_DIRSET_PIN10_Pos
GPIO_DIRSET_PIN10_Set
GPIO_DIRSET_PIN11_Input
GPIO_DIRSET_PIN11_Msk
GPIO_DIRSET_PIN11_Output
GPIO_DIRSET_PIN11_Pos
GPIO_DIRSET_PIN11_Set
GPIO_DIRSET_PIN12_Input
GPIO_DIRSET_PIN12_Msk
GPIO_DIRSET_PIN12_Output
GPIO_DIRSET_PIN12_Pos
GPIO_DIRSET_PIN12_Set
GPIO_DIRSET_PIN13_Input
GPIO_DIRSET_PIN13_Msk
GPIO_DIRSET_PIN13_Output
GPIO_DIRSET_PIN13_Pos
GPIO_DIRSET_PIN13_Set
GPIO_DIRSET_PIN14_Input
GPIO_DIRSET_PIN14_Msk
GPIO_DIRSET_PIN14_Output
GPIO_DIRSET_PIN14_Pos
GPIO_DIRSET_PIN14_Set
GPIO_DIRSET_PIN15_Input
GPIO_DIRSET_PIN15_Msk
GPIO_DIRSET_PIN15_Output
GPIO_DIRSET_PIN15_Pos
GPIO_DIRSET_PIN15_Set
GPIO_DIRSET_PIN16_Input
GPIO_DIRSET_PIN16_Msk
GPIO_DIRSET_PIN16_Output
GPIO_DIRSET_PIN16_Pos
GPIO_DIRSET_PIN16_Set
GPIO_DIRSET_PIN17_Input
GPIO_DIRSET_PIN17_Msk
GPIO_DIRSET_PIN17_Output
GPIO_DIRSET_PIN17_Pos
GPIO_DIRSET_PIN17_Set
GPIO_DIRSET_PIN18_Input
GPIO_DIRSET_PIN18_Msk
GPIO_DIRSET_PIN18_Output
GPIO_DIRSET_PIN18_Pos
GPIO_DIRSET_PIN18_Set
GPIO_DIRSET_PIN19_Input
GPIO_DIRSET_PIN19_Msk
GPIO_DIRSET_PIN19_Output
GPIO_DIRSET_PIN19_Pos
GPIO_DIRSET_PIN19_Set
GPIO_DIRSET_PIN1_Input
GPIO_DIRSET_PIN1_Msk
GPIO_DIRSET_PIN1_Output
GPIO_DIRSET_PIN1_Pos
GPIO_DIRSET_PIN1_Set
GPIO_DIRSET_PIN20_Input
GPIO_DIRSET_PIN20_Msk
GPIO_DIRSET_PIN20_Output
GPIO_DIRSET_PIN20_Pos
GPIO_DIRSET_PIN20_Set
GPIO_DIRSET_PIN21_Input
GPIO_DIRSET_PIN21_Msk
GPIO_DIRSET_PIN21_Output
GPIO_DIRSET_PIN21_Pos
GPIO_DIRSET_PIN21_Set
GPIO_DIRSET_PIN22_Input
GPIO_DIRSET_PIN22_Msk
GPIO_DIRSET_PIN22_Output
GPIO_DIRSET_PIN22_Pos
GPIO_DIRSET_PIN22_Set
GPIO_DIRSET_PIN23_Input
GPIO_DIRSET_PIN23_Msk
GPIO_DIRSET_PIN23_Output
GPIO_DIRSET_PIN23_Pos
GPIO_DIRSET_PIN23_Set
GPIO_DIRSET_PIN24_Input
GPIO_DIRSET_PIN24_Msk
GPIO_DIRSET_PIN24_Output
GPIO_DIRSET_PIN24_Pos
GPIO_DIRSET_PIN24_Set
GPIO_DIRSET_PIN25_Input
GPIO_DIRSET_PIN25_Msk
GPIO_DIRSET_PIN25_Output
GPIO_DIRSET_PIN25_Pos
GPIO_DIRSET_PIN25_Set
GPIO_DIRSET_PIN26_Input
GPIO_DIRSET_PIN26_Msk
GPIO_DIRSET_PIN26_Output
GPIO_DIRSET_PIN26_Pos
GPIO_DIRSET_PIN26_Set
GPIO_DIRSET_PIN27_Input
GPIO_DIRSET_PIN27_Msk
GPIO_DIRSET_PIN27_Output
GPIO_DIRSET_PIN27_Pos
GPIO_DIRSET_PIN27_Set
GPIO_DIRSET_PIN28_Input
GPIO_DIRSET_PIN28_Msk
GPIO_DIRSET_PIN28_Output
GPIO_DIRSET_PIN28_Pos
GPIO_DIRSET_PIN28_Set
GPIO_DIRSET_PIN29_Input
GPIO_DIRSET_PIN29_Msk
GPIO_DIRSET_PIN29_Output
GPIO_DIRSET_PIN29_Pos
GPIO_DIRSET_PIN29_Set
GPIO_DIRSET_PIN2_Input
GPIO_DIRSET_PIN2_Msk
GPIO_DIRSET_PIN2_Output
GPIO_DIRSET_PIN2_Pos
GPIO_DIRSET_PIN2_Set
GPIO_DIRSET_PIN30_Input
GPIO_DIRSET_PIN30_Msk
GPIO_DIRSET_PIN30_Output
GPIO_DIRSET_PIN30_Pos
GPIO_DIRSET_PIN30_Set
GPIO_DIRSET_PIN31_Input
GPIO_DIRSET_PIN31_Msk
GPIO_DIRSET_PIN31_Output
GPIO_DIRSET_PIN31_Pos
GPIO_DIRSET_PIN31_Set
GPIO_DIRSET_PIN3_Input
GPIO_DIRSET_PIN3_Msk
GPIO_DIRSET_PIN3_Output
GPIO_DIRSET_PIN3_Pos
GPIO_DIRSET_PIN3_Set
GPIO_DIRSET_PIN4_Input
GPIO_DIRSET_PIN4_Msk
GPIO_DIRSET_PIN4_Output
GPIO_DIRSET_PIN4_Pos
GPIO_DIRSET_PIN4_Set
GPIO_DIRSET_PIN5_Input
GPIO_DIRSET_PIN5_Msk
GPIO_DIRSET_PIN5_Output
GPIO_DIRSET_PIN5_Pos
GPIO_DIRSET_PIN5_Set
GPIO_DIRSET_PIN6_Input
GPIO_DIRSET_PIN6_Msk
GPIO_DIRSET_PIN6_Output
GPIO_DIRSET_PIN6_Pos
GPIO_DIRSET_PIN6_Set
GPIO_DIRSET_PIN7_Input
GPIO_DIRSET_PIN7_Msk
GPIO_DIRSET_PIN7_Output
GPIO_DIRSET_PIN7_Pos
GPIO_DIRSET_PIN7_Set
GPIO_DIRSET_PIN8_Input
GPIO_DIRSET_PIN8_Msk
GPIO_DIRSET_PIN8_Output
GPIO_DIRSET_PIN8_Pos
GPIO_DIRSET_PIN8_Set
GPIO_DIRSET_PIN9_Input
GPIO_DIRSET_PIN9_Msk
GPIO_DIRSET_PIN9_Output
GPIO_DIRSET_PIN9_Pos
GPIO_DIRSET_PIN9_Set
GPIO_DIR_PIN0_Input
GPIO_DIR_PIN0_Msk
GPIO_DIR_PIN0_Output
GPIO_DIR_PIN0_Pos
GPIO_DIR_PIN10_Input
GPIO_DIR_PIN10_Msk
GPIO_DIR_PIN10_Output
GPIO_DIR_PIN10_Pos
GPIO_DIR_PIN11_Input
GPIO_DIR_PIN11_Msk
GPIO_DIR_PIN11_Output
GPIO_DIR_PIN11_Pos
GPIO_DIR_PIN12_Input
GPIO_DIR_PIN12_Msk
GPIO_DIR_PIN12_Output
GPIO_DIR_PIN12_Pos
GPIO_DIR_PIN13_Input
GPIO_DIR_PIN13_Msk
GPIO_DIR_PIN13_Output
GPIO_DIR_PIN13_Pos
GPIO_DIR_PIN14_Input
GPIO_DIR_PIN14_Msk
GPIO_DIR_PIN14_Output
GPIO_DIR_PIN14_Pos
GPIO_DIR_PIN15_Input
GPIO_DIR_PIN15_Msk
GPIO_DIR_PIN15_Output
GPIO_DIR_PIN15_Pos
GPIO_DIR_PIN16_Input
GPIO_DIR_PIN16_Msk
GPIO_DIR_PIN16_Output
GPIO_DIR_PIN16_Pos
GPIO_DIR_PIN17_Input
GPIO_DIR_PIN17_Msk
GPIO_DIR_PIN17_Output
GPIO_DIR_PIN17_Pos
GPIO_DIR_PIN18_Input
GPIO_DIR_PIN18_Msk
GPIO_DIR_PIN18_Output
GPIO_DIR_PIN18_Pos
GPIO_DIR_PIN19_Input
GPIO_DIR_PIN19_Msk
GPIO_DIR_PIN19_Output
GPIO_DIR_PIN19_Pos
GPIO_DIR_PIN1_Input
GPIO_DIR_PIN1_Msk
GPIO_DIR_PIN1_Output
GPIO_DIR_PIN1_Pos
GPIO_DIR_PIN20_Input
GPIO_DIR_PIN20_Msk
GPIO_DIR_PIN20_Output
GPIO_DIR_PIN20_Pos
GPIO_DIR_PIN21_Input
GPIO_DIR_PIN21_Msk
GPIO_DIR_PIN21_Output
GPIO_DIR_PIN21_Pos
GPIO_DIR_PIN22_Input
GPIO_DIR_PIN22_Msk
GPIO_DIR_PIN22_Output
GPIO_DIR_PIN22_Pos
GPIO_DIR_PIN23_Input
GPIO_DIR_PIN23_Msk
GPIO_DIR_PIN23_Output
GPIO_DIR_PIN23_Pos
GPIO_DIR_PIN24_Input
GPIO_DIR_PIN24_Msk
GPIO_DIR_PIN24_Output
GPIO_DIR_PIN24_Pos
GPIO_DIR_PIN25_Input
GPIO_DIR_PIN25_Msk
GPIO_DIR_PIN25_Output
GPIO_DIR_PIN25_Pos
GPIO_DIR_PIN26_Input
GPIO_DIR_PIN26_Msk
GPIO_DIR_PIN26_Output
GPIO_DIR_PIN26_Pos
GPIO_DIR_PIN27_Input
GPIO_DIR_PIN27_Msk
GPIO_DIR_PIN27_Output
GPIO_DIR_PIN27_Pos
GPIO_DIR_PIN28_Input
GPIO_DIR_PIN28_Msk
GPIO_DIR_PIN28_Output
GPIO_DIR_PIN28_Pos
GPIO_DIR_PIN29_Input
GPIO_DIR_PIN29_Msk
GPIO_DIR_PIN29_Output
GPIO_DIR_PIN29_Pos
GPIO_DIR_PIN2_Input
GPIO_DIR_PIN2_Msk
GPIO_DIR_PIN2_Output
GPIO_DIR_PIN2_Pos
GPIO_DIR_PIN30_Input
GPIO_DIR_PIN30_Msk
GPIO_DIR_PIN30_Output
GPIO_DIR_PIN30_Pos
GPIO_DIR_PIN31_Input
GPIO_DIR_PIN31_Msk
GPIO_DIR_PIN31_Output
GPIO_DIR_PIN31_Pos
GPIO_DIR_PIN3_Input
GPIO_DIR_PIN3_Msk
GPIO_DIR_PIN3_Output
GPIO_DIR_PIN3_Pos
GPIO_DIR_PIN4_Input
GPIO_DIR_PIN4_Msk
GPIO_DIR_PIN4_Output
GPIO_DIR_PIN4_Pos
GPIO_DIR_PIN5_Input
GPIO_DIR_PIN5_Msk
GPIO_DIR_PIN5_Output
GPIO_DIR_PIN5_Pos
GPIO_DIR_PIN6_Input
GPIO_DIR_PIN6_Msk
GPIO_DIR_PIN6_Output
GPIO_DIR_PIN6_Pos
GPIO_DIR_PIN7_Input
GPIO_DIR_PIN7_Msk
GPIO_DIR_PIN7_Output
GPIO_DIR_PIN7_Pos
GPIO_DIR_PIN8_Input
GPIO_DIR_PIN8_Msk
GPIO_DIR_PIN8_Output
GPIO_DIR_PIN8_Pos
GPIO_DIR_PIN9_Input
GPIO_DIR_PIN9_Msk
GPIO_DIR_PIN9_Output
GPIO_DIR_PIN9_Pos
GPIO_IN_PIN0_High
GPIO_IN_PIN0_Low
GPIO_IN_PIN0_Msk
GPIO_IN_PIN0_Pos
GPIO_IN_PIN10_High
GPIO_IN_PIN10_Low
GPIO_IN_PIN10_Msk
GPIO_IN_PIN10_Pos
GPIO_IN_PIN11_High
GPIO_IN_PIN11_Low
GPIO_IN_PIN11_Msk
GPIO_IN_PIN11_Pos
GPIO_IN_PIN12_High
GPIO_IN_PIN12_Low
GPIO_IN_PIN12_Msk
GPIO_IN_PIN12_Pos
GPIO_IN_PIN13_High
GPIO_IN_PIN13_Low
GPIO_IN_PIN13_Msk
GPIO_IN_PIN13_Pos
GPIO_IN_PIN14_High
GPIO_IN_PIN14_Low
GPIO_IN_PIN14_Msk
GPIO_IN_PIN14_Pos
GPIO_IN_PIN15_High
GPIO_IN_PIN15_Low
GPIO_IN_PIN15_Msk
GPIO_IN_PIN15_Pos
GPIO_IN_PIN16_High
GPIO_IN_PIN16_Low
GPIO_IN_PIN16_Msk
GPIO_IN_PIN16_Pos
GPIO_IN_PIN17_High
GPIO_IN_PIN17_Low
GPIO_IN_PIN17_Msk
GPIO_IN_PIN17_Pos
GPIO_IN_PIN18_High
GPIO_IN_PIN18_Low
GPIO_IN_PIN18_Msk
GPIO_IN_PIN18_Pos
GPIO_IN_PIN19_High
GPIO_IN_PIN19_Low
GPIO_IN_PIN19_Msk
GPIO_IN_PIN19_Pos
GPIO_IN_PIN1_High
GPIO_IN_PIN1_Low
GPIO_IN_PIN1_Msk
GPIO_IN_PIN1_Pos
GPIO_IN_PIN20_High
GPIO_IN_PIN20_Low
GPIO_IN_PIN20_Msk
GPIO_IN_PIN20_Pos
GPIO_IN_PIN21_High
GPIO_IN_PIN21_Low
GPIO_IN_PIN21_Msk
GPIO_IN_PIN21_Pos
GPIO_IN_PIN22_High
GPIO_IN_PIN22_Low
GPIO_IN_PIN22_Msk
GPIO_IN_PIN22_Pos
GPIO_IN_PIN23_High
GPIO_IN_PIN23_Low
GPIO_IN_PIN23_Msk
GPIO_IN_PIN23_Pos
GPIO_IN_PIN24_High
GPIO_IN_PIN24_Low
GPIO_IN_PIN24_Msk
GPIO_IN_PIN24_Pos
GPIO_IN_PIN25_High
GPIO_IN_PIN25_Low
GPIO_IN_PIN25_Msk
GPIO_IN_PIN25_Pos
GPIO_IN_PIN26_High
GPIO_IN_PIN26_Low
GPIO_IN_PIN26_Msk
GPIO_IN_PIN26_Pos
GPIO_IN_PIN27_High
GPIO_IN_PIN27_Low
GPIO_IN_PIN27_Msk
GPIO_IN_PIN27_Pos
GPIO_IN_PIN28_High
GPIO_IN_PIN28_Low
GPIO_IN_PIN28_Msk
GPIO_IN_PIN28_Pos
GPIO_IN_PIN29_High
GPIO_IN_PIN29_Low
GPIO_IN_PIN29_Msk
GPIO_IN_PIN29_Pos
GPIO_IN_PIN2_High
GPIO_IN_PIN2_Low
GPIO_IN_PIN2_Msk
GPIO_IN_PIN2_Pos
GPIO_IN_PIN30_High
GPIO_IN_PIN30_Low
GPIO_IN_PIN30_Msk
GPIO_IN_PIN30_Pos
GPIO_IN_PIN31_High
GPIO_IN_PIN31_Low
GPIO_IN_PIN31_Msk
GPIO_IN_PIN31_Pos
GPIO_IN_PIN3_High
GPIO_IN_PIN3_Low
GPIO_IN_PIN3_Msk
GPIO_IN_PIN3_Pos
GPIO_IN_PIN4_High
GPIO_IN_PIN4_Low
GPIO_IN_PIN4_Msk
GPIO_IN_PIN4_Pos
GPIO_IN_PIN5_High
GPIO_IN_PIN5_Low
GPIO_IN_PIN5_Msk
GPIO_IN_PIN5_Pos
GPIO_IN_PIN6_High
GPIO_IN_PIN6_Low
GPIO_IN_PIN6_Msk
GPIO_IN_PIN6_Pos
GPIO_IN_PIN7_High
GPIO_IN_PIN7_Low
GPIO_IN_PIN7_Msk
GPIO_IN_PIN7_Pos
GPIO_IN_PIN8_High
GPIO_IN_PIN8_Low
GPIO_IN_PIN8_Msk
GPIO_IN_PIN8_Pos
GPIO_IN_PIN9_High
GPIO_IN_PIN9_Low
GPIO_IN_PIN9_Msk
GPIO_IN_PIN9_Pos
GPIO_LATCH_PIN0_Latched
GPIO_LATCH_PIN0_Msk
GPIO_LATCH_PIN0_NotLatched
GPIO_LATCH_PIN0_Pos
GPIO_LATCH_PIN10_Latched
GPIO_LATCH_PIN10_Msk
GPIO_LATCH_PIN10_NotLatched
GPIO_LATCH_PIN10_Pos
GPIO_LATCH_PIN11_Latched
GPIO_LATCH_PIN11_Msk
GPIO_LATCH_PIN11_NotLatched
GPIO_LATCH_PIN11_Pos
GPIO_LATCH_PIN12_Latched
GPIO_LATCH_PIN12_Msk
GPIO_LATCH_PIN12_NotLatched
GPIO_LATCH_PIN12_Pos
GPIO_LATCH_PIN13_Latched
GPIO_LATCH_PIN13_Msk
GPIO_LATCH_PIN13_NotLatched
GPIO_LATCH_PIN13_Pos
GPIO_LATCH_PIN14_Latched
GPIO_LATCH_PIN14_Msk
GPIO_LATCH_PIN14_NotLatched
GPIO_LATCH_PIN14_Pos
GPIO_LATCH_PIN15_Latched
GPIO_LATCH_PIN15_Msk
GPIO_LATCH_PIN15_NotLatched
GPIO_LATCH_PIN15_Pos
GPIO_LATCH_PIN16_Latched
GPIO_LATCH_PIN16_Msk
GPIO_LATCH_PIN16_NotLatched
GPIO_LATCH_PIN16_Pos
GPIO_LATCH_PIN17_Latched
GPIO_LATCH_PIN17_Msk
GPIO_LATCH_PIN17_NotLatched
GPIO_LATCH_PIN17_Pos
GPIO_LATCH_PIN18_Latched
GPIO_LATCH_PIN18_Msk
GPIO_LATCH_PIN18_NotLatched
GPIO_LATCH_PIN18_Pos
GPIO_LATCH_PIN19_Latched
GPIO_LATCH_PIN19_Msk
GPIO_LATCH_PIN19_NotLatched
GPIO_LATCH_PIN19_Pos
GPIO_LATCH_PIN1_Latched
GPIO_LATCH_PIN1_Msk
GPIO_LATCH_PIN1_NotLatched
GPIO_LATCH_PIN1_Pos
GPIO_LATCH_PIN20_Latched
GPIO_LATCH_PIN20_Msk
GPIO_LATCH_PIN20_NotLatched
GPIO_LATCH_PIN20_Pos
GPIO_LATCH_PIN21_Latched
GPIO_LATCH_PIN21_Msk
GPIO_LATCH_PIN21_NotLatched
GPIO_LATCH_PIN21_Pos
GPIO_LATCH_PIN22_Latched
GPIO_LATCH_PIN22_Msk
GPIO_LATCH_PIN22_NotLatched
GPIO_LATCH_PIN22_Pos
GPIO_LATCH_PIN23_Latched
GPIO_LATCH_PIN23_Msk
GPIO_LATCH_PIN23_NotLatched
GPIO_LATCH_PIN23_Pos
GPIO_LATCH_PIN24_Latched
GPIO_LATCH_PIN24_Msk
GPIO_LATCH_PIN24_NotLatched
GPIO_LATCH_PIN24_Pos
GPIO_LATCH_PIN25_Latched
GPIO_LATCH_PIN25_Msk
GPIO_LATCH_PIN25_NotLatched
GPIO_LATCH_PIN25_Pos
GPIO_LATCH_PIN26_Latched
GPIO_LATCH_PIN26_Msk
GPIO_LATCH_PIN26_NotLatched
GPIO_LATCH_PIN26_Pos
GPIO_LATCH_PIN27_Latched
GPIO_LATCH_PIN27_Msk
GPIO_LATCH_PIN27_NotLatched
GPIO_LATCH_PIN27_Pos
GPIO_LATCH_PIN28_Latched
GPIO_LATCH_PIN28_Msk
GPIO_LATCH_PIN28_NotLatched
GPIO_LATCH_PIN28_Pos
GPIO_LATCH_PIN29_Latched
GPIO_LATCH_PIN29_Msk
GPIO_LATCH_PIN29_NotLatched
GPIO_LATCH_PIN29_Pos
GPIO_LATCH_PIN2_Latched
GPIO_LATCH_PIN2_Msk
GPIO_LATCH_PIN2_NotLatched
GPIO_LATCH_PIN2_Pos
GPIO_LATCH_PIN30_Latched
GPIO_LATCH_PIN30_Msk
GPIO_LATCH_PIN30_NotLatched
GPIO_LATCH_PIN30_Pos
GPIO_LATCH_PIN31_Latched
GPIO_LATCH_PIN31_Msk
GPIO_LATCH_PIN31_NotLatched
GPIO_LATCH_PIN31_Pos
GPIO_LATCH_PIN3_Latched
GPIO_LATCH_PIN3_Msk
GPIO_LATCH_PIN3_NotLatched
GPIO_LATCH_PIN3_Pos
GPIO_LATCH_PIN4_Latched
GPIO_LATCH_PIN4_Msk
GPIO_LATCH_PIN4_NotLatched
GPIO_LATCH_PIN4_Pos
GPIO_LATCH_PIN5_Latched
GPIO_LATCH_PIN5_Msk
GPIO_LATCH_PIN5_NotLatched
GPIO_LATCH_PIN5_Pos
GPIO_LATCH_PIN6_Latched
GPIO_LATCH_PIN6_Msk
GPIO_LATCH_PIN6_NotLatched
GPIO_LATCH_PIN6_Pos
GPIO_LATCH_PIN7_Latched
GPIO_LATCH_PIN7_Msk
GPIO_LATCH_PIN7_NotLatched
GPIO_LATCH_PIN7_Pos
GPIO_LATCH_PIN8_Latched
GPIO_LATCH_PIN8_Msk
GPIO_LATCH_PIN8_NotLatched
GPIO_LATCH_PIN8_Pos
GPIO_LATCH_PIN9_Latched
GPIO_LATCH_PIN9_Msk
GPIO_LATCH_PIN9_NotLatched
GPIO_LATCH_PIN9_Pos
GPIO_OUTCLR_PIN0_Clear
GPIO_OUTCLR_PIN0_High
GPIO_OUTCLR_PIN0_Low
GPIO_OUTCLR_PIN0_Msk
GPIO_OUTCLR_PIN0_Pos
GPIO_OUTCLR_PIN10_Clear
GPIO_OUTCLR_PIN10_High
GPIO_OUTCLR_PIN10_Low
GPIO_OUTCLR_PIN10_Msk
GPIO_OUTCLR_PIN10_Pos
GPIO_OUTCLR_PIN11_Clear
GPIO_OUTCLR_PIN11_High
GPIO_OUTCLR_PIN11_Low
GPIO_OUTCLR_PIN11_Msk
GPIO_OUTCLR_PIN11_Pos
GPIO_OUTCLR_PIN12_Clear
GPIO_OUTCLR_PIN12_High
GPIO_OUTCLR_PIN12_Low
GPIO_OUTCLR_PIN12_Msk
GPIO_OUTCLR_PIN12_Pos
GPIO_OUTCLR_PIN13_Clear
GPIO_OUTCLR_PIN13_High
GPIO_OUTCLR_PIN13_Low
GPIO_OUTCLR_PIN13_Msk
GPIO_OUTCLR_PIN13_Pos
GPIO_OUTCLR_PIN14_Clear
GPIO_OUTCLR_PIN14_High
GPIO_OUTCLR_PIN14_Low
GPIO_OUTCLR_PIN14_Msk
GPIO_OUTCLR_PIN14_Pos
GPIO_OUTCLR_PIN15_Clear
GPIO_OUTCLR_PIN15_High
GPIO_OUTCLR_PIN15_Low
GPIO_OUTCLR_PIN15_Msk
GPIO_OUTCLR_PIN15_Pos
GPIO_OUTCLR_PIN16_Clear
GPIO_OUTCLR_PIN16_High
GPIO_OUTCLR_PIN16_Low
GPIO_OUTCLR_PIN16_Msk
GPIO_OUTCLR_PIN16_Pos
GPIO_OUTCLR_PIN17_Clear
GPIO_OUTCLR_PIN17_High
GPIO_OUTCLR_PIN17_Low
GPIO_OUTCLR_PIN17_Msk
GPIO_OUTCLR_PIN17_Pos
GPIO_OUTCLR_PIN18_Clear
GPIO_OUTCLR_PIN18_High
GPIO_OUTCLR_PIN18_Low
GPIO_OUTCLR_PIN18_Msk
GPIO_OUTCLR_PIN18_Pos
GPIO_OUTCLR_PIN19_Clear
GPIO_OUTCLR_PIN19_High
GPIO_OUTCLR_PIN19_Low
GPIO_OUTCLR_PIN19_Msk
GPIO_OUTCLR_PIN19_Pos
GPIO_OUTCLR_PIN1_Clear
GPIO_OUTCLR_PIN1_High
GPIO_OUTCLR_PIN1_Low
GPIO_OUTCLR_PIN1_Msk
GPIO_OUTCLR_PIN1_Pos
GPIO_OUTCLR_PIN20_Clear
GPIO_OUTCLR_PIN20_High
GPIO_OUTCLR_PIN20_Low
GPIO_OUTCLR_PIN20_Msk
GPIO_OUTCLR_PIN20_Pos
GPIO_OUTCLR_PIN21_Clear
GPIO_OUTCLR_PIN21_High
GPIO_OUTCLR_PIN21_Low
GPIO_OUTCLR_PIN21_Msk
GPIO_OUTCLR_PIN21_Pos
GPIO_OUTCLR_PIN22_Clear
GPIO_OUTCLR_PIN22_High
GPIO_OUTCLR_PIN22_Low
GPIO_OUTCLR_PIN22_Msk
GPIO_OUTCLR_PIN22_Pos
GPIO_OUTCLR_PIN23_Clear
GPIO_OUTCLR_PIN23_High
GPIO_OUTCLR_PIN23_Low
GPIO_OUTCLR_PIN23_Msk
GPIO_OUTCLR_PIN23_Pos
GPIO_OUTCLR_PIN24_Clear
GPIO_OUTCLR_PIN24_High
GPIO_OUTCLR_PIN24_Low
GPIO_OUTCLR_PIN24_Msk
GPIO_OUTCLR_PIN24_Pos
GPIO_OUTCLR_PIN25_Clear
GPIO_OUTCLR_PIN25_High
GPIO_OUTCLR_PIN25_Low
GPIO_OUTCLR_PIN25_Msk
GPIO_OUTCLR_PIN25_Pos
GPIO_OUTCLR_PIN26_Clear
GPIO_OUTCLR_PIN26_High
GPIO_OUTCLR_PIN26_Low
GPIO_OUTCLR_PIN26_Msk
GPIO_OUTCLR_PIN26_Pos
GPIO_OUTCLR_PIN27_Clear
GPIO_OUTCLR_PIN27_High
GPIO_OUTCLR_PIN27_Low
GPIO_OUTCLR_PIN27_Msk
GPIO_OUTCLR_PIN27_Pos
GPIO_OUTCLR_PIN28_Clear
GPIO_OUTCLR_PIN28_High
GPIO_OUTCLR_PIN28_Low
GPIO_OUTCLR_PIN28_Msk
GPIO_OUTCLR_PIN28_Pos
GPIO_OUTCLR_PIN29_Clear
GPIO_OUTCLR_PIN29_High
GPIO_OUTCLR_PIN29_Low
GPIO_OUTCLR_PIN29_Msk
GPIO_OUTCLR_PIN29_Pos
GPIO_OUTCLR_PIN2_Clear
GPIO_OUTCLR_PIN2_High
GPIO_OUTCLR_PIN2_Low
GPIO_OUTCLR_PIN2_Msk
GPIO_OUTCLR_PIN2_Pos
GPIO_OUTCLR_PIN30_Clear
GPIO_OUTCLR_PIN30_High
GPIO_OUTCLR_PIN30_Low
GPIO_OUTCLR_PIN30_Msk
GPIO_OUTCLR_PIN30_Pos
GPIO_OUTCLR_PIN31_Clear
GPIO_OUTCLR_PIN31_High
GPIO_OUTCLR_PIN31_Low
GPIO_OUTCLR_PIN31_Msk
GPIO_OUTCLR_PIN31_Pos
GPIO_OUTCLR_PIN3_Clear
GPIO_OUTCLR_PIN3_High
GPIO_OUTCLR_PIN3_Low
GPIO_OUTCLR_PIN3_Msk
GPIO_OUTCLR_PIN3_Pos
GPIO_OUTCLR_PIN4_Clear
GPIO_OUTCLR_PIN4_High
GPIO_OUTCLR_PIN4_Low
GPIO_OUTCLR_PIN4_Msk
GPIO_OUTCLR_PIN4_Pos
GPIO_OUTCLR_PIN5_Clear
GPIO_OUTCLR_PIN5_High
GPIO_OUTCLR_PIN5_Low
GPIO_OUTCLR_PIN5_Msk
GPIO_OUTCLR_PIN5_Pos
GPIO_OUTCLR_PIN6_Clear
GPIO_OUTCLR_PIN6_High
GPIO_OUTCLR_PIN6_Low
GPIO_OUTCLR_PIN6_Msk
GPIO_OUTCLR_PIN6_Pos
GPIO_OUTCLR_PIN7_Clear
GPIO_OUTCLR_PIN7_High
GPIO_OUTCLR_PIN7_Low
GPIO_OUTCLR_PIN7_Msk
GPIO_OUTCLR_PIN7_Pos
GPIO_OUTCLR_PIN8_Clear
GPIO_OUTCLR_PIN8_High
GPIO_OUTCLR_PIN8_Low
GPIO_OUTCLR_PIN8_Msk
GPIO_OUTCLR_PIN8_Pos
GPIO_OUTCLR_PIN9_Clear
GPIO_OUTCLR_PIN9_High
GPIO_OUTCLR_PIN9_Low
GPIO_OUTCLR_PIN9_Msk
GPIO_OUTCLR_PIN9_Pos
GPIO_OUTSET_PIN0_High
GPIO_OUTSET_PIN0_Low
GPIO_OUTSET_PIN0_Msk
GPIO_OUTSET_PIN0_Pos
GPIO_OUTSET_PIN0_Set
GPIO_OUTSET_PIN10_High
GPIO_OUTSET_PIN10_Low
GPIO_OUTSET_PIN10_Msk
GPIO_OUTSET_PIN10_Pos
GPIO_OUTSET_PIN10_Set
GPIO_OUTSET_PIN11_High
GPIO_OUTSET_PIN11_Low
GPIO_OUTSET_PIN11_Msk
GPIO_OUTSET_PIN11_Pos
GPIO_OUTSET_PIN11_Set
GPIO_OUTSET_PIN12_High
GPIO_OUTSET_PIN12_Low
GPIO_OUTSET_PIN12_Msk
GPIO_OUTSET_PIN12_Pos
GPIO_OUTSET_PIN12_Set
GPIO_OUTSET_PIN13_High
GPIO_OUTSET_PIN13_Low
GPIO_OUTSET_PIN13_Msk
GPIO_OUTSET_PIN13_Pos
GPIO_OUTSET_PIN13_Set
GPIO_OUTSET_PIN14_High
GPIO_OUTSET_PIN14_Low
GPIO_OUTSET_PIN14_Msk
GPIO_OUTSET_PIN14_Pos
GPIO_OUTSET_PIN14_Set
GPIO_OUTSET_PIN15_High
GPIO_OUTSET_PIN15_Low
GPIO_OUTSET_PIN15_Msk
GPIO_OUTSET_PIN15_Pos
GPIO_OUTSET_PIN15_Set
GPIO_OUTSET_PIN16_High
GPIO_OUTSET_PIN16_Low
GPIO_OUTSET_PIN16_Msk
GPIO_OUTSET_PIN16_Pos
GPIO_OUTSET_PIN16_Set
GPIO_OUTSET_PIN17_High
GPIO_OUTSET_PIN17_Low
GPIO_OUTSET_PIN17_Msk
GPIO_OUTSET_PIN17_Pos
GPIO_OUTSET_PIN17_Set
GPIO_OUTSET_PIN18_High
GPIO_OUTSET_PIN18_Low
GPIO_OUTSET_PIN18_Msk
GPIO_OUTSET_PIN18_Pos
GPIO_OUTSET_PIN18_Set
GPIO_OUTSET_PIN19_High
GPIO_OUTSET_PIN19_Low
GPIO_OUTSET_PIN19_Msk
GPIO_OUTSET_PIN19_Pos
GPIO_OUTSET_PIN19_Set
GPIO_OUTSET_PIN1_High
GPIO_OUTSET_PIN1_Low
GPIO_OUTSET_PIN1_Msk
GPIO_OUTSET_PIN1_Pos
GPIO_OUTSET_PIN1_Set
GPIO_OUTSET_PIN20_High
GPIO_OUTSET_PIN20_Low
GPIO_OUTSET_PIN20_Msk
GPIO_OUTSET_PIN20_Pos
GPIO_OUTSET_PIN20_Set
GPIO_OUTSET_PIN21_High
GPIO_OUTSET_PIN21_Low
GPIO_OUTSET_PIN21_Msk
GPIO_OUTSET_PIN21_Pos
GPIO_OUTSET_PIN21_Set
GPIO_OUTSET_PIN22_High
GPIO_OUTSET_PIN22_Low
GPIO_OUTSET_PIN22_Msk
GPIO_OUTSET_PIN22_Pos
GPIO_OUTSET_PIN22_Set
GPIO_OUTSET_PIN23_High
GPIO_OUTSET_PIN23_Low
GPIO_OUTSET_PIN23_Msk
GPIO_OUTSET_PIN23_Pos
GPIO_OUTSET_PIN23_Set
GPIO_OUTSET_PIN24_High
GPIO_OUTSET_PIN24_Low
GPIO_OUTSET_PIN24_Msk
GPIO_OUTSET_PIN24_Pos
GPIO_OUTSET_PIN24_Set
GPIO_OUTSET_PIN25_High
GPIO_OUTSET_PIN25_Low
GPIO_OUTSET_PIN25_Msk
GPIO_OUTSET_PIN25_Pos
GPIO_OUTSET_PIN25_Set
GPIO_OUTSET_PIN26_High
GPIO_OUTSET_PIN26_Low
GPIO_OUTSET_PIN26_Msk
GPIO_OUTSET_PIN26_Pos
GPIO_OUTSET_PIN26_Set
GPIO_OUTSET_PIN27_High
GPIO_OUTSET_PIN27_Low
GPIO_OUTSET_PIN27_Msk
GPIO_OUTSET_PIN27_Pos
GPIO_OUTSET_PIN27_Set
GPIO_OUTSET_PIN28_High
GPIO_OUTSET_PIN28_Low
GPIO_OUTSET_PIN28_Msk
GPIO_OUTSET_PIN28_Pos
GPIO_OUTSET_PIN28_Set
GPIO_OUTSET_PIN29_High
GPIO_OUTSET_PIN29_Low
GPIO_OUTSET_PIN29_Msk
GPIO_OUTSET_PIN29_Pos
GPIO_OUTSET_PIN29_Set
GPIO_OUTSET_PIN2_High
GPIO_OUTSET_PIN2_Low
GPIO_OUTSET_PIN2_Msk
GPIO_OUTSET_PIN2_Pos
GPIO_OUTSET_PIN2_Set
GPIO_OUTSET_PIN30_High
GPIO_OUTSET_PIN30_Low
GPIO_OUTSET_PIN30_Msk
GPIO_OUTSET_PIN30_Pos
GPIO_OUTSET_PIN30_Set
GPIO_OUTSET_PIN31_High
GPIO_OUTSET_PIN31_Low
GPIO_OUTSET_PIN31_Msk
GPIO_OUTSET_PIN31_Pos
GPIO_OUTSET_PIN31_Set
GPIO_OUTSET_PIN3_High
GPIO_OUTSET_PIN3_Low
GPIO_OUTSET_PIN3_Msk
GPIO_OUTSET_PIN3_Pos
GPIO_OUTSET_PIN3_Set
GPIO_OUTSET_PIN4_High
GPIO_OUTSET_PIN4_Low
GPIO_OUTSET_PIN4_Msk
GPIO_OUTSET_PIN4_Pos
GPIO_OUTSET_PIN4_Set
GPIO_OUTSET_PIN5_High
GPIO_OUTSET_PIN5_Low
GPIO_OUTSET_PIN5_Msk
GPIO_OUTSET_PIN5_Pos
GPIO_OUTSET_PIN5_Set
GPIO_OUTSET_PIN6_High
GPIO_OUTSET_PIN6_Low
GPIO_OUTSET_PIN6_Msk
GPIO_OUTSET_PIN6_Pos
GPIO_OUTSET_PIN6_Set
GPIO_OUTSET_PIN7_High
GPIO_OUTSET_PIN7_Low
GPIO_OUTSET_PIN7_Msk
GPIO_OUTSET_PIN7_Pos
GPIO_OUTSET_PIN7_Set
GPIO_OUTSET_PIN8_High
GPIO_OUTSET_PIN8_Low
GPIO_OUTSET_PIN8_Msk
GPIO_OUTSET_PIN8_Pos
GPIO_OUTSET_PIN8_Set
GPIO_OUTSET_PIN9_High
GPIO_OUTSET_PIN9_Low
GPIO_OUTSET_PIN9_Msk
GPIO_OUTSET_PIN9_Pos
GPIO_OUTSET_PIN9_Set
GPIO_OUT_PIN0_High
GPIO_OUT_PIN0_Low
GPIO_OUT_PIN0_Msk
GPIO_OUT_PIN0_Pos
GPIO_OUT_PIN10_High
GPIO_OUT_PIN10_Low
GPIO_OUT_PIN10_Msk
GPIO_OUT_PIN10_Pos
GPIO_OUT_PIN11_High
GPIO_OUT_PIN11_Low
GPIO_OUT_PIN11_Msk
GPIO_OUT_PIN11_Pos
GPIO_OUT_PIN12_High
GPIO_OUT_PIN12_Low
GPIO_OUT_PIN12_Msk
GPIO_OUT_PIN12_Pos
GPIO_OUT_PIN13_High
GPIO_OUT_PIN13_Low
GPIO_OUT_PIN13_Msk
GPIO_OUT_PIN13_Pos
GPIO_OUT_PIN14_High
GPIO_OUT_PIN14_Low
GPIO_OUT_PIN14_Msk
GPIO_OUT_PIN14_Pos
GPIO_OUT_PIN15_High
GPIO_OUT_PIN15_Low
GPIO_OUT_PIN15_Msk
GPIO_OUT_PIN15_Pos
GPIO_OUT_PIN16_High
GPIO_OUT_PIN16_Low
GPIO_OUT_PIN16_Msk
GPIO_OUT_PIN16_Pos
GPIO_OUT_PIN17_High
GPIO_OUT_PIN17_Low
GPIO_OUT_PIN17_Msk
GPIO_OUT_PIN17_Pos
GPIO_OUT_PIN18_High
GPIO_OUT_PIN18_Low
GPIO_OUT_PIN18_Msk
GPIO_OUT_PIN18_Pos
GPIO_OUT_PIN19_High
GPIO_OUT_PIN19_Low
GPIO_OUT_PIN19_Msk
GPIO_OUT_PIN19_Pos
GPIO_OUT_PIN1_High
GPIO_OUT_PIN1_Low
GPIO_OUT_PIN1_Msk
GPIO_OUT_PIN1_Pos
GPIO_OUT_PIN20_High
GPIO_OUT_PIN20_Low
GPIO_OUT_PIN20_Msk
GPIO_OUT_PIN20_Pos
GPIO_OUT_PIN21_High
GPIO_OUT_PIN21_Low
GPIO_OUT_PIN21_Msk
GPIO_OUT_PIN21_Pos
GPIO_OUT_PIN22_High
GPIO_OUT_PIN22_Low
GPIO_OUT_PIN22_Msk
GPIO_OUT_PIN22_Pos
GPIO_OUT_PIN23_High
GPIO_OUT_PIN23_Low
GPIO_OUT_PIN23_Msk
GPIO_OUT_PIN23_Pos
GPIO_OUT_PIN24_High
GPIO_OUT_PIN24_Low
GPIO_OUT_PIN24_Msk
GPIO_OUT_PIN24_Pos
GPIO_OUT_PIN25_High
GPIO_OUT_PIN25_Low
GPIO_OUT_PIN25_Msk
GPIO_OUT_PIN25_Pos
GPIO_OUT_PIN26_High
GPIO_OUT_PIN26_Low
GPIO_OUT_PIN26_Msk
GPIO_OUT_PIN26_Pos
GPIO_OUT_PIN27_High
GPIO_OUT_PIN27_Low
GPIO_OUT_PIN27_Msk
GPIO_OUT_PIN27_Pos
GPIO_OUT_PIN28_High
GPIO_OUT_PIN28_Low
GPIO_OUT_PIN28_Msk
GPIO_OUT_PIN28_Pos
GPIO_OUT_PIN29_High
GPIO_OUT_PIN29_Low
GPIO_OUT_PIN29_Msk
GPIO_OUT_PIN29_Pos
GPIO_OUT_PIN2_High
GPIO_OUT_PIN2_Low
GPIO_OUT_PIN2_Msk
GPIO_OUT_PIN2_Pos
GPIO_OUT_PIN30_High
GPIO_OUT_PIN30_Low
GPIO_OUT_PIN30_Msk
GPIO_OUT_PIN30_Pos
GPIO_OUT_PIN31_High
GPIO_OUT_PIN31_Low
GPIO_OUT_PIN31_Msk
GPIO_OUT_PIN31_Pos
GPIO_OUT_PIN3_High
GPIO_OUT_PIN3_Low
GPIO_OUT_PIN3_Msk
GPIO_OUT_PIN3_Pos
GPIO_OUT_PIN4_High
GPIO_OUT_PIN4_Low
GPIO_OUT_PIN4_Msk
GPIO_OUT_PIN4_Pos
GPIO_OUT_PIN5_High
GPIO_OUT_PIN5_Low
GPIO_OUT_PIN5_Msk
GPIO_OUT_PIN5_Pos
GPIO_OUT_PIN6_High
GPIO_OUT_PIN6_Low
GPIO_OUT_PIN6_Msk
GPIO_OUT_PIN6_Pos
GPIO_OUT_PIN7_High
GPIO_OUT_PIN7_Low
GPIO_OUT_PIN7_Msk
GPIO_OUT_PIN7_Pos
GPIO_OUT_PIN8_High
GPIO_OUT_PIN8_Low
GPIO_OUT_PIN8_Msk
GPIO_OUT_PIN8_Pos
GPIO_OUT_PIN9_High
GPIO_OUT_PIN9_Low
GPIO_OUT_PIN9_Msk
GPIO_OUT_PIN9_Pos
GPIO_PIN_CNF_DIR_Input
GPIO_PIN_CNF_DIR_Msk
GPIO_PIN_CNF_DIR_Output
GPIO_PIN_CNF_DIR_Pos
GPIO_PIN_CNF_DRIVE_D0H1
GPIO_PIN_CNF_DRIVE_D0S1
GPIO_PIN_CNF_DRIVE_H0D1
GPIO_PIN_CNF_DRIVE_H0H1
GPIO_PIN_CNF_DRIVE_H0S1
GPIO_PIN_CNF_DRIVE_Msk
GPIO_PIN_CNF_DRIVE_Pos
GPIO_PIN_CNF_DRIVE_S0D1
GPIO_PIN_CNF_DRIVE_S0H1
GPIO_PIN_CNF_DRIVE_S0S1
GPIO_PIN_CNF_INPUT_Connect
GPIO_PIN_CNF_INPUT_Disconnect
GPIO_PIN_CNF_INPUT_Msk
GPIO_PIN_CNF_INPUT_Pos
GPIO_PIN_CNF_PULL_Disabled
GPIO_PIN_CNF_PULL_Msk
GPIO_PIN_CNF_PULL_Pos
GPIO_PIN_CNF_PULL_Pulldown
GPIO_PIN_CNF_PULL_Pullup
GPIO_PIN_CNF_SENSE_Disabled
GPIO_PIN_CNF_SENSE_High
GPIO_PIN_CNF_SENSE_Low
GPIO_PIN_CNF_SENSE_Msk
GPIO_PIN_CNF_SENSE_Pos
HAVE_INITFINI_ARRAY
HA_FLAG_PERM_RW
HOURS_PER_DAY
I2C_10BIT_MAGIC
I2C_READ
I2S_CONFIG_ALIGN_ALIGN_Left
I2S_CONFIG_ALIGN_ALIGN_Msk
I2S_CONFIG_ALIGN_ALIGN_Pos
I2S_CONFIG_ALIGN_ALIGN_Right
I2S_CONFIG_CHANNELS_CHANNELS_Left
I2S_CONFIG_CHANNELS_CHANNELS_Msk
I2S_CONFIG_CHANNELS_CHANNELS_Pos
I2S_CONFIG_CHANNELS_CHANNELS_Right
I2S_CONFIG_CHANNELS_CHANNELS_Stereo
I2S_CONFIG_FORMAT_FORMAT_Aligned
I2S_CONFIG_FORMAT_FORMAT_I2S
I2S_CONFIG_FORMAT_FORMAT_Msk
I2S_CONFIG_FORMAT_FORMAT_Pos
I2S_CONFIG_MCKEN_MCKEN_Disabled
I2S_CONFIG_MCKEN_MCKEN_Enabled
I2S_CONFIG_MCKEN_MCKEN_Msk
I2S_CONFIG_MCKEN_MCKEN_Pos
I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV10
I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV11
I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV125
I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV15
I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV16
I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV21
I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV23
I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV30
I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV31
I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV32
I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV42
I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV63
I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV8
I2S_CONFIG_MCKFREQ_MCKFREQ_Msk
I2S_CONFIG_MCKFREQ_MCKFREQ_Pos
I2S_CONFIG_MODE_MODE_Master
I2S_CONFIG_MODE_MODE_Msk
I2S_CONFIG_MODE_MODE_Pos
I2S_CONFIG_MODE_MODE_Slave
I2S_CONFIG_RATIO_RATIO_128X
I2S_CONFIG_RATIO_RATIO_192X
I2S_CONFIG_RATIO_RATIO_256X
I2S_CONFIG_RATIO_RATIO_32X
I2S_CONFIG_RATIO_RATIO_384X
I2S_CONFIG_RATIO_RATIO_48X
I2S_CONFIG_RATIO_RATIO_512X
I2S_CONFIG_RATIO_RATIO_64X
I2S_CONFIG_RATIO_RATIO_96X
I2S_CONFIG_RATIO_RATIO_Msk
I2S_CONFIG_RATIO_RATIO_Pos
I2S_CONFIG_RXEN_RXEN_Disabled
I2S_CONFIG_RXEN_RXEN_Enabled
I2S_CONFIG_RXEN_RXEN_Msk
I2S_CONFIG_RXEN_RXEN_Pos
I2S_CONFIG_SWIDTH_SWIDTH_16Bit
I2S_CONFIG_SWIDTH_SWIDTH_24Bit
I2S_CONFIG_SWIDTH_SWIDTH_8Bit
I2S_CONFIG_SWIDTH_SWIDTH_Msk
I2S_CONFIG_SWIDTH_SWIDTH_Pos
I2S_CONFIG_TXEN_TXEN_Disabled
I2S_CONFIG_TXEN_TXEN_Enabled
I2S_CONFIG_TXEN_TXEN_Msk
I2S_CONFIG_TXEN_TXEN_Pos
I2S_COUNT
I2S_EASYDMA_MAXCNT_SIZE
I2S_ENABLE_ENABLE_Disabled
I2S_ENABLE_ENABLE_Enabled
I2S_ENABLE_ENABLE_Msk
I2S_ENABLE_ENABLE_Pos
I2S_EVENTS_RXPTRUPD_EVENTS_RXPTRUPD_Generated
I2S_EVENTS_RXPTRUPD_EVENTS_RXPTRUPD_Msk
I2S_EVENTS_RXPTRUPD_EVENTS_RXPTRUPD_NotGenerated
I2S_EVENTS_RXPTRUPD_EVENTS_RXPTRUPD_Pos
I2S_EVENTS_STOPPED_EVENTS_STOPPED_Generated
I2S_EVENTS_STOPPED_EVENTS_STOPPED_Msk
I2S_EVENTS_STOPPED_EVENTS_STOPPED_NotGenerated
I2S_EVENTS_STOPPED_EVENTS_STOPPED_Pos
I2S_EVENTS_TXPTRUPD_EVENTS_TXPTRUPD_Generated
I2S_EVENTS_TXPTRUPD_EVENTS_TXPTRUPD_Msk
I2S_EVENTS_TXPTRUPD_EVENTS_TXPTRUPD_NotGenerated
I2S_EVENTS_TXPTRUPD_EVENTS_TXPTRUPD_Pos
I2S_INTENCLR_RXPTRUPD_Clear
I2S_INTENCLR_RXPTRUPD_Disabled
I2S_INTENCLR_RXPTRUPD_Enabled
I2S_INTENCLR_RXPTRUPD_Msk
I2S_INTENCLR_RXPTRUPD_Pos
I2S_INTENCLR_STOPPED_Clear
I2S_INTENCLR_STOPPED_Disabled
I2S_INTENCLR_STOPPED_Enabled
I2S_INTENCLR_STOPPED_Msk
I2S_INTENCLR_STOPPED_Pos
I2S_INTENCLR_TXPTRUPD_Clear
I2S_INTENCLR_TXPTRUPD_Disabled
I2S_INTENCLR_TXPTRUPD_Enabled
I2S_INTENCLR_TXPTRUPD_Msk
I2S_INTENCLR_TXPTRUPD_Pos
I2S_INTENSET_RXPTRUPD_Disabled
I2S_INTENSET_RXPTRUPD_Enabled
I2S_INTENSET_RXPTRUPD_Msk
I2S_INTENSET_RXPTRUPD_Pos
I2S_INTENSET_RXPTRUPD_Set
I2S_INTENSET_STOPPED_Disabled
I2S_INTENSET_STOPPED_Enabled
I2S_INTENSET_STOPPED_Msk
I2S_INTENSET_STOPPED_Pos
I2S_INTENSET_STOPPED_Set
I2S_INTENSET_TXPTRUPD_Disabled
I2S_INTENSET_TXPTRUPD_Enabled
I2S_INTENSET_TXPTRUPD_Msk
I2S_INTENSET_TXPTRUPD_Pos
I2S_INTENSET_TXPTRUPD_Set
I2S_INTEN_RXPTRUPD_Disabled
I2S_INTEN_RXPTRUPD_Enabled
I2S_INTEN_RXPTRUPD_Msk
I2S_INTEN_RXPTRUPD_Pos
I2S_INTEN_STOPPED_Disabled
I2S_INTEN_STOPPED_Enabled
I2S_INTEN_STOPPED_Msk
I2S_INTEN_STOPPED_Pos
I2S_INTEN_TXPTRUPD_Disabled
I2S_INTEN_TXPTRUPD_Enabled
I2S_INTEN_TXPTRUPD_Msk
I2S_INTEN_TXPTRUPD_Pos
I2S_PSEL_LRCK_CONNECT_Connected
I2S_PSEL_LRCK_CONNECT_Disconnected
I2S_PSEL_LRCK_CONNECT_Msk
I2S_PSEL_LRCK_CONNECT_Pos
I2S_PSEL_LRCK_PIN_Msk
I2S_PSEL_LRCK_PIN_Pos
I2S_PSEL_LRCK_PORT_Msk
I2S_PSEL_LRCK_PORT_Pos
I2S_PSEL_MCK_CONNECT_Connected
I2S_PSEL_MCK_CONNECT_Disconnected
I2S_PSEL_MCK_CONNECT_Msk
I2S_PSEL_MCK_CONNECT_Pos
I2S_PSEL_MCK_PIN_Msk
I2S_PSEL_MCK_PIN_Pos
I2S_PSEL_MCK_PORT_Msk
I2S_PSEL_MCK_PORT_Pos
I2S_PSEL_SCK_CONNECT_Connected
I2S_PSEL_SCK_CONNECT_Disconnected
I2S_PSEL_SCK_CONNECT_Msk
I2S_PSEL_SCK_CONNECT_Pos
I2S_PSEL_SCK_PIN_Msk
I2S_PSEL_SCK_PIN_Pos
I2S_PSEL_SCK_PORT_Msk
I2S_PSEL_SCK_PORT_Pos
I2S_PSEL_SDIN_CONNECT_Connected
I2S_PSEL_SDIN_CONNECT_Disconnected
I2S_PSEL_SDIN_CONNECT_Msk
I2S_PSEL_SDIN_CONNECT_Pos
I2S_PSEL_SDIN_PIN_Msk
I2S_PSEL_SDIN_PIN_Pos
I2S_PSEL_SDIN_PORT_Msk
I2S_PSEL_SDIN_PORT_Pos
I2S_PSEL_SDOUT_CONNECT_Connected
I2S_PSEL_SDOUT_CONNECT_Disconnected
I2S_PSEL_SDOUT_CONNECT_Msk
I2S_PSEL_SDOUT_CONNECT_Pos
I2S_PSEL_SDOUT_PIN_Msk
I2S_PSEL_SDOUT_PIN_Pos
I2S_PSEL_SDOUT_PORT_Msk
I2S_PSEL_SDOUT_PORT_Pos
I2S_RXD_PTR_PTR_Msk
I2S_RXD_PTR_PTR_Pos
I2S_RXTXD_MAXCNT_MAXCNT_Msk
I2S_RXTXD_MAXCNT_MAXCNT_Pos
I2S_TASKS_START_TASKS_START_Msk
I2S_TASKS_START_TASKS_START_Pos
I2S_TASKS_START_TASKS_START_Trigger
I2S_TASKS_STOP_TASKS_STOP_Msk
I2S_TASKS_STOP_TASKS_STOP_Pos
I2S_TASKS_STOP_TASKS_STOP_Trigger
I2S_TXD_PTR_PTR_Msk
I2S_TXD_PTR_PTR_Pos
ICMPV6_DAC
ICMPV6_DAR
ICMPV6_DST_UNR
ICMPV6_ECHO_REP
ICMPV6_ECHO_REQ
ICMPV6_ERROR_DST_UNR_ADDR
ICMPV6_ERROR_DST_UNR_NO_ROUTE
ICMPV6_ERROR_DST_UNR_POLICY
ICMPV6_ERROR_DST_UNR_PORT
ICMPV6_ERROR_DST_UNR_PROHIB
ICMPV6_ERROR_DST_UNR_REJECT
ICMPV6_ERROR_DST_UNR_SCOPE
ICMPV6_ERROR_PARAM_PROB_HDR_FIELD
ICMPV6_ERROR_PARAM_PROB_NH
ICMPV6_ERROR_PARAM_PROB_OPT
ICMPV6_ERROR_TIME_EXC_FRAG
ICMPV6_ERROR_TIME_EXC_HL
ICMPV6_ERR_EXP1
ICMPV6_ERR_EXP2
ICMPV6_INF_EXP1
ICMPV6_INF_EXP2
ICMPV6_NBR_ADV
ICMPV6_NBR_SOL
ICMPV6_PARAM_PROB
ICMPV6_PKT_TOO_BIG
ICMPV6_REDIRECT
ICMPV6_RPL_CTRL
ICMPV6_RTR_ADV
ICMPV6_RTR_SOL
ICMPV6_TIME_EXC
IEEE802154G_FRAME_LEN_MAX
IEEE802154_ACK_FRAME_LEN
IEEE802154_ACK_TIMEOUT_SYMS
IEEE802154_ADDR_BCAST_LEN
IEEE802154_ATURNAROUNDTIME_IN_SYMBOLS
IEEE802154_CCA_DURATION_IN_SYMBOLS
IEEE802154_CHANNEL_MAX
IEEE802154_CHANNEL_MAX_SUBGHZ
IEEE802154_CHANNEL_MIN
IEEE802154_CHANNEL_MIN_SUBGHZ
IEEE802154_FCF_ACK_REQ
IEEE802154_FCF_DST_ADDR_LONG
IEEE802154_FCF_DST_ADDR_MASK
IEEE802154_FCF_DST_ADDR_RESV
IEEE802154_FCF_DST_ADDR_SHORT
IEEE802154_FCF_DST_ADDR_VOID
IEEE802154_FCF_FRAME_PEND
IEEE802154_FCF_LEN
IEEE802154_FCF_PAN_COMP
IEEE802154_FCF_SECURITY_EN
IEEE802154_FCF_SRC_ADDR_LONG
IEEE802154_FCF_SRC_ADDR_MASK
IEEE802154_FCF_SRC_ADDR_RESV
IEEE802154_FCF_SRC_ADDR_SHORT
IEEE802154_FCF_SRC_ADDR_VOID
IEEE802154_FCF_TYPE_ACK
IEEE802154_FCF_TYPE_BEACON
IEEE802154_FCF_TYPE_DATA
IEEE802154_FCF_TYPE_MACCMD
IEEE802154_FCF_TYPE_MASK
IEEE802154_FCF_VERS_MASK
IEEE802154_FCF_VERS_V0
IEEE802154_FCF_VERS_V1
IEEE802154_FCS_LEN
IEEE802154_FEC_NONE
IEEE802154_FEC_NRNSC
IEEE802154_FEC_RSC
IEEE802154_FRAME_LEN_MAX
IEEE802154_LIFS_SYMS
IEEE802154_LONG_ADDRESS_LEN
IEEE802154_MAX_HDR_LEN
IEEE802154_PHY_MR_FSK_2FSK_CODED_SFD_0
IEEE802154_PHY_MR_FSK_2FSK_CODED_SFD_1
IEEE802154_PHY_MR_FSK_2FSK_SFD_LEN
IEEE802154_PHY_MR_FSK_2FSK_UNCODED_SFD_0
IEEE802154_PHY_MR_FSK_2FSK_UNCODED_SFD_1
IEEE802154_PHY_MR_FSK_PHR_LEN
IEEE802154_RADIO_RSSI_OFFSET
IEEE802154_SFD
IEEE802154_SHORT_ADDRESS_LEN
IEEE802154_SIFS_MAX_FRAME_SIZE
IEEE802154_SIFS_SYMS
IOV_MAX
IPSR_ISR_Msk
IPSR_ISR_Pos
IPV6_ADDR_BIT_LEN
IPV6_ADDR_MCAST_FLAG_EMBED_ON_RP
IPV6_ADDR_MCAST_FLAG_PREFIX_BASED
IPV6_ADDR_MCAST_FLAG_TRANSIENT
IPV6_ADDR_MCAST_SCP_ADMIN_LOCAL
IPV6_ADDR_MCAST_SCP_GLOBAL
IPV6_ADDR_MCAST_SCP_IF_LOCAL
IPV6_ADDR_MCAST_SCP_LINK_LOCAL
IPV6_ADDR_MCAST_SCP_ORG_LOCAL
IPV6_ADDR_MCAST_SCP_REALM_LOCAL
IPV6_ADDR_MCAST_SCP_SITE_LOCAL
IPV6_ADDR_SITE_LOCAL_PREFIX
IPV6_EXT_FRAG_M
IPV6_EXT_FRAG_OFFSET_MASK
IPV6_EXT_LEN_UNIT
IPV6_EXT_RH_TYPE_0
IPV6_EXT_RH_TYPE_2
IPV6_EXT_RH_TYPE_NIMROD
IPV6_EXT_RH_TYPE_RPL_SRH
IPV6_MIN_MTU
IRQ_API_INLINED
IRQn_Type_BusFault_IRQn
IRQn_Type_CCM_AAR_IRQn
IRQn_Type_COMP_LPCOMP_IRQn
IRQn_Type_CRYPTOCELL_IRQn
IRQn_Type_DebugMonitor_IRQn
IRQn_Type_ECB_IRQn
IRQn_Type_FPU_IRQn
IRQn_Type_GPIOTE_IRQn
IRQn_Type_HardFault_IRQn
IRQn_Type_I2S_IRQn
IRQn_Type_MWU_IRQn
IRQn_Type_MemoryManagement_IRQn
IRQn_Type_NFCT_IRQn
IRQn_Type_NonMaskableInt_IRQn
IRQn_Type_PDM_IRQn
IRQn_Type_POWER_CLOCK_IRQn
IRQn_Type_PWM0_IRQn
IRQn_Type_PWM1_IRQn
IRQn_Type_PWM2_IRQn
IRQn_Type_PWM3_IRQn
IRQn_Type_PendSV_IRQn
IRQn_Type_QDEC_IRQn
IRQn_Type_QSPI_IRQn
IRQn_Type_RADIO_IRQn
IRQn_Type_RNG_IRQn
IRQn_Type_RTC0_IRQn
IRQn_Type_RTC1_IRQn
IRQn_Type_RTC2_IRQn
IRQn_Type_Reset_IRQn
IRQn_Type_SAADC_IRQn
IRQn_Type_SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQn
IRQn_Type_SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQn
IRQn_Type_SPIM2_SPIS2_SPI2_IRQn
IRQn_Type_SPIM3_IRQn
IRQn_Type_SVCall_IRQn
IRQn_Type_SWI0_EGU0_IRQn
IRQn_Type_SWI1_EGU1_IRQn
IRQn_Type_SWI2_EGU2_IRQn
IRQn_Type_SWI3_EGU3_IRQn
IRQn_Type_SWI4_EGU4_IRQn
IRQn_Type_SWI5_EGU5_IRQn
IRQn_Type_SysTick_IRQn
IRQn_Type_TEMP_IRQn
IRQn_Type_TIMER0_IRQn
IRQn_Type_TIMER1_IRQn
IRQn_Type_TIMER2_IRQn
IRQn_Type_TIMER3_IRQn
IRQn_Type_TIMER4_IRQn
IRQn_Type_UARTE0_UART0_IRQn
IRQn_Type_UARTE1_IRQn
IRQn_Type_USBD_IRQn
IRQn_Type_UsageFault_IRQn
IRQn_Type_WDT_IRQn
ISR_STACKSIZE
ITM_BASE
ITM_LSR_Access_Msk
ITM_LSR_Access_Pos
ITM_LSR_ByteAcc_Msk
ITM_LSR_ByteAcc_Pos
ITM_LSR_Present_Msk
ITM_LSR_Present_Pos
ITM_TCR_BUSY_Msk
ITM_TCR_BUSY_Pos
ITM_TCR_DWTENA_Msk
ITM_TCR_DWTENA_Pos
ITM_TCR_GTSFREQ_Msk
ITM_TCR_GTSFREQ_Pos
ITM_TCR_ITMENA_Msk
ITM_TCR_ITMENA_Pos
ITM_TCR_SWOENA_Msk
ITM_TCR_SWOENA_Pos
ITM_TCR_SYNCENA_Msk
ITM_TCR_SYNCENA_Pos
ITM_TCR_TSENA_Msk
ITM_TCR_TSENA_Pos
ITM_TCR_TSPrescale_Msk
ITM_TCR_TSPrescale_Pos
ITM_TCR_TraceBusID_Msk
ITM_TCR_TraceBusID_Pos
ITM_TPR_PRIVMASK_Msk
ITM_TPR_PRIVMASK_Pos
KERNEL_PID_FIRST
KERNEL_PID_ISR
KERNEL_PID_LAST
KERNEL_PID_UNDEF
L2UTIL_ADDR_MAX_LEN
LED_NUMOF
LINE_MAX
LINK_MAX
LITTLEFS2_VFS_DIR_BUFFER_SIZE
LITTLEFS2_VFS_FILE_BUFFER_SIZE
LITTLEFS_VFS_DIR_BUFFER_SIZE
LITTLEFS_VFS_FILE_BUFFER_SIZE
LITTLE_ENDIAN
LOGS_NMGR_OP_APPEND
LOGS_NMGR_OP_CLEAR
LOGS_NMGR_OP_LEVEL_LIST
LOGS_NMGR_OP_LOGS_LIST
LOGS_NMGR_OP_MODLEVEL
LOGS_NMGR_OP_MODULE_LIST
LOGS_NMGR_OP_READ
LOGS_NMGR_OP_SET_WATERMARK
LOG_ETYPE_BINARY
LOG_ETYPE_CBOR
LOG_ETYPE_STRING
LOG_LEVEL_CRITICAL
LOG_LEVEL_DEBUG
LOG_LEVEL_ERROR
LOG_LEVEL_INFO
LOG_LEVEL_MAX
LOG_LEVEL_WARN
LOG_MODULE_DEFAULT
LOG_MODULE_IOTIVITY
LOG_MODULE_MAX
LOG_MODULE_NEWTMGR
LOG_MODULE_NFFS
LOG_MODULE_NIMBLE_CTLR
LOG_MODULE_NIMBLE_HOST
LOG_MODULE_OS
LOG_MODULE_PERUSER
LOG_MODULE_REBOOT
LOG_MODULE_TEST
LOG_NAME_MAX_LEN
LOG_PRINTF_MAX_ENTRY_LEN
LOG_TYPE_MEMORY
LOG_TYPE_STORAGE
LOG_TYPE_STREAM
LOG_VERSION_V3
LPCOMP_ANADETECT_ANADETECT_Cross
LPCOMP_ANADETECT_ANADETECT_Down
LPCOMP_ANADETECT_ANADETECT_Msk
LPCOMP_ANADETECT_ANADETECT_Pos
LPCOMP_ANADETECT_ANADETECT_Up
LPCOMP_COUNT
LPCOMP_ENABLE_ENABLE_Disabled
LPCOMP_ENABLE_ENABLE_Enabled
LPCOMP_ENABLE_ENABLE_Msk
LPCOMP_ENABLE_ENABLE_Pos
LPCOMP_EVENTS_CROSS_EVENTS_CROSS_Generated
LPCOMP_EVENTS_CROSS_EVENTS_CROSS_Msk
LPCOMP_EVENTS_CROSS_EVENTS_CROSS_NotGenerated
LPCOMP_EVENTS_CROSS_EVENTS_CROSS_Pos
LPCOMP_EVENTS_DOWN_EVENTS_DOWN_Generated
LPCOMP_EVENTS_DOWN_EVENTS_DOWN_Msk
LPCOMP_EVENTS_DOWN_EVENTS_DOWN_NotGenerated
LPCOMP_EVENTS_DOWN_EVENTS_DOWN_Pos
LPCOMP_EVENTS_READY_EVENTS_READY_Generated
LPCOMP_EVENTS_READY_EVENTS_READY_Msk
LPCOMP_EVENTS_READY_EVENTS_READY_NotGenerated
LPCOMP_EVENTS_READY_EVENTS_READY_Pos
LPCOMP_EVENTS_UP_EVENTS_UP_Generated
LPCOMP_EVENTS_UP_EVENTS_UP_Msk
LPCOMP_EVENTS_UP_EVENTS_UP_NotGenerated
LPCOMP_EVENTS_UP_EVENTS_UP_Pos
LPCOMP_EXTREFSEL_EXTREFSEL_AnalogReference0
LPCOMP_EXTREFSEL_EXTREFSEL_AnalogReference1
LPCOMP_EXTREFSEL_EXTREFSEL_Msk
LPCOMP_EXTREFSEL_EXTREFSEL_Pos
LPCOMP_HYST_HYST_Disabled
LPCOMP_HYST_HYST_Enabled
LPCOMP_HYST_HYST_Msk
LPCOMP_HYST_HYST_Pos
LPCOMP_INTENCLR_CROSS_Clear
LPCOMP_INTENCLR_CROSS_Disabled
LPCOMP_INTENCLR_CROSS_Enabled
LPCOMP_INTENCLR_CROSS_Msk
LPCOMP_INTENCLR_CROSS_Pos
LPCOMP_INTENCLR_DOWN_Clear
LPCOMP_INTENCLR_DOWN_Disabled
LPCOMP_INTENCLR_DOWN_Enabled
LPCOMP_INTENCLR_DOWN_Msk
LPCOMP_INTENCLR_DOWN_Pos
LPCOMP_INTENCLR_READY_Clear
LPCOMP_INTENCLR_READY_Disabled
LPCOMP_INTENCLR_READY_Enabled
LPCOMP_INTENCLR_READY_Msk
LPCOMP_INTENCLR_READY_Pos
LPCOMP_INTENCLR_UP_Clear
LPCOMP_INTENCLR_UP_Disabled
LPCOMP_INTENCLR_UP_Enabled
LPCOMP_INTENCLR_UP_Msk
LPCOMP_INTENCLR_UP_Pos
LPCOMP_INTENSET_CROSS_Disabled
LPCOMP_INTENSET_CROSS_Enabled
LPCOMP_INTENSET_CROSS_Msk
LPCOMP_INTENSET_CROSS_Pos
LPCOMP_INTENSET_CROSS_Set
LPCOMP_INTENSET_DOWN_Disabled
LPCOMP_INTENSET_DOWN_Enabled
LPCOMP_INTENSET_DOWN_Msk
LPCOMP_INTENSET_DOWN_Pos
LPCOMP_INTENSET_DOWN_Set
LPCOMP_INTENSET_READY_Disabled
LPCOMP_INTENSET_READY_Enabled
LPCOMP_INTENSET_READY_Msk
LPCOMP_INTENSET_READY_Pos
LPCOMP_INTENSET_READY_Set
LPCOMP_INTENSET_UP_Disabled
LPCOMP_INTENSET_UP_Enabled
LPCOMP_INTENSET_UP_Msk
LPCOMP_INTENSET_UP_Pos
LPCOMP_INTENSET_UP_Set
LPCOMP_PSEL_PSEL_AnalogInput0
LPCOMP_PSEL_PSEL_AnalogInput1
LPCOMP_PSEL_PSEL_AnalogInput2
LPCOMP_PSEL_PSEL_AnalogInput3
LPCOMP_PSEL_PSEL_AnalogInput4
LPCOMP_PSEL_PSEL_AnalogInput5
LPCOMP_PSEL_PSEL_AnalogInput6
LPCOMP_PSEL_PSEL_AnalogInput7
LPCOMP_PSEL_PSEL_Msk
LPCOMP_PSEL_PSEL_Pos
LPCOMP_REFSEL_REFSEL_ARef
LPCOMP_REFSEL_REFSEL_Msk
LPCOMP_REFSEL_REFSEL_Pos
LPCOMP_REFSEL_REFSEL_Ref11_16Vdd
LPCOMP_REFSEL_REFSEL_Ref13_16Vdd
LPCOMP_REFSEL_REFSEL_Ref15_16Vdd
LPCOMP_REFSEL_REFSEL_Ref1_16Vdd
LPCOMP_REFSEL_REFSEL_Ref1_8Vdd
LPCOMP_REFSEL_REFSEL_Ref2_8Vdd
LPCOMP_REFSEL_REFSEL_Ref3_16Vdd
LPCOMP_REFSEL_REFSEL_Ref3_8Vdd
LPCOMP_REFSEL_REFSEL_Ref4_8Vdd
LPCOMP_REFSEL_REFSEL_Ref5_16Vdd
LPCOMP_REFSEL_REFSEL_Ref5_8Vdd
LPCOMP_REFSEL_REFSEL_Ref6_8Vdd
LPCOMP_REFSEL_REFSEL_Ref7_16Vdd
LPCOMP_REFSEL_REFSEL_Ref7_8Vdd
LPCOMP_REFSEL_REFSEL_Ref9_16Vdd
LPCOMP_REFSEL_RESOLUTION
LPCOMP_RESULT_RESULT_Above
LPCOMP_RESULT_RESULT_Below
LPCOMP_RESULT_RESULT_Msk
LPCOMP_RESULT_RESULT_Pos
LPCOMP_SHORTS_CROSS_STOP_Disabled
LPCOMP_SHORTS_CROSS_STOP_Enabled
LPCOMP_SHORTS_CROSS_STOP_Msk
LPCOMP_SHORTS_CROSS_STOP_Pos
LPCOMP_SHORTS_DOWN_STOP_Disabled
LPCOMP_SHORTS_DOWN_STOP_Enabled
LPCOMP_SHORTS_DOWN_STOP_Msk
LPCOMP_SHORTS_DOWN_STOP_Pos
LPCOMP_SHORTS_READY_SAMPLE_Disabled
LPCOMP_SHORTS_READY_SAMPLE_Enabled
LPCOMP_SHORTS_READY_SAMPLE_Msk
LPCOMP_SHORTS_READY_SAMPLE_Pos
LPCOMP_SHORTS_READY_STOP_Disabled
LPCOMP_SHORTS_READY_STOP_Enabled
LPCOMP_SHORTS_READY_STOP_Msk
LPCOMP_SHORTS_READY_STOP_Pos
LPCOMP_SHORTS_UP_STOP_Disabled
LPCOMP_SHORTS_UP_STOP_Enabled
LPCOMP_SHORTS_UP_STOP_Msk
LPCOMP_SHORTS_UP_STOP_Pos
LPCOMP_TASKS_SAMPLE_TASKS_SAMPLE_Msk
LPCOMP_TASKS_SAMPLE_TASKS_SAMPLE_Pos
LPCOMP_TASKS_SAMPLE_TASKS_SAMPLE_Trigger
LPCOMP_TASKS_START_TASKS_START_Msk
LPCOMP_TASKS_START_TASKS_START_Pos
LPCOMP_TASKS_START_TASKS_START_Trigger
LPCOMP_TASKS_STOP_TASKS_STOP_Msk
LPCOMP_TASKS_STOP_TASKS_STOP_Pos
LPCOMP_TASKS_STOP_TASKS_STOP_Trigger
LWEXT4_VFS_DIR_BUFFER_SIZE
LWEXT4_VFS_FILE_BUFFER_SIZE
L_tmpnam
MAXTHREADS
MAX_CANON
MAX_INPUT
MB_LEN_MAX
MD5_DIGEST_LENGTH
MIN_PER_DAY
MIN_PER_HOUR
MODLOG_MODULE_DFLT
MODULE_AUTO_INIT
MODULE_AUTO_INIT_GNRC_IPV6
MODULE_AUTO_INIT_GNRC_IPV6_NIB
MODULE_AUTO_INIT_GNRC_PKTBUF
MODULE_AUTO_INIT_GNRC_TCP
MODULE_AUTO_INIT_GNRC_UDP
MODULE_AUTO_INIT_LIBCOSE_CRYPT
MODULE_AUTO_INIT_RANDOM
MODULE_AUTO_INIT_SAUL
MODULE_AUTO_INIT_USBUS
MODULE_AUTO_INIT_ZTIMER
MODULE_BLUETIL_AD
MODULE_BOARD
MODULE_BOARD_COMMON_INIT
MODULE_C25519
MODULE_CMSIS
MODULE_CORE
MODULE_CORE_INIT
MODULE_CORE_LIB
MODULE_CORE_MBOX
MODULE_CORE_MSG
MODULE_CORE_PANIC
MODULE_CORE_THREAD
MODULE_CORE_THREAD_FLAGS
MODULE_CORTEXM_COMMON
MODULE_CORTEXM_COMMON_PERIPH
MODULE_CORTEXM_FPU
MODULE_CPU
MODULE_CPU_COMMON
MODULE_CRYPTO
MODULE_CRYPTO_AES_128
MODULE_DIV
MODULE_EVENT
MODULE_EVENT_CALLBACK
MODULE_EVENT_TIMEOUT_ZTIMER
MODULE_EVTIMER
MODULE_EVTIMER_MBOX
MODULE_FMT
MODULE_FRAC
MODULE_GCOAP
MODULE_GNRC
MODULE_GNRC_ICMPV6
MODULE_GNRC_IPV6
MODULE_GNRC_IPV6_HDR
MODULE_GNRC_IPV6_NIB
MODULE_GNRC_NDP
MODULE_GNRC_NETAPI
MODULE_GNRC_NETAPI_CALLBACKS
MODULE_GNRC_NETAPI_MBOX
MODULE_GNRC_NETIF
MODULE_GNRC_NETIF_HDR
MODULE_GNRC_NETIF_IPV6
MODULE_GNRC_NETREG
MODULE_GNRC_NETTYPE_ICMPV6
MODULE_GNRC_NETTYPE_IPV6
MODULE_GNRC_NETTYPE_TCP
MODULE_GNRC_NETTYPE_UDP
MODULE_GNRC_PKT
MODULE_GNRC_PKTBUF
MODULE_GNRC_PKTBUF_STATIC
MODULE_GNRC_SOCK
MODULE_GNRC_SOCK_ASYNC
MODULE_GNRC_SOCK_TCP
MODULE_GNRC_SOCK_UDP
MODULE_GNRC_TCP
MODULE_GNRC_UDP
MODULE_HASHES
MODULE_ICMPV6
MODULE_INET_CSUM
MODULE_IOLIST
MODULE_IPV6
MODULE_IPV6_ADDR
MODULE_IPV6_HDR
MODULE_ISRPIPE
MODULE_L2UTIL
MODULE_LIBC
MODULE_LIBCOSE
MODULE_LIBCOSE_CRYPT
MODULE_LIBCOSE_CRYPT_C25519
MODULE_LIBCOSE_CRYPT_INIT
MODULE_LUID
MODULE_MALLOC_THREAD_SAFE
MODULE_MPU_STACK_GUARD
MODULE_NANOCBOR
MODULE_NANOCOAP
MODULE_NANOCOAP_SOCK
MODULE_NETIF
MODULE_NEWLIB
MODULE_NEWLIB_NANO
MODULE_NEWLIB_SYSCALLS_DEFAULT
MODULE_NIMBLE
MODULE_NIMBLE_CONTROLLER
MODULE_NIMBLE_DRIVERS_NRF5X
MODULE_NIMBLE_HOST
MODULE_NIMBLE_HOST_STORE_RAM
MODULE_NIMBLE_HOST_UTIL
MODULE_NIMBLE_NPL_RIOT
MODULE_NIMBLE_PORTING_NIMBLE
MODULE_NIMBLE_RIOT_CONTRIB
MODULE_NIMBLE_TRANSPORT
MODULE_NRF52_VECTORS
MODULE_NRF5X_COMMON_PERIPH
MODULE_NRFX
MODULE_PERIPH
MODULE_PERIPH_ADC
MODULE_PERIPH_COMMON
MODULE_PERIPH_CPUID
MODULE_PERIPH_GPIO
MODULE_PERIPH_GPIO_LL_DISCONNECT
MODULE_PERIPH_GPIO_LL_INPUT_PULL_DOWN
MODULE_PERIPH_GPIO_LL_INPUT_PULL_UP
MODULE_PERIPH_GPIO_LL_IRQ_EDGE_TRIGGERED_BOTH
MODULE_PERIPH_GPIO_LL_IRQ_UNMASK
MODULE_PERIPH_GPIO_LL_OPEN_DRAIN
MODULE_PERIPH_GPIO_LL_OPEN_DRAIN_PULL_UP
MODULE_PERIPH_GPIO_LL_OPEN_SOURCE
MODULE_PERIPH_GPIO_LL_OPEN_SOURCE_PULL_DOWN
MODULE_PERIPH_HWRNG
MODULE_PERIPH_I2C
MODULE_PERIPH_INIT
MODULE_PERIPH_INIT_ADC
MODULE_PERIPH_INIT_CPUID
MODULE_PERIPH_INIT_GPIO
MODULE_PERIPH_INIT_HWRNG
MODULE_PERIPH_INIT_I2C
MODULE_PERIPH_INIT_LED0
MODULE_PERIPH_INIT_LED1
MODULE_PERIPH_INIT_LED2
MODULE_PERIPH_INIT_LED3
MODULE_PERIPH_INIT_LED4
MODULE_PERIPH_INIT_LED5
MODULE_PERIPH_INIT_LED6
MODULE_PERIPH_INIT_LED7
MODULE_PERIPH_INIT_LEDS
MODULE_PERIPH_INIT_PM
MODULE_PERIPH_INIT_PWM
MODULE_PERIPH_INIT_RTT
MODULE_PERIPH_INIT_SPI
MODULE_PERIPH_INIT_SPI_GPIO_MODE
MODULE_PERIPH_INIT_TEMPERATURE
MODULE_PERIPH_INIT_TIMER
MODULE_PERIPH_INIT_UART
MODULE_PERIPH_INIT_USBDEV
MODULE_PERIPH_INIT_USBDEV_CLK
MODULE_PERIPH_PM
MODULE_PERIPH_PWM
MODULE_PERIPH_RTT
MODULE_PERIPH_SPI
MODULE_PERIPH_SPI_GPIO_MODE
MODULE_PERIPH_TEMPERATURE
MODULE_PERIPH_TIMER
MODULE_PERIPH_UART
MODULE_PERIPH_USBDEV
MODULE_PERIPH_USBDEV_CLK
MODULE_PHYDAT
MODULE_POSIX_HEADERS
MODULE_POSIX_INET
MODULE_PREPROCESSOR
MODULE_PREPROCESSOR_SUCCESSOR
MODULE_PRNG
MODULE_PRNG_SHA256PRNG
MODULE_PRNG_SHAXPRNG
MODULE_PS
MODULE_RANDOM
MODULE_SAUL
MODULE_SAUL_DEFAULT
MODULE_SAUL_GPIO
MODULE_SAUL_INIT_DEVS
MODULE_SAUL_NRF_TEMPERATURE
MODULE_SAUL_NRF_VDDH
MODULE_SAUL_PWM
MODULE_SAUL_REG
MODULE_SEMA
MODULE_SHELL
MODULE_SHELL_COMMANDS
MODULE_SOCK
MODULE_SOCK_ASYNC
MODULE_SOCK_ASYNC_EVENT
MODULE_SOCK_AUX_LOCAL
MODULE_SOCK_TCP
MODULE_SOCK_UDP
MODULE_SOCK_UTIL
MODULE_STDIN
MODULE_STDIO
MODULE_STDIO_AVAILABLE
MODULE_STDIO_CDC_ACM
MODULE_SUIT
MODULE_SUIT_TRANSPORT
MODULE_SUIT_TRANSPORT_COAP
MODULE_SUIT_TRANSPORT_WORKER
MODULE_SYS
MODULE_TCP
MODULE_TINYCRYPT
MODULE_TINY_STRERROR
MODULE_TSRB
MODULE_UDP
MODULE_USBUS
MODULE_USBUS_CDC_ACM
MODULE_USB_BOARD_RESET
MODULE_UUID
MODULE_VDD_LC_FILTER_REG0
MODULE_VDD_LC_FILTER_REG1
MODULE_VFS
MODULE_ZTIMER
MODULE_ZTIMER_CONVERT
MODULE_ZTIMER_CONVERT_FRAC
MODULE_ZTIMER_CONVERT_SHIFT
MODULE_ZTIMER_CORE
MODULE_ZTIMER_EXTEND
MODULE_ZTIMER_INIT
MODULE_ZTIMER_MSEC
MODULE_ZTIMER_PERIODIC
MODULE_ZTIMER_PERIPH_RTT
MODULE_ZTIMER_PERIPH_TIMER
MODULE_ZTIMER_SEC
MODULE_ZTIMER_USEC
MPU_BASE
MPU_CTRL_ENABLE_Msk
MPU_CTRL_ENABLE_Pos
MPU_CTRL_HFNMIENA_Msk
MPU_CTRL_HFNMIENA_Pos
MPU_CTRL_PRIVDEFENA_Msk
MPU_CTRL_PRIVDEFENA_Pos
MPU_RASR_AP_Msk
MPU_RASR_AP_Pos
MPU_RASR_ATTRS_Msk
MPU_RASR_ATTRS_Pos
MPU_RASR_B_Msk
MPU_RASR_B_Pos
MPU_RASR_C_Msk
MPU_RASR_C_Pos
MPU_RASR_ENABLE_Msk
MPU_RASR_ENABLE_Pos
MPU_RASR_SIZE_Msk
MPU_RASR_SIZE_Pos
MPU_RASR_SRD_Msk
MPU_RASR_SRD_Pos
MPU_RASR_S_Msk
MPU_RASR_S_Pos
MPU_RASR_TEX_Msk
MPU_RASR_TEX_Pos
MPU_RASR_XN_Msk
MPU_RASR_XN_Pos
MPU_RBAR_ADDR_Msk
MPU_RBAR_ADDR_Pos
MPU_RBAR_REGION_Msk
MPU_RBAR_REGION_Pos
MPU_RBAR_VALID_Msk
MPU_RBAR_VALID_Pos
MPU_RNR_REGION_Msk
MPU_RNR_REGION_Pos
MPU_TYPE_DREGION_Msk
MPU_TYPE_DREGION_Pos
MPU_TYPE_IREGION_Msk
MPU_TYPE_IREGION_Pos
MPU_TYPE_RALIASES
MPU_TYPE_SEPARATE_Msk
MPU_TYPE_SEPARATE_Pos
MSG_ZTIMER
MS_PER_CS
MS_PER_HOUR
MS_PER_SEC
MTD_DRIVER_FLAG_CLEARING_OVERWRITE
MTD_DRIVER_FLAG_DIRECT_WRITE
MWU_COUNT
MWU_EVENTS_PREGION_RA_RA_Generated
MWU_EVENTS_PREGION_RA_RA_Msk
MWU_EVENTS_PREGION_RA_RA_NotGenerated
MWU_EVENTS_PREGION_RA_RA_Pos
MWU_EVENTS_PREGION_WA_WA_Generated
MWU_EVENTS_PREGION_WA_WA_Msk
MWU_EVENTS_PREGION_WA_WA_NotGenerated
MWU_EVENTS_PREGION_WA_WA_Pos
MWU_EVENTS_REGION_RA_RA_Generated
MWU_EVENTS_REGION_RA_RA_Msk
MWU_EVENTS_REGION_RA_RA_NotGenerated
MWU_EVENTS_REGION_RA_RA_Pos
MWU_EVENTS_REGION_WA_WA_Generated
MWU_EVENTS_REGION_WA_WA_Msk
MWU_EVENTS_REGION_WA_WA_NotGenerated
MWU_EVENTS_REGION_WA_WA_Pos
MWU_INTENCLR_PREGION0RA_Clear
MWU_INTENCLR_PREGION0RA_Disabled
MWU_INTENCLR_PREGION0RA_Enabled
MWU_INTENCLR_PREGION0RA_Msk
MWU_INTENCLR_PREGION0RA_Pos
MWU_INTENCLR_PREGION0WA_Clear
MWU_INTENCLR_PREGION0WA_Disabled
MWU_INTENCLR_PREGION0WA_Enabled
MWU_INTENCLR_PREGION0WA_Msk
MWU_INTENCLR_PREGION0WA_Pos
MWU_INTENCLR_PREGION1RA_Clear
MWU_INTENCLR_PREGION1RA_Disabled
MWU_INTENCLR_PREGION1RA_Enabled
MWU_INTENCLR_PREGION1RA_Msk
MWU_INTENCLR_PREGION1RA_Pos
MWU_INTENCLR_PREGION1WA_Clear
MWU_INTENCLR_PREGION1WA_Disabled
MWU_INTENCLR_PREGION1WA_Enabled
MWU_INTENCLR_PREGION1WA_Msk
MWU_INTENCLR_PREGION1WA_Pos
MWU_INTENCLR_REGION0RA_Clear
MWU_INTENCLR_REGION0RA_Disabled
MWU_INTENCLR_REGION0RA_Enabled
MWU_INTENCLR_REGION0RA_Msk
MWU_INTENCLR_REGION0RA_Pos
MWU_INTENCLR_REGION0WA_Clear
MWU_INTENCLR_REGION0WA_Disabled
MWU_INTENCLR_REGION0WA_Enabled
MWU_INTENCLR_REGION0WA_Msk
MWU_INTENCLR_REGION0WA_Pos
MWU_INTENCLR_REGION1RA_Clear
MWU_INTENCLR_REGION1RA_Disabled
MWU_INTENCLR_REGION1RA_Enabled
MWU_INTENCLR_REGION1RA_Msk
MWU_INTENCLR_REGION1RA_Pos
MWU_INTENCLR_REGION1WA_Clear
MWU_INTENCLR_REGION1WA_Disabled
MWU_INTENCLR_REGION1WA_Enabled
MWU_INTENCLR_REGION1WA_Msk
MWU_INTENCLR_REGION1WA_Pos
MWU_INTENCLR_REGION2RA_Clear
MWU_INTENCLR_REGION2RA_Disabled
MWU_INTENCLR_REGION2RA_Enabled
MWU_INTENCLR_REGION2RA_Msk
MWU_INTENCLR_REGION2RA_Pos
MWU_INTENCLR_REGION2WA_Clear
MWU_INTENCLR_REGION2WA_Disabled
MWU_INTENCLR_REGION2WA_Enabled
MWU_INTENCLR_REGION2WA_Msk
MWU_INTENCLR_REGION2WA_Pos
MWU_INTENCLR_REGION3RA_Clear
MWU_INTENCLR_REGION3RA_Disabled
MWU_INTENCLR_REGION3RA_Enabled
MWU_INTENCLR_REGION3RA_Msk
MWU_INTENCLR_REGION3RA_Pos
MWU_INTENCLR_REGION3WA_Clear
MWU_INTENCLR_REGION3WA_Disabled
MWU_INTENCLR_REGION3WA_Enabled
MWU_INTENCLR_REGION3WA_Msk
MWU_INTENCLR_REGION3WA_Pos
MWU_INTENSET_PREGION0RA_Disabled
MWU_INTENSET_PREGION0RA_Enabled
MWU_INTENSET_PREGION0RA_Msk
MWU_INTENSET_PREGION0RA_Pos
MWU_INTENSET_PREGION0RA_Set
MWU_INTENSET_PREGION0WA_Disabled
MWU_INTENSET_PREGION0WA_Enabled
MWU_INTENSET_PREGION0WA_Msk
MWU_INTENSET_PREGION0WA_Pos
MWU_INTENSET_PREGION0WA_Set
MWU_INTENSET_PREGION1RA_Disabled
MWU_INTENSET_PREGION1RA_Enabled
MWU_INTENSET_PREGION1RA_Msk
MWU_INTENSET_PREGION1RA_Pos
MWU_INTENSET_PREGION1RA_Set
MWU_INTENSET_PREGION1WA_Disabled
MWU_INTENSET_PREGION1WA_Enabled
MWU_INTENSET_PREGION1WA_Msk
MWU_INTENSET_PREGION1WA_Pos
MWU_INTENSET_PREGION1WA_Set
MWU_INTENSET_REGION0RA_Disabled
MWU_INTENSET_REGION0RA_Enabled
MWU_INTENSET_REGION0RA_Msk
MWU_INTENSET_REGION0RA_Pos
MWU_INTENSET_REGION0RA_Set
MWU_INTENSET_REGION0WA_Disabled
MWU_INTENSET_REGION0WA_Enabled
MWU_INTENSET_REGION0WA_Msk
MWU_INTENSET_REGION0WA_Pos
MWU_INTENSET_REGION0WA_Set
MWU_INTENSET_REGION1RA_Disabled
MWU_INTENSET_REGION1RA_Enabled
MWU_INTENSET_REGION1RA_Msk
MWU_INTENSET_REGION1RA_Pos
MWU_INTENSET_REGION1RA_Set
MWU_INTENSET_REGION1WA_Disabled
MWU_INTENSET_REGION1WA_Enabled
MWU_INTENSET_REGION1WA_Msk
MWU_INTENSET_REGION1WA_Pos
MWU_INTENSET_REGION1WA_Set
MWU_INTENSET_REGION2RA_Disabled
MWU_INTENSET_REGION2RA_Enabled
MWU_INTENSET_REGION2RA_Msk
MWU_INTENSET_REGION2RA_Pos
MWU_INTENSET_REGION2RA_Set
MWU_INTENSET_REGION2WA_Disabled
MWU_INTENSET_REGION2WA_Enabled
MWU_INTENSET_REGION2WA_Msk
MWU_INTENSET_REGION2WA_Pos
MWU_INTENSET_REGION2WA_Set
MWU_INTENSET_REGION3RA_Disabled
MWU_INTENSET_REGION3RA_Enabled
MWU_INTENSET_REGION3RA_Msk
MWU_INTENSET_REGION3RA_Pos
MWU_INTENSET_REGION3RA_Set
MWU_INTENSET_REGION3WA_Disabled
MWU_INTENSET_REGION3WA_Enabled
MWU_INTENSET_REGION3WA_Msk
MWU_INTENSET_REGION3WA_Pos
MWU_INTENSET_REGION3WA_Set
MWU_INTEN_PREGION0RA_Disabled
MWU_INTEN_PREGION0RA_Enabled
MWU_INTEN_PREGION0RA_Msk
MWU_INTEN_PREGION0RA_Pos
MWU_INTEN_PREGION0WA_Disabled
MWU_INTEN_PREGION0WA_Enabled
MWU_INTEN_PREGION0WA_Msk
MWU_INTEN_PREGION0WA_Pos
MWU_INTEN_PREGION1RA_Disabled
MWU_INTEN_PREGION1RA_Enabled
MWU_INTEN_PREGION1RA_Msk
MWU_INTEN_PREGION1RA_Pos
MWU_INTEN_PREGION1WA_Disabled
MWU_INTEN_PREGION1WA_Enabled
MWU_INTEN_PREGION1WA_Msk
MWU_INTEN_PREGION1WA_Pos
MWU_INTEN_REGION0RA_Disabled
MWU_INTEN_REGION0RA_Enabled
MWU_INTEN_REGION0RA_Msk
MWU_INTEN_REGION0RA_Pos
MWU_INTEN_REGION0WA_Disabled
MWU_INTEN_REGION0WA_Enabled
MWU_INTEN_REGION0WA_Msk
MWU_INTEN_REGION0WA_Pos
MWU_INTEN_REGION1RA_Disabled
MWU_INTEN_REGION1RA_Enabled
MWU_INTEN_REGION1RA_Msk
MWU_INTEN_REGION1RA_Pos
MWU_INTEN_REGION1WA_Disabled
MWU_INTEN_REGION1WA_Enabled
MWU_INTEN_REGION1WA_Msk
MWU_INTEN_REGION1WA_Pos
MWU_INTEN_REGION2RA_Disabled
MWU_INTEN_REGION2RA_Enabled
MWU_INTEN_REGION2RA_Msk
MWU_INTEN_REGION2RA_Pos
MWU_INTEN_REGION2WA_Disabled
MWU_INTEN_REGION2WA_Enabled
MWU_INTEN_REGION2WA_Msk
MWU_INTEN_REGION2WA_Pos
MWU_INTEN_REGION3RA_Disabled
MWU_INTEN_REGION3RA_Enabled
MWU_INTEN_REGION3RA_Msk
MWU_INTEN_REGION3RA_Pos
MWU_INTEN_REGION3WA_Disabled
MWU_INTEN_REGION3WA_Enabled
MWU_INTEN_REGION3WA_Msk
MWU_INTEN_REGION3WA_Pos
MWU_NMIENCLR_PREGION0RA_Clear
MWU_NMIENCLR_PREGION0RA_Disabled
MWU_NMIENCLR_PREGION0RA_Enabled
MWU_NMIENCLR_PREGION0RA_Msk
MWU_NMIENCLR_PREGION0RA_Pos
MWU_NMIENCLR_PREGION0WA_Clear
MWU_NMIENCLR_PREGION0WA_Disabled
MWU_NMIENCLR_PREGION0WA_Enabled
MWU_NMIENCLR_PREGION0WA_Msk
MWU_NMIENCLR_PREGION0WA_Pos
MWU_NMIENCLR_PREGION1RA_Clear
MWU_NMIENCLR_PREGION1RA_Disabled
MWU_NMIENCLR_PREGION1RA_Enabled
MWU_NMIENCLR_PREGION1RA_Msk
MWU_NMIENCLR_PREGION1RA_Pos
MWU_NMIENCLR_PREGION1WA_Clear
MWU_NMIENCLR_PREGION1WA_Disabled
MWU_NMIENCLR_PREGION1WA_Enabled
MWU_NMIENCLR_PREGION1WA_Msk
MWU_NMIENCLR_PREGION1WA_Pos
MWU_NMIENCLR_REGION0RA_Clear
MWU_NMIENCLR_REGION0RA_Disabled
MWU_NMIENCLR_REGION0RA_Enabled
MWU_NMIENCLR_REGION0RA_Msk
MWU_NMIENCLR_REGION0RA_Pos
MWU_NMIENCLR_REGION0WA_Clear
MWU_NMIENCLR_REGION0WA_Disabled
MWU_NMIENCLR_REGION0WA_Enabled
MWU_NMIENCLR_REGION0WA_Msk
MWU_NMIENCLR_REGION0WA_Pos
MWU_NMIENCLR_REGION1RA_Clear
MWU_NMIENCLR_REGION1RA_Disabled
MWU_NMIENCLR_REGION1RA_Enabled
MWU_NMIENCLR_REGION1RA_Msk
MWU_NMIENCLR_REGION1RA_Pos
MWU_NMIENCLR_REGION1WA_Clear
MWU_NMIENCLR_REGION1WA_Disabled
MWU_NMIENCLR_REGION1WA_Enabled
MWU_NMIENCLR_REGION1WA_Msk
MWU_NMIENCLR_REGION1WA_Pos
MWU_NMIENCLR_REGION2RA_Clear
MWU_NMIENCLR_REGION2RA_Disabled
MWU_NMIENCLR_REGION2RA_Enabled
MWU_NMIENCLR_REGION2RA_Msk
MWU_NMIENCLR_REGION2RA_Pos
MWU_NMIENCLR_REGION2WA_Clear
MWU_NMIENCLR_REGION2WA_Disabled
MWU_NMIENCLR_REGION2WA_Enabled
MWU_NMIENCLR_REGION2WA_Msk
MWU_NMIENCLR_REGION2WA_Pos
MWU_NMIENCLR_REGION3RA_Clear
MWU_NMIENCLR_REGION3RA_Disabled
MWU_NMIENCLR_REGION3RA_Enabled
MWU_NMIENCLR_REGION3RA_Msk
MWU_NMIENCLR_REGION3RA_Pos
MWU_NMIENCLR_REGION3WA_Clear
MWU_NMIENCLR_REGION3WA_Disabled
MWU_NMIENCLR_REGION3WA_Enabled
MWU_NMIENCLR_REGION3WA_Msk
MWU_NMIENCLR_REGION3WA_Pos
MWU_NMIENSET_PREGION0RA_Disabled
MWU_NMIENSET_PREGION0RA_Enabled
MWU_NMIENSET_PREGION0RA_Msk
MWU_NMIENSET_PREGION0RA_Pos
MWU_NMIENSET_PREGION0RA_Set
MWU_NMIENSET_PREGION0WA_Disabled
MWU_NMIENSET_PREGION0WA_Enabled
MWU_NMIENSET_PREGION0WA_Msk
MWU_NMIENSET_PREGION0WA_Pos
MWU_NMIENSET_PREGION0WA_Set
MWU_NMIENSET_PREGION1RA_Disabled
MWU_NMIENSET_PREGION1RA_Enabled
MWU_NMIENSET_PREGION1RA_Msk
MWU_NMIENSET_PREGION1RA_Pos
MWU_NMIENSET_PREGION1RA_Set
MWU_NMIENSET_PREGION1WA_Disabled
MWU_NMIENSET_PREGION1WA_Enabled
MWU_NMIENSET_PREGION1WA_Msk
MWU_NMIENSET_PREGION1WA_Pos
MWU_NMIENSET_PREGION1WA_Set
MWU_NMIENSET_REGION0RA_Disabled
MWU_NMIENSET_REGION0RA_Enabled
MWU_NMIENSET_REGION0RA_Msk
MWU_NMIENSET_REGION0RA_Pos
MWU_NMIENSET_REGION0RA_Set
MWU_NMIENSET_REGION0WA_Disabled
MWU_NMIENSET_REGION0WA_Enabled
MWU_NMIENSET_REGION0WA_Msk
MWU_NMIENSET_REGION0WA_Pos
MWU_NMIENSET_REGION0WA_Set
MWU_NMIENSET_REGION1RA_Disabled
MWU_NMIENSET_REGION1RA_Enabled
MWU_NMIENSET_REGION1RA_Msk
MWU_NMIENSET_REGION1RA_Pos
MWU_NMIENSET_REGION1RA_Set
MWU_NMIENSET_REGION1WA_Disabled
MWU_NMIENSET_REGION1WA_Enabled
MWU_NMIENSET_REGION1WA_Msk
MWU_NMIENSET_REGION1WA_Pos
MWU_NMIENSET_REGION1WA_Set
MWU_NMIENSET_REGION2RA_Disabled
MWU_NMIENSET_REGION2RA_Enabled
MWU_NMIENSET_REGION2RA_Msk
MWU_NMIENSET_REGION2RA_Pos
MWU_NMIENSET_REGION2RA_Set
MWU_NMIENSET_REGION2WA_Disabled
MWU_NMIENSET_REGION2WA_Enabled
MWU_NMIENSET_REGION2WA_Msk
MWU_NMIENSET_REGION2WA_Pos
MWU_NMIENSET_REGION2WA_Set
MWU_NMIENSET_REGION3RA_Disabled
MWU_NMIENSET_REGION3RA_Enabled
MWU_NMIENSET_REGION3RA_Msk
MWU_NMIENSET_REGION3RA_Pos
MWU_NMIENSET_REGION3RA_Set
MWU_NMIENSET_REGION3WA_Disabled
MWU_NMIENSET_REGION3WA_Enabled
MWU_NMIENSET_REGION3WA_Msk
MWU_NMIENSET_REGION3WA_Pos
MWU_NMIENSET_REGION3WA_Set
MWU_NMIEN_PREGION0RA_Disabled
MWU_NMIEN_PREGION0RA_Enabled
MWU_NMIEN_PREGION0RA_Msk
MWU_NMIEN_PREGION0RA_Pos
MWU_NMIEN_PREGION0WA_Disabled
MWU_NMIEN_PREGION0WA_Enabled
MWU_NMIEN_PREGION0WA_Msk
MWU_NMIEN_PREGION0WA_Pos
MWU_NMIEN_PREGION1RA_Disabled
MWU_NMIEN_PREGION1RA_Enabled
MWU_NMIEN_PREGION1RA_Msk
MWU_NMIEN_PREGION1RA_Pos
MWU_NMIEN_PREGION1WA_Disabled
MWU_NMIEN_PREGION1WA_Enabled
MWU_NMIEN_PREGION1WA_Msk
MWU_NMIEN_PREGION1WA_Pos
MWU_NMIEN_REGION0RA_Disabled
MWU_NMIEN_REGION0RA_Enabled
MWU_NMIEN_REGION0RA_Msk
MWU_NMIEN_REGION0RA_Pos
MWU_NMIEN_REGION0WA_Disabled
MWU_NMIEN_REGION0WA_Enabled
MWU_NMIEN_REGION0WA_Msk
MWU_NMIEN_REGION0WA_Pos
MWU_NMIEN_REGION1RA_Disabled
MWU_NMIEN_REGION1RA_Enabled
MWU_NMIEN_REGION1RA_Msk
MWU_NMIEN_REGION1RA_Pos
MWU_NMIEN_REGION1WA_Disabled
MWU_NMIEN_REGION1WA_Enabled
MWU_NMIEN_REGION1WA_Msk
MWU_NMIEN_REGION1WA_Pos
MWU_NMIEN_REGION2RA_Disabled
MWU_NMIEN_REGION2RA_Enabled
MWU_NMIEN_REGION2RA_Msk
MWU_NMIEN_REGION2RA_Pos
MWU_NMIEN_REGION2WA_Disabled
MWU_NMIEN_REGION2WA_Enabled
MWU_NMIEN_REGION2WA_Msk
MWU_NMIEN_REGION2WA_Pos
MWU_NMIEN_REGION3RA_Disabled
MWU_NMIEN_REGION3RA_Enabled
MWU_NMIEN_REGION3RA_Msk
MWU_NMIEN_REGION3RA_Pos
MWU_NMIEN_REGION3WA_Disabled
MWU_NMIEN_REGION3WA_Enabled
MWU_NMIEN_REGION3WA_Msk
MWU_NMIEN_REGION3WA_Pos
MWU_PERREGION_SUBSTATRA_SR0_Access
MWU_PERREGION_SUBSTATRA_SR0_Msk
MWU_PERREGION_SUBSTATRA_SR0_NoAccess
MWU_PERREGION_SUBSTATRA_SR0_Pos
MWU_PERREGION_SUBSTATRA_SR10_Access
MWU_PERREGION_SUBSTATRA_SR10_Msk
MWU_PERREGION_SUBSTATRA_SR10_NoAccess
MWU_PERREGION_SUBSTATRA_SR10_Pos
MWU_PERREGION_SUBSTATRA_SR11_Access
MWU_PERREGION_SUBSTATRA_SR11_Msk
MWU_PERREGION_SUBSTATRA_SR11_NoAccess
MWU_PERREGION_SUBSTATRA_SR11_Pos
MWU_PERREGION_SUBSTATRA_SR12_Access
MWU_PERREGION_SUBSTATRA_SR12_Msk
MWU_PERREGION_SUBSTATRA_SR12_NoAccess
MWU_PERREGION_SUBSTATRA_SR12_Pos
MWU_PERREGION_SUBSTATRA_SR13_Access
MWU_PERREGION_SUBSTATRA_SR13_Msk
MWU_PERREGION_SUBSTATRA_SR13_NoAccess
MWU_PERREGION_SUBSTATRA_SR13_Pos
MWU_PERREGION_SUBSTATRA_SR14_Access
MWU_PERREGION_SUBSTATRA_SR14_Msk
MWU_PERREGION_SUBSTATRA_SR14_NoAccess
MWU_PERREGION_SUBSTATRA_SR14_Pos
MWU_PERREGION_SUBSTATRA_SR15_Access
MWU_PERREGION_SUBSTATRA_SR15_Msk
MWU_PERREGION_SUBSTATRA_SR15_NoAccess
MWU_PERREGION_SUBSTATRA_SR15_Pos
MWU_PERREGION_SUBSTATRA_SR16_Access
MWU_PERREGION_SUBSTATRA_SR16_Msk
MWU_PERREGION_SUBSTATRA_SR16_NoAccess
MWU_PERREGION_SUBSTATRA_SR16_Pos
MWU_PERREGION_SUBSTATRA_SR17_Access
MWU_PERREGION_SUBSTATRA_SR17_Msk
MWU_PERREGION_SUBSTATRA_SR17_NoAccess
MWU_PERREGION_SUBSTATRA_SR17_Pos
MWU_PERREGION_SUBSTATRA_SR18_Access
MWU_PERREGION_SUBSTATRA_SR18_Msk
MWU_PERREGION_SUBSTATRA_SR18_NoAccess
MWU_PERREGION_SUBSTATRA_SR18_Pos
MWU_PERREGION_SUBSTATRA_SR19_Access
MWU_PERREGION_SUBSTATRA_SR19_Msk
MWU_PERREGION_SUBSTATRA_SR19_NoAccess
MWU_PERREGION_SUBSTATRA_SR19_Pos
MWU_PERREGION_SUBSTATRA_SR1_Access
MWU_PERREGION_SUBSTATRA_SR1_Msk
MWU_PERREGION_SUBSTATRA_SR1_NoAccess
MWU_PERREGION_SUBSTATRA_SR1_Pos
MWU_PERREGION_SUBSTATRA_SR20_Access
MWU_PERREGION_SUBSTATRA_SR20_Msk
MWU_PERREGION_SUBSTATRA_SR20_NoAccess
MWU_PERREGION_SUBSTATRA_SR20_Pos
MWU_PERREGION_SUBSTATRA_SR21_Access
MWU_PERREGION_SUBSTATRA_SR21_Msk
MWU_PERREGION_SUBSTATRA_SR21_NoAccess
MWU_PERREGION_SUBSTATRA_SR21_Pos
MWU_PERREGION_SUBSTATRA_SR22_Access
MWU_PERREGION_SUBSTATRA_SR22_Msk
MWU_PERREGION_SUBSTATRA_SR22_NoAccess
MWU_PERREGION_SUBSTATRA_SR22_Pos
MWU_PERREGION_SUBSTATRA_SR23_Access
MWU_PERREGION_SUBSTATRA_SR23_Msk
MWU_PERREGION_SUBSTATRA_SR23_NoAccess
MWU_PERREGION_SUBSTATRA_SR23_Pos
MWU_PERREGION_SUBSTATRA_SR24_Access
MWU_PERREGION_SUBSTATRA_SR24_Msk
MWU_PERREGION_SUBSTATRA_SR24_NoAccess
MWU_PERREGION_SUBSTATRA_SR24_Pos
MWU_PERREGION_SUBSTATRA_SR25_Access
MWU_PERREGION_SUBSTATRA_SR25_Msk
MWU_PERREGION_SUBSTATRA_SR25_NoAccess
MWU_PERREGION_SUBSTATRA_SR25_Pos
MWU_PERREGION_SUBSTATRA_SR26_Access
MWU_PERREGION_SUBSTATRA_SR26_Msk
MWU_PERREGION_SUBSTATRA_SR26_NoAccess
MWU_PERREGION_SUBSTATRA_SR26_Pos
MWU_PERREGION_SUBSTATRA_SR27_Access
MWU_PERREGION_SUBSTATRA_SR27_Msk
MWU_PERREGION_SUBSTATRA_SR27_NoAccess
MWU_PERREGION_SUBSTATRA_SR27_Pos
MWU_PERREGION_SUBSTATRA_SR28_Access
MWU_PERREGION_SUBSTATRA_SR28_Msk
MWU_PERREGION_SUBSTATRA_SR28_NoAccess
MWU_PERREGION_SUBSTATRA_SR28_Pos
MWU_PERREGION_SUBSTATRA_SR29_Access
MWU_PERREGION_SUBSTATRA_SR29_Msk
MWU_PERREGION_SUBSTATRA_SR29_NoAccess
MWU_PERREGION_SUBSTATRA_SR29_Pos
MWU_PERREGION_SUBSTATRA_SR2_Access
MWU_PERREGION_SUBSTATRA_SR2_Msk
MWU_PERREGION_SUBSTATRA_SR2_NoAccess
MWU_PERREGION_SUBSTATRA_SR2_Pos
MWU_PERREGION_SUBSTATRA_SR30_Access
MWU_PERREGION_SUBSTATRA_SR30_Msk
MWU_PERREGION_SUBSTATRA_SR30_NoAccess
MWU_PERREGION_SUBSTATRA_SR30_Pos
MWU_PERREGION_SUBSTATRA_SR31_Access
MWU_PERREGION_SUBSTATRA_SR31_Msk
MWU_PERREGION_SUBSTATRA_SR31_NoAccess
MWU_PERREGION_SUBSTATRA_SR31_Pos
MWU_PERREGION_SUBSTATRA_SR3_Access
MWU_PERREGION_SUBSTATRA_SR3_Msk
MWU_PERREGION_SUBSTATRA_SR3_NoAccess
MWU_PERREGION_SUBSTATRA_SR3_Pos
MWU_PERREGION_SUBSTATRA_SR4_Access
MWU_PERREGION_SUBSTATRA_SR4_Msk
MWU_PERREGION_SUBSTATRA_SR4_NoAccess
MWU_PERREGION_SUBSTATRA_SR4_Pos
MWU_PERREGION_SUBSTATRA_SR5_Access
MWU_PERREGION_SUBSTATRA_SR5_Msk
MWU_PERREGION_SUBSTATRA_SR5_NoAccess
MWU_PERREGION_SUBSTATRA_SR5_Pos
MWU_PERREGION_SUBSTATRA_SR6_Access
MWU_PERREGION_SUBSTATRA_SR6_Msk
MWU_PERREGION_SUBSTATRA_SR6_NoAccess
MWU_PERREGION_SUBSTATRA_SR6_Pos
MWU_PERREGION_SUBSTATRA_SR7_Access
MWU_PERREGION_SUBSTATRA_SR7_Msk
MWU_PERREGION_SUBSTATRA_SR7_NoAccess
MWU_PERREGION_SUBSTATRA_SR7_Pos
MWU_PERREGION_SUBSTATRA_SR8_Access
MWU_PERREGION_SUBSTATRA_SR8_Msk
MWU_PERREGION_SUBSTATRA_SR8_NoAccess
MWU_PERREGION_SUBSTATRA_SR8_Pos
MWU_PERREGION_SUBSTATRA_SR9_Access
MWU_PERREGION_SUBSTATRA_SR9_Msk
MWU_PERREGION_SUBSTATRA_SR9_NoAccess
MWU_PERREGION_SUBSTATRA_SR9_Pos
MWU_PERREGION_SUBSTATWA_SR0_Access
MWU_PERREGION_SUBSTATWA_SR0_Msk
MWU_PERREGION_SUBSTATWA_SR0_NoAccess
MWU_PERREGION_SUBSTATWA_SR0_Pos
MWU_PERREGION_SUBSTATWA_SR10_Access
MWU_PERREGION_SUBSTATWA_SR10_Msk
MWU_PERREGION_SUBSTATWA_SR10_NoAccess
MWU_PERREGION_SUBSTATWA_SR10_Pos
MWU_PERREGION_SUBSTATWA_SR11_Access
MWU_PERREGION_SUBSTATWA_SR11_Msk
MWU_PERREGION_SUBSTATWA_SR11_NoAccess
MWU_PERREGION_SUBSTATWA_SR11_Pos
MWU_PERREGION_SUBSTATWA_SR12_Access
MWU_PERREGION_SUBSTATWA_SR12_Msk
MWU_PERREGION_SUBSTATWA_SR12_NoAccess
MWU_PERREGION_SUBSTATWA_SR12_Pos
MWU_PERREGION_SUBSTATWA_SR13_Access
MWU_PERREGION_SUBSTATWA_SR13_Msk
MWU_PERREGION_SUBSTATWA_SR13_NoAccess
MWU_PERREGION_SUBSTATWA_SR13_Pos
MWU_PERREGION_SUBSTATWA_SR14_Access
MWU_PERREGION_SUBSTATWA_SR14_Msk
MWU_PERREGION_SUBSTATWA_SR14_NoAccess
MWU_PERREGION_SUBSTATWA_SR14_Pos
MWU_PERREGION_SUBSTATWA_SR15_Access
MWU_PERREGION_SUBSTATWA_SR15_Msk
MWU_PERREGION_SUBSTATWA_SR15_NoAccess
MWU_PERREGION_SUBSTATWA_SR15_Pos
MWU_PERREGION_SUBSTATWA_SR16_Access
MWU_PERREGION_SUBSTATWA_SR16_Msk
MWU_PERREGION_SUBSTATWA_SR16_NoAccess
MWU_PERREGION_SUBSTATWA_SR16_Pos
MWU_PERREGION_SUBSTATWA_SR17_Access
MWU_PERREGION_SUBSTATWA_SR17_Msk
MWU_PERREGION_SUBSTATWA_SR17_NoAccess
MWU_PERREGION_SUBSTATWA_SR17_Pos
MWU_PERREGION_SUBSTATWA_SR18_Access
MWU_PERREGION_SUBSTATWA_SR18_Msk
MWU_PERREGION_SUBSTATWA_SR18_NoAccess
MWU_PERREGION_SUBSTATWA_SR18_Pos
MWU_PERREGION_SUBSTATWA_SR19_Access
MWU_PERREGION_SUBSTATWA_SR19_Msk
MWU_PERREGION_SUBSTATWA_SR19_NoAccess
MWU_PERREGION_SUBSTATWA_SR19_Pos
MWU_PERREGION_SUBSTATWA_SR1_Access
MWU_PERREGION_SUBSTATWA_SR1_Msk
MWU_PERREGION_SUBSTATWA_SR1_NoAccess
MWU_PERREGION_SUBSTATWA_SR1_Pos
MWU_PERREGION_SUBSTATWA_SR20_Access
MWU_PERREGION_SUBSTATWA_SR20_Msk
MWU_PERREGION_SUBSTATWA_SR20_NoAccess
MWU_PERREGION_SUBSTATWA_SR20_Pos
MWU_PERREGION_SUBSTATWA_SR21_Access
MWU_PERREGION_SUBSTATWA_SR21_Msk
MWU_PERREGION_SUBSTATWA_SR21_NoAccess
MWU_PERREGION_SUBSTATWA_SR21_Pos
MWU_PERREGION_SUBSTATWA_SR22_Access
MWU_PERREGION_SUBSTATWA_SR22_Msk
MWU_PERREGION_SUBSTATWA_SR22_NoAccess
MWU_PERREGION_SUBSTATWA_SR22_Pos
MWU_PERREGION_SUBSTATWA_SR23_Access
MWU_PERREGION_SUBSTATWA_SR23_Msk
MWU_PERREGION_SUBSTATWA_SR23_NoAccess
MWU_PERREGION_SUBSTATWA_SR23_Pos
MWU_PERREGION_SUBSTATWA_SR24_Access
MWU_PERREGION_SUBSTATWA_SR24_Msk
MWU_PERREGION_SUBSTATWA_SR24_NoAccess
MWU_PERREGION_SUBSTATWA_SR24_Pos
MWU_PERREGION_SUBSTATWA_SR25_Access
MWU_PERREGION_SUBSTATWA_SR25_Msk
MWU_PERREGION_SUBSTATWA_SR25_NoAccess
MWU_PERREGION_SUBSTATWA_SR25_Pos
MWU_PERREGION_SUBSTATWA_SR26_Access
MWU_PERREGION_SUBSTATWA_SR26_Msk
MWU_PERREGION_SUBSTATWA_SR26_NoAccess
MWU_PERREGION_SUBSTATWA_SR26_Pos
MWU_PERREGION_SUBSTATWA_SR27_Access
MWU_PERREGION_SUBSTATWA_SR27_Msk
MWU_PERREGION_SUBSTATWA_SR27_NoAccess
MWU_PERREGION_SUBSTATWA_SR27_Pos
MWU_PERREGION_SUBSTATWA_SR28_Access
MWU_PERREGION_SUBSTATWA_SR28_Msk
MWU_PERREGION_SUBSTATWA_SR28_NoAccess
MWU_PERREGION_SUBSTATWA_SR28_Pos
MWU_PERREGION_SUBSTATWA_SR29_Access
MWU_PERREGION_SUBSTATWA_SR29_Msk
MWU_PERREGION_SUBSTATWA_SR29_NoAccess
MWU_PERREGION_SUBSTATWA_SR29_Pos
MWU_PERREGION_SUBSTATWA_SR2_Access
MWU_PERREGION_SUBSTATWA_SR2_Msk
MWU_PERREGION_SUBSTATWA_SR2_NoAccess
MWU_PERREGION_SUBSTATWA_SR2_Pos
MWU_PERREGION_SUBSTATWA_SR30_Access
MWU_PERREGION_SUBSTATWA_SR30_Msk
MWU_PERREGION_SUBSTATWA_SR30_NoAccess
MWU_PERREGION_SUBSTATWA_SR30_Pos
MWU_PERREGION_SUBSTATWA_SR31_Access
MWU_PERREGION_SUBSTATWA_SR31_Msk
MWU_PERREGION_SUBSTATWA_SR31_NoAccess
MWU_PERREGION_SUBSTATWA_SR31_Pos
MWU_PERREGION_SUBSTATWA_SR3_Access
MWU_PERREGION_SUBSTATWA_SR3_Msk
MWU_PERREGION_SUBSTATWA_SR3_NoAccess
MWU_PERREGION_SUBSTATWA_SR3_Pos
MWU_PERREGION_SUBSTATWA_SR4_Access
MWU_PERREGION_SUBSTATWA_SR4_Msk
MWU_PERREGION_SUBSTATWA_SR4_NoAccess
MWU_PERREGION_SUBSTATWA_SR4_Pos
MWU_PERREGION_SUBSTATWA_SR5_Access
MWU_PERREGION_SUBSTATWA_SR5_Msk
MWU_PERREGION_SUBSTATWA_SR5_NoAccess
MWU_PERREGION_SUBSTATWA_SR5_Pos
MWU_PERREGION_SUBSTATWA_SR6_Access
MWU_PERREGION_SUBSTATWA_SR6_Msk
MWU_PERREGION_SUBSTATWA_SR6_NoAccess
MWU_PERREGION_SUBSTATWA_SR6_Pos
MWU_PERREGION_SUBSTATWA_SR7_Access
MWU_PERREGION_SUBSTATWA_SR7_Msk
MWU_PERREGION_SUBSTATWA_SR7_NoAccess
MWU_PERREGION_SUBSTATWA_SR7_Pos
MWU_PERREGION_SUBSTATWA_SR8_Access
MWU_PERREGION_SUBSTATWA_SR8_Msk
MWU_PERREGION_SUBSTATWA_SR8_NoAccess
MWU_PERREGION_SUBSTATWA_SR8_Pos
MWU_PERREGION_SUBSTATWA_SR9_Access
MWU_PERREGION_SUBSTATWA_SR9_Msk
MWU_PERREGION_SUBSTATWA_SR9_NoAccess
MWU_PERREGION_SUBSTATWA_SR9_Pos
MWU_PREGION_END_END_Msk
MWU_PREGION_END_END_Pos
MWU_PREGION_START_START_Msk
MWU_PREGION_START_START_Pos
MWU_PREGION_SUBS_SR0_Exclude
MWU_PREGION_SUBS_SR0_Include
MWU_PREGION_SUBS_SR0_Msk
MWU_PREGION_SUBS_SR0_Pos
MWU_PREGION_SUBS_SR10_Exclude
MWU_PREGION_SUBS_SR10_Include
MWU_PREGION_SUBS_SR10_Msk
MWU_PREGION_SUBS_SR10_Pos
MWU_PREGION_SUBS_SR11_Exclude
MWU_PREGION_SUBS_SR11_Include
MWU_PREGION_SUBS_SR11_Msk
MWU_PREGION_SUBS_SR11_Pos
MWU_PREGION_SUBS_SR12_Exclude
MWU_PREGION_SUBS_SR12_Include
MWU_PREGION_SUBS_SR12_Msk
MWU_PREGION_SUBS_SR12_Pos
MWU_PREGION_SUBS_SR13_Exclude
MWU_PREGION_SUBS_SR13_Include
MWU_PREGION_SUBS_SR13_Msk
MWU_PREGION_SUBS_SR13_Pos
MWU_PREGION_SUBS_SR14_Exclude
MWU_PREGION_SUBS_SR14_Include
MWU_PREGION_SUBS_SR14_Msk
MWU_PREGION_SUBS_SR14_Pos
MWU_PREGION_SUBS_SR15_Exclude
MWU_PREGION_SUBS_SR15_Include
MWU_PREGION_SUBS_SR15_Msk
MWU_PREGION_SUBS_SR15_Pos
MWU_PREGION_SUBS_SR16_Exclude
MWU_PREGION_SUBS_SR16_Include
MWU_PREGION_SUBS_SR16_Msk
MWU_PREGION_SUBS_SR16_Pos
MWU_PREGION_SUBS_SR17_Exclude
MWU_PREGION_SUBS_SR17_Include
MWU_PREGION_SUBS_SR17_Msk
MWU_PREGION_SUBS_SR17_Pos
MWU_PREGION_SUBS_SR18_Exclude
MWU_PREGION_SUBS_SR18_Include
MWU_PREGION_SUBS_SR18_Msk
MWU_PREGION_SUBS_SR18_Pos
MWU_PREGION_SUBS_SR19_Exclude
MWU_PREGION_SUBS_SR19_Include
MWU_PREGION_SUBS_SR19_Msk
MWU_PREGION_SUBS_SR19_Pos
MWU_PREGION_SUBS_SR1_Exclude
MWU_PREGION_SUBS_SR1_Include
MWU_PREGION_SUBS_SR1_Msk
MWU_PREGION_SUBS_SR1_Pos
MWU_PREGION_SUBS_SR20_Exclude
MWU_PREGION_SUBS_SR20_Include
MWU_PREGION_SUBS_SR20_Msk
MWU_PREGION_SUBS_SR20_Pos
MWU_PREGION_SUBS_SR21_Exclude
MWU_PREGION_SUBS_SR21_Include
MWU_PREGION_SUBS_SR21_Msk
MWU_PREGION_SUBS_SR21_Pos
MWU_PREGION_SUBS_SR22_Exclude
MWU_PREGION_SUBS_SR22_Include
MWU_PREGION_SUBS_SR22_Msk
MWU_PREGION_SUBS_SR22_Pos
MWU_PREGION_SUBS_SR23_Exclude
MWU_PREGION_SUBS_SR23_Include
MWU_PREGION_SUBS_SR23_Msk
MWU_PREGION_SUBS_SR23_Pos
MWU_PREGION_SUBS_SR24_Exclude
MWU_PREGION_SUBS_SR24_Include
MWU_PREGION_SUBS_SR24_Msk
MWU_PREGION_SUBS_SR24_Pos
MWU_PREGION_SUBS_SR25_Exclude
MWU_PREGION_SUBS_SR25_Include
MWU_PREGION_SUBS_SR25_Msk
MWU_PREGION_SUBS_SR25_Pos
MWU_PREGION_SUBS_SR26_Exclude
MWU_PREGION_SUBS_SR26_Include
MWU_PREGION_SUBS_SR26_Msk
MWU_PREGION_SUBS_SR26_Pos
MWU_PREGION_SUBS_SR27_Exclude
MWU_PREGION_SUBS_SR27_Include
MWU_PREGION_SUBS_SR27_Msk
MWU_PREGION_SUBS_SR27_Pos
MWU_PREGION_SUBS_SR28_Exclude
MWU_PREGION_SUBS_SR28_Include
MWU_PREGION_SUBS_SR28_Msk
MWU_PREGION_SUBS_SR28_Pos
MWU_PREGION_SUBS_SR29_Exclude
MWU_PREGION_SUBS_SR29_Include
MWU_PREGION_SUBS_SR29_Msk
MWU_PREGION_SUBS_SR29_Pos
MWU_PREGION_SUBS_SR2_Exclude
MWU_PREGION_SUBS_SR2_Include
MWU_PREGION_SUBS_SR2_Msk
MWU_PREGION_SUBS_SR2_Pos
MWU_PREGION_SUBS_SR30_Exclude
MWU_PREGION_SUBS_SR30_Include
MWU_PREGION_SUBS_SR30_Msk
MWU_PREGION_SUBS_SR30_Pos
MWU_PREGION_SUBS_SR31_Exclude
MWU_PREGION_SUBS_SR31_Include
MWU_PREGION_SUBS_SR31_Msk
MWU_PREGION_SUBS_SR31_Pos
MWU_PREGION_SUBS_SR3_Exclude
MWU_PREGION_SUBS_SR3_Include
MWU_PREGION_SUBS_SR3_Msk
MWU_PREGION_SUBS_SR3_Pos
MWU_PREGION_SUBS_SR4_Exclude
MWU_PREGION_SUBS_SR4_Include
MWU_PREGION_SUBS_SR4_Msk
MWU_PREGION_SUBS_SR4_Pos
MWU_PREGION_SUBS_SR5_Exclude
MWU_PREGION_SUBS_SR5_Include
MWU_PREGION_SUBS_SR5_Msk
MWU_PREGION_SUBS_SR5_Pos
MWU_PREGION_SUBS_SR6_Exclude
MWU_PREGION_SUBS_SR6_Include
MWU_PREGION_SUBS_SR6_Msk
MWU_PREGION_SUBS_SR6_Pos
MWU_PREGION_SUBS_SR7_Exclude
MWU_PREGION_SUBS_SR7_Include
MWU_PREGION_SUBS_SR7_Msk
MWU_PREGION_SUBS_SR7_Pos
MWU_PREGION_SUBS_SR8_Exclude
MWU_PREGION_SUBS_SR8_Include
MWU_PREGION_SUBS_SR8_Msk
MWU_PREGION_SUBS_SR8_Pos
MWU_PREGION_SUBS_SR9_Exclude
MWU_PREGION_SUBS_SR9_Include
MWU_PREGION_SUBS_SR9_Msk
MWU_PREGION_SUBS_SR9_Pos
MWU_REGIONENCLR_PRGN0RA_Clear
MWU_REGIONENCLR_PRGN0RA_Disabled
MWU_REGIONENCLR_PRGN0RA_Enabled
MWU_REGIONENCLR_PRGN0RA_Msk
MWU_REGIONENCLR_PRGN0RA_Pos
MWU_REGIONENCLR_PRGN0WA_Clear
MWU_REGIONENCLR_PRGN0WA_Disabled
MWU_REGIONENCLR_PRGN0WA_Enabled
MWU_REGIONENCLR_PRGN0WA_Msk
MWU_REGIONENCLR_PRGN0WA_Pos
MWU_REGIONENCLR_PRGN1RA_Clear
MWU_REGIONENCLR_PRGN1RA_Disabled
MWU_REGIONENCLR_PRGN1RA_Enabled
MWU_REGIONENCLR_PRGN1RA_Msk
MWU_REGIONENCLR_PRGN1RA_Pos
MWU_REGIONENCLR_PRGN1WA_Clear
MWU_REGIONENCLR_PRGN1WA_Disabled
MWU_REGIONENCLR_PRGN1WA_Enabled
MWU_REGIONENCLR_PRGN1WA_Msk
MWU_REGIONENCLR_PRGN1WA_Pos
MWU_REGIONENCLR_RGN0RA_Clear
MWU_REGIONENCLR_RGN0RA_Disabled
MWU_REGIONENCLR_RGN0RA_Enabled
MWU_REGIONENCLR_RGN0RA_Msk
MWU_REGIONENCLR_RGN0RA_Pos
MWU_REGIONENCLR_RGN0WA_Clear
MWU_REGIONENCLR_RGN0WA_Disabled
MWU_REGIONENCLR_RGN0WA_Enabled
MWU_REGIONENCLR_RGN0WA_Msk
MWU_REGIONENCLR_RGN0WA_Pos
MWU_REGIONENCLR_RGN1RA_Clear
MWU_REGIONENCLR_RGN1RA_Disabled
MWU_REGIONENCLR_RGN1RA_Enabled
MWU_REGIONENCLR_RGN1RA_Msk
MWU_REGIONENCLR_RGN1RA_Pos
MWU_REGIONENCLR_RGN1WA_Clear
MWU_REGIONENCLR_RGN1WA_Disabled
MWU_REGIONENCLR_RGN1WA_Enabled
MWU_REGIONENCLR_RGN1WA_Msk
MWU_REGIONENCLR_RGN1WA_Pos
MWU_REGIONENCLR_RGN2RA_Clear
MWU_REGIONENCLR_RGN2RA_Disabled
MWU_REGIONENCLR_RGN2RA_Enabled
MWU_REGIONENCLR_RGN2RA_Msk
MWU_REGIONENCLR_RGN2RA_Pos
MWU_REGIONENCLR_RGN2WA_Clear
MWU_REGIONENCLR_RGN2WA_Disabled
MWU_REGIONENCLR_RGN2WA_Enabled
MWU_REGIONENCLR_RGN2WA_Msk
MWU_REGIONENCLR_RGN2WA_Pos
MWU_REGIONENCLR_RGN3RA_Clear
MWU_REGIONENCLR_RGN3RA_Disabled
MWU_REGIONENCLR_RGN3RA_Enabled
MWU_REGIONENCLR_RGN3RA_Msk
MWU_REGIONENCLR_RGN3RA_Pos
MWU_REGIONENCLR_RGN3WA_Clear
MWU_REGIONENCLR_RGN3WA_Disabled
MWU_REGIONENCLR_RGN3WA_Enabled
MWU_REGIONENCLR_RGN3WA_Msk
MWU_REGIONENCLR_RGN3WA_Pos
MWU_REGIONENSET_PRGN0RA_Disabled
MWU_REGIONENSET_PRGN0RA_Enabled
MWU_REGIONENSET_PRGN0RA_Msk
MWU_REGIONENSET_PRGN0RA_Pos
MWU_REGIONENSET_PRGN0RA_Set
MWU_REGIONENSET_PRGN0WA_Disabled
MWU_REGIONENSET_PRGN0WA_Enabled
MWU_REGIONENSET_PRGN0WA_Msk
MWU_REGIONENSET_PRGN0WA_Pos
MWU_REGIONENSET_PRGN0WA_Set
MWU_REGIONENSET_PRGN1RA_Disabled
MWU_REGIONENSET_PRGN1RA_Enabled
MWU_REGIONENSET_PRGN1RA_Msk
MWU_REGIONENSET_PRGN1RA_Pos
MWU_REGIONENSET_PRGN1RA_Set
MWU_REGIONENSET_PRGN1WA_Disabled
MWU_REGIONENSET_PRGN1WA_Enabled
MWU_REGIONENSET_PRGN1WA_Msk
MWU_REGIONENSET_PRGN1WA_Pos
MWU_REGIONENSET_PRGN1WA_Set
MWU_REGIONENSET_RGN0RA_Disabled
MWU_REGIONENSET_RGN0RA_Enabled
MWU_REGIONENSET_RGN0RA_Msk
MWU_REGIONENSET_RGN0RA_Pos
MWU_REGIONENSET_RGN0RA_Set
MWU_REGIONENSET_RGN0WA_Disabled
MWU_REGIONENSET_RGN0WA_Enabled
MWU_REGIONENSET_RGN0WA_Msk
MWU_REGIONENSET_RGN0WA_Pos
MWU_REGIONENSET_RGN0WA_Set
MWU_REGIONENSET_RGN1RA_Disabled
MWU_REGIONENSET_RGN1RA_Enabled
MWU_REGIONENSET_RGN1RA_Msk
MWU_REGIONENSET_RGN1RA_Pos
MWU_REGIONENSET_RGN1RA_Set
MWU_REGIONENSET_RGN1WA_Disabled
MWU_REGIONENSET_RGN1WA_Enabled
MWU_REGIONENSET_RGN1WA_Msk
MWU_REGIONENSET_RGN1WA_Pos
MWU_REGIONENSET_RGN1WA_Set
MWU_REGIONENSET_RGN2RA_Disabled
MWU_REGIONENSET_RGN2RA_Enabled
MWU_REGIONENSET_RGN2RA_Msk
MWU_REGIONENSET_RGN2RA_Pos
MWU_REGIONENSET_RGN2RA_Set
MWU_REGIONENSET_RGN2WA_Disabled
MWU_REGIONENSET_RGN2WA_Enabled
MWU_REGIONENSET_RGN2WA_Msk
MWU_REGIONENSET_RGN2WA_Pos
MWU_REGIONENSET_RGN2WA_Set
MWU_REGIONENSET_RGN3RA_Disabled
MWU_REGIONENSET_RGN3RA_Enabled
MWU_REGIONENSET_RGN3RA_Msk
MWU_REGIONENSET_RGN3RA_Pos
MWU_REGIONENSET_RGN3RA_Set
MWU_REGIONENSET_RGN3WA_Disabled
MWU_REGIONENSET_RGN3WA_Enabled
MWU_REGIONENSET_RGN3WA_Msk
MWU_REGIONENSET_RGN3WA_Pos
MWU_REGIONENSET_RGN3WA_Set
MWU_REGIONEN_PRGN0RA_Disable
MWU_REGIONEN_PRGN0RA_Enable
MWU_REGIONEN_PRGN0RA_Msk
MWU_REGIONEN_PRGN0RA_Pos
MWU_REGIONEN_PRGN0WA_Disable
MWU_REGIONEN_PRGN0WA_Enable
MWU_REGIONEN_PRGN0WA_Msk
MWU_REGIONEN_PRGN0WA_Pos
MWU_REGIONEN_PRGN1RA_Disable
MWU_REGIONEN_PRGN1RA_Enable
MWU_REGIONEN_PRGN1RA_Msk
MWU_REGIONEN_PRGN1RA_Pos
MWU_REGIONEN_PRGN1WA_Disable
MWU_REGIONEN_PRGN1WA_Enable
MWU_REGIONEN_PRGN1WA_Msk
MWU_REGIONEN_PRGN1WA_Pos
MWU_REGIONEN_RGN0RA_Disable
MWU_REGIONEN_RGN0RA_Enable
MWU_REGIONEN_RGN0RA_Msk
MWU_REGIONEN_RGN0RA_Pos
MWU_REGIONEN_RGN0WA_Disable
MWU_REGIONEN_RGN0WA_Enable
MWU_REGIONEN_RGN0WA_Msk
MWU_REGIONEN_RGN0WA_Pos
MWU_REGIONEN_RGN1RA_Disable
MWU_REGIONEN_RGN1RA_Enable
MWU_REGIONEN_RGN1RA_Msk
MWU_REGIONEN_RGN1RA_Pos
MWU_REGIONEN_RGN1WA_Disable
MWU_REGIONEN_RGN1WA_Enable
MWU_REGIONEN_RGN1WA_Msk
MWU_REGIONEN_RGN1WA_Pos
MWU_REGIONEN_RGN2RA_Disable
MWU_REGIONEN_RGN2RA_Enable
MWU_REGIONEN_RGN2RA_Msk
MWU_REGIONEN_RGN2RA_Pos
MWU_REGIONEN_RGN2WA_Disable
MWU_REGIONEN_RGN2WA_Enable
MWU_REGIONEN_RGN2WA_Msk
MWU_REGIONEN_RGN2WA_Pos
MWU_REGIONEN_RGN3RA_Disable
MWU_REGIONEN_RGN3RA_Enable
MWU_REGIONEN_RGN3RA_Msk
MWU_REGIONEN_RGN3RA_Pos
MWU_REGIONEN_RGN3WA_Disable
MWU_REGIONEN_RGN3WA_Enable
MWU_REGIONEN_RGN3WA_Msk
MWU_REGIONEN_RGN3WA_Pos
MWU_REGION_END_END_Msk
MWU_REGION_END_END_Pos
MWU_REGION_START_START_Msk
MWU_REGION_START_START_Pos
MYNEWT_VAL_ADC_0
MYNEWT_VAL_ADC_0_REFMV_0
MYNEWT_VAL_APP_NAME
MYNEWT_VAL_APP_dummy_app
MYNEWT_VAL_ARCH_NAME
MYNEWT_VAL_ARCH_cortex_m4
MYNEWT_VAL_BASELIBC_ASSERT_FILE_LINE
MYNEWT_VAL_BASELIBC_EXECUTE_GLOBAL_CONSTRUCTORS
MYNEWT_VAL_BASELIBC_PRESENT
MYNEWT_VAL_BLE_ATT_PREFERRED_MTU
MYNEWT_VAL_BLE_ATT_SVR_FIND_INFO
MYNEWT_VAL_BLE_ATT_SVR_FIND_TYPE
MYNEWT_VAL_BLE_ATT_SVR_INDICATE
MYNEWT_VAL_BLE_ATT_SVR_MAX_PREP_ENTRIES
MYNEWT_VAL_BLE_ATT_SVR_NOTIFY
MYNEWT_VAL_BLE_ATT_SVR_QUEUED_WRITE
MYNEWT_VAL_BLE_ATT_SVR_QUEUED_WRITE_TMO
MYNEWT_VAL_BLE_ATT_SVR_READ
MYNEWT_VAL_BLE_ATT_SVR_READ_BLOB
MYNEWT_VAL_BLE_ATT_SVR_READ_GROUP_TYPE
MYNEWT_VAL_BLE_ATT_SVR_READ_MULT
MYNEWT_VAL_BLE_ATT_SVR_READ_TYPE
MYNEWT_VAL_BLE_ATT_SVR_SIGNED_WRITE
MYNEWT_VAL_BLE_ATT_SVR_WRITE
MYNEWT_VAL_BLE_ATT_SVR_WRITE_NO_RSP
MYNEWT_VAL_BLE_CONTROLLER
MYNEWT_VAL_BLE_DEVICE
MYNEWT_VAL_BLE_EXT_ADV
MYNEWT_VAL_BLE_EXT_ADV_MAX_SIZE
MYNEWT_VAL_BLE_GAP_MAX_PENDING_CONN_PARAM_UPDATE
MYNEWT_VAL_BLE_GATT_DISC_ALL_CHRS
MYNEWT_VAL_BLE_GATT_DISC_ALL_DSCS
MYNEWT_VAL_BLE_GATT_DISC_ALL_SVCS
MYNEWT_VAL_BLE_GATT_DISC_CHR_UUID
MYNEWT_VAL_BLE_GATT_DISC_SVC_UUID
MYNEWT_VAL_BLE_GATT_FIND_INC_SVCS
MYNEWT_VAL_BLE_GATT_INDICATE
MYNEWT_VAL_BLE_GATT_MAX_PROCS
MYNEWT_VAL_BLE_GATT_NOTIFY
MYNEWT_VAL_BLE_GATT_READ
MYNEWT_VAL_BLE_GATT_READ_LONG
MYNEWT_VAL_BLE_GATT_READ_MAX_ATTRS
MYNEWT_VAL_BLE_GATT_READ_MULT
MYNEWT_VAL_BLE_GATT_READ_UUID
MYNEWT_VAL_BLE_GATT_RESUME_RATE
MYNEWT_VAL_BLE_GATT_SIGNED_WRITE
MYNEWT_VAL_BLE_GATT_WRITE
MYNEWT_VAL_BLE_GATT_WRITE_LONG
MYNEWT_VAL_BLE_GATT_WRITE_MAX_ATTRS
MYNEWT_VAL_BLE_GATT_WRITE_NO_RSP
MYNEWT_VAL_BLE_GATT_WRITE_RELIABLE
MYNEWT_VAL_BLE_HCI_VS
MYNEWT_VAL_BLE_HCI_VS_OCF_OFFSET
MYNEWT_VAL_BLE_HOST
MYNEWT_VAL_BLE_HS_AUTO_START
MYNEWT_VAL_BLE_HS_DEBUG
MYNEWT_VAL_BLE_HS_FLOW_CTRL
MYNEWT_VAL_BLE_HS_FLOW_CTRL_ITVL
MYNEWT_VAL_BLE_HS_FLOW_CTRL_THRESH
MYNEWT_VAL_BLE_HS_FLOW_CTRL_TX_ON_DISCONNECT
MYNEWT_VAL_BLE_HS_LOG_LVL
MYNEWT_VAL_BLE_HS_LOG_MOD
MYNEWT_VAL_BLE_HS_PHONY_HCI_ACKS
MYNEWT_VAL_BLE_HS_REQUIRE_OS
MYNEWT_VAL_BLE_HS_STOP_ON_SHUTDOWN
MYNEWT_VAL_BLE_HS_STOP_ON_SHUTDOWN_TIMEOUT
MYNEWT_VAL_BLE_HS_SYSINIT_STAGE
MYNEWT_VAL_BLE_HW_WHITELIST_ENABLE
MYNEWT_VAL_BLE_ISO
MYNEWT_VAL_BLE_ISO_TEST
MYNEWT_VAL_BLE_L2CAP_COC_MAX_NUM
MYNEWT_VAL_BLE_L2CAP_COC_MPS
MYNEWT_VAL_BLE_L2CAP_ENHANCED_COC
MYNEWT_VAL_BLE_L2CAP_JOIN_RX_FRAGS
MYNEWT_VAL_BLE_L2CAP_MAX_CHANS
MYNEWT_VAL_BLE_L2CAP_RX_FRAG_TIMEOUT
MYNEWT_VAL_BLE_L2CAP_SIG_MAX_PROCS
MYNEWT_VAL_BLE_LL_ADD_STRICT_SCHED_PERIODS
MYNEWT_VAL_BLE_LL_CFG_FEAT_CTRL_TO_HOST_FLOW_CONTROL
MYNEWT_VAL_BLE_LL_CFG_FEAT_DATA_LEN_EXT
MYNEWT_VAL_BLE_LL_CFG_FEAT_LE_2M_PHY
MYNEWT_VAL_BLE_LL_CFG_FEAT_LE_CODED_PHY
MYNEWT_VAL_BLE_LL_CFG_FEAT_LE_CSA2
MYNEWT_VAL_BLE_LL_CFG_FEAT_LE_ENCRYPTION
MYNEWT_VAL_BLE_LL_CFG_FEAT_LE_PING
MYNEWT_VAL_BLE_LL_CFG_FEAT_LL_EXT_ADV
MYNEWT_VAL_BLE_LL_CFG_FEAT_LL_ISO
MYNEWT_VAL_BLE_LL_CFG_FEAT_LL_ISO_TEST
MYNEWT_VAL_BLE_LL_CFG_FEAT_LL_PERIODIC_ADV
MYNEWT_VAL_BLE_LL_CFG_FEAT_LL_PERIODIC_ADV_SYNC_CNT
MYNEWT_VAL_BLE_LL_CFG_FEAT_LL_PERIODIC_ADV_SYNC_LIST_CNT
MYNEWT_VAL_BLE_LL_CFG_FEAT_LL_PERIODIC_ADV_SYNC_TRANSFER
MYNEWT_VAL_BLE_LL_CFG_FEAT_LL_PRIVACY
MYNEWT_VAL_BLE_LL_CFG_FEAT_LL_SCA_UPDATE
MYNEWT_VAL_BLE_LL_CFG_FEAT_SLAVE_INIT_FEAT_XCHG
MYNEWT_VAL_BLE_LL_CONN_INIT_MIN_WIN_OFFSET
MYNEWT_VAL_BLE_LL_CONN_INIT_SLOTS
MYNEWT_VAL_BLE_LL_CONN_PHY_DEFAULT_PREF_MASK
MYNEWT_VAL_BLE_LL_CONN_PHY_INIT_UPDATE
MYNEWT_VAL_BLE_LL_CONN_PHY_PREFER_2M
MYNEWT_VAL_BLE_LL_CONN_STRICT_SCHED
MYNEWT_VAL_BLE_LL_CONN_STRICT_SCHED_FIXED
MYNEWT_VAL_BLE_LL_CONN_STRICT_SCHED_PERIOD_SLOTS
MYNEWT_VAL_BLE_LL_CONN_STRICT_SCHED_SLOT_US
MYNEWT_VAL_BLE_LL_DEBUG_GPIO_HCI_CMD
MYNEWT_VAL_BLE_LL_DEBUG_GPIO_HCI_EV
MYNEWT_VAL_BLE_LL_DEBUG_GPIO_RFMGMT
MYNEWT_VAL_BLE_LL_DEBUG_GPIO_SCHED_ITEM
MYNEWT_VAL_BLE_LL_DEBUG_GPIO_SCHED_RUN
MYNEWT_VAL_BLE_LL_DIRECT_TEST_MODE
MYNEWT_VAL_BLE_LL_DTM
MYNEWT_VAL_BLE_LL_DTM_EXTENSIONS
MYNEWT_VAL_BLE_LL_EXT_ADV_AUX_PTR_CNT
MYNEWT_VAL_BLE_LL_HBD_FAKE_DUAL_MODE
MYNEWT_VAL_BLE_LL_HCI_LLCP_TRACE
MYNEWT_VAL_BLE_LL_HCI_VS
MYNEWT_VAL_BLE_LL_HCI_VS_CONN_STRICT_SCHED
MYNEWT_VAL_BLE_LL_HCI_VS_EVENT_ON_ASSERT
MYNEWT_VAL_BLE_LL_LNA
MYNEWT_VAL_BLE_LL_LNA_GPIO
MYNEWT_VAL_BLE_LL_MASTER_SCA
MYNEWT_VAL_BLE_LL_MAX_PKT_SIZE
MYNEWT_VAL_BLE_LL_MFRG_ID
MYNEWT_VAL_BLE_LL_NUM_COMP_PKT_ITVL_MS
MYNEWT_VAL_BLE_LL_NUM_SCAN_DUP_ADVS
MYNEWT_VAL_BLE_LL_NUM_SCAN_RSP_ADVS
MYNEWT_VAL_BLE_LL_OUR_SCA
MYNEWT_VAL_BLE_LL_PA
MYNEWT_VAL_BLE_LL_PA_GPIO
MYNEWT_VAL_BLE_LL_PRIO
MYNEWT_VAL_BLE_LL_PUBLIC_DEV_ADDR
MYNEWT_VAL_BLE_LL_RESOLV_LIST_SIZE
MYNEWT_VAL_BLE_LL_RFMGMT_ENABLE_TIME
MYNEWT_VAL_BLE_LL_RNG_BUFSIZE
MYNEWT_VAL_BLE_LL_ROLE_BROADCASTER
MYNEWT_VAL_BLE_LL_ROLE_CENTRAL
MYNEWT_VAL_BLE_LL_ROLE_OBSERVER
MYNEWT_VAL_BLE_LL_ROLE_PERIPHERAL
MYNEWT_VAL_BLE_LL_SCA
MYNEWT_VAL_BLE_LL_SCAN_AUX_SEGMENT_CNT
MYNEWT_VAL_BLE_LL_SCHED_AUX_CHAIN_MAFS_DELAY
MYNEWT_VAL_BLE_LL_SCHED_AUX_MAFS_DELAY
MYNEWT_VAL_BLE_LL_SCHED_SCAN_AUX_PDU_LEN
MYNEWT_VAL_BLE_LL_SCHED_SCAN_SYNC_PDU_LEN
MYNEWT_VAL_BLE_LL_STRICT_CONN_SCHEDULING
MYNEWT_VAL_BLE_LL_SUPP_MAX_RX_BYTES
MYNEWT_VAL_BLE_LL_SUPP_MAX_TX_BYTES
MYNEWT_VAL_BLE_LL_SYSINIT_STAGE
MYNEWT_VAL_BLE_LL_SYSVIEW
MYNEWT_VAL_BLE_LL_TX_PWR_DBM
MYNEWT_VAL_BLE_LL_USECS_PER_PERIOD
MYNEWT_VAL_BLE_LL_VND_EVENT_ON_ASSERT
MYNEWT_VAL_BLE_LL_WHITELIST_SIZE
MYNEWT_VAL_BLE_LP_CLOCK
MYNEWT_VAL_BLE_MAX_CONNECTIONS
MYNEWT_VAL_BLE_MAX_PERIODIC_SYNCS
MYNEWT_VAL_BLE_MESH
MYNEWT_VAL_BLE_MONITOR_CONSOLE_BUFFER_SIZE
MYNEWT_VAL_BLE_MONITOR_RTT
MYNEWT_VAL_BLE_MONITOR_RTT_BUFFERED
MYNEWT_VAL_BLE_MONITOR_RTT_BUFFER_NAME
MYNEWT_VAL_BLE_MONITOR_RTT_BUFFER_SIZE
MYNEWT_VAL_BLE_MONITOR_UART
MYNEWT_VAL_BLE_MONITOR_UART_BAUDRATE
MYNEWT_VAL_BLE_MONITOR_UART_BUFFER_SIZE
MYNEWT_VAL_BLE_MONITOR_UART_DEV
MYNEWT_VAL_BLE_MULTI_ADV_INSTANCES
MYNEWT_VAL_BLE_PERIODIC_ADV
MYNEWT_VAL_BLE_PERIODIC_ADV_SYNC_TRANSFER
MYNEWT_VAL_BLE_PHY_DBG_TIME_ADDRESS_END_PIN
MYNEWT_VAL_BLE_PHY_DBG_TIME_TXRXEN_READY_PIN
MYNEWT_VAL_BLE_PHY_DBG_TIME_WFR_PIN
MYNEWT_VAL_BLE_PHY_NRF52840_ERRATA_164
MYNEWT_VAL_BLE_PHY_NRF52840_ERRATA_191
MYNEWT_VAL_BLE_PHY_SYSVIEW
MYNEWT_VAL_BLE_PHY_UBLOX_BMD345_PUBLIC_ADDR
MYNEWT_VAL_BLE_POWER_CONTROL
MYNEWT_VAL_BLE_ROLE_BROADCASTER
MYNEWT_VAL_BLE_ROLE_CENTRAL
MYNEWT_VAL_BLE_ROLE_OBSERVER
MYNEWT_VAL_BLE_ROLE_PERIPHERAL
MYNEWT_VAL_BLE_RPA_TIMEOUT
MYNEWT_VAL_BLE_SM_BONDING
MYNEWT_VAL_BLE_SM_KEYPRESS
MYNEWT_VAL_BLE_SM_LEGACY
MYNEWT_VAL_BLE_SM_MAX_PROCS
MYNEWT_VAL_BLE_SM_MITM
MYNEWT_VAL_BLE_SM_OOB_DATA_FLAG
MYNEWT_VAL_BLE_SM_OUR_KEY_DIST
MYNEWT_VAL_BLE_SM_SC
MYNEWT_VAL_BLE_SM_SC_DEBUG_KEYS
MYNEWT_VAL_BLE_SM_SC_LVL
MYNEWT_VAL_BLE_SM_SC_ONLY
MYNEWT_VAL_BLE_SM_THEIR_KEY_DIST
MYNEWT_VAL_BLE_STORE_MAX_BONDS
MYNEWT_VAL_BLE_STORE_MAX_CCCDS
MYNEWT_VAL_BLE_SVC_GAP_APPEARANCE
MYNEWT_VAL_BLE_SVC_GAP_APPEARANCE_WRITE_PERM
MYNEWT_VAL_BLE_SVC_GAP_CENTRAL_ADDRESS_RESOLUTION
MYNEWT_VAL_BLE_SVC_GAP_DEVICE_NAME
MYNEWT_VAL_BLE_SVC_GAP_DEVICE_NAME_MAX_LENGTH
MYNEWT_VAL_BLE_SVC_GAP_DEVICE_NAME_WRITE_PERM
MYNEWT_VAL_BLE_SVC_GAP_PPCP_MAX_CONN_INTERVAL
MYNEWT_VAL_BLE_SVC_GAP_PPCP_MIN_CONN_INTERVAL
MYNEWT_VAL_BLE_SVC_GAP_PPCP_SLAVE_LATENCY
MYNEWT_VAL_BLE_SVC_GAP_PPCP_SUPERVISION_TMO
MYNEWT_VAL_BLE_SVC_GAP_SYSINIT_STAGE
MYNEWT_VAL_BLE_SVC_GATT_SYSINIT_STAGE
MYNEWT_VAL_BLE_TRANSPORT
MYNEWT_VAL_BLE_TRANSPORT_ACL_COUNT
MYNEWT_VAL_BLE_TRANSPORT_ACL_FROM_HS_COUNT
MYNEWT_VAL_BLE_TRANSPORT_ACL_FROM_LL_COUNT
MYNEWT_VAL_BLE_TRANSPORT_ACL_SIZE
MYNEWT_VAL_BLE_TRANSPORT_EVT_COUNT
MYNEWT_VAL_BLE_TRANSPORT_EVT_DISCARDABLE_COUNT
MYNEWT_VAL_BLE_TRANSPORT_EVT_SIZE
MYNEWT_VAL_BLE_TRANSPORT_HS
MYNEWT_VAL_BLE_TRANSPORT_HS__custom
MYNEWT_VAL_BLE_TRANSPORT_HS__dialog_cmac
MYNEWT_VAL_BLE_TRANSPORT_HS__native
MYNEWT_VAL_BLE_TRANSPORT_HS__nrf5340
MYNEWT_VAL_BLE_TRANSPORT_HS__uart
MYNEWT_VAL_BLE_TRANSPORT_HS__usb
MYNEWT_VAL_BLE_TRANSPORT_LL
MYNEWT_VAL_BLE_TRANSPORT_LL__custom
MYNEWT_VAL_BLE_TRANSPORT_LL__dialog_cmac
MYNEWT_VAL_BLE_TRANSPORT_LL__native
MYNEWT_VAL_BLE_TRANSPORT_LL__nrf5340
MYNEWT_VAL_BLE_TRANSPORT_LL__socket
MYNEWT_VAL_BLE_VERSION
MYNEWT_VAL_BLE_WHITELIST
MYNEWT_VAL_BLE_XTAL_SETTLE_TIME
MYNEWT_VAL_BSP_NAME
MYNEWT_VAL_BSP_NRF52840
MYNEWT_VAL_BSP_nordic_pca10056
MYNEWT_VAL_CONSOLE_UART_BAUD
MYNEWT_VAL_CONSOLE_UART_DEV
MYNEWT_VAL_CRYPTO
MYNEWT_VAL_DEBUG_PANIC_ENABLED
MYNEWT_VAL_DFLT_LOG_LVL
MYNEWT_VAL_DFLT_LOG_MOD
MYNEWT_VAL_FLASH_MAP_MAX_AREAS
MYNEWT_VAL_FLASH_MAP_SUPPORT_MFG
MYNEWT_VAL_FLASH_MAP_SYSINIT_STAGE
MYNEWT_VAL_FLOAT_USER
MYNEWT_VAL_GPIO_AS_PIN_RESET
MYNEWT_VAL_HAL_ENABLE_SOFTWARE_BREAKPOINTS
MYNEWT_VAL_HAL_FLASH_MAX_DEVICE_COUNT
MYNEWT_VAL_HAL_FLASH_VERIFY_BUF_SZ
MYNEWT_VAL_HAL_FLASH_VERIFY_ERASES
MYNEWT_VAL_HAL_FLASH_VERIFY_WRITES
MYNEWT_VAL_HAL_SBRK
MYNEWT_VAL_HAL_SYSTEM_RESET_CB
MYNEWT_VAL_HARDFLOAT
MYNEWT_VAL_I2C_0
MYNEWT_VAL_I2C_0_FREQ_KHZ
MYNEWT_VAL_I2C_0_PIN_SCL
MYNEWT_VAL_I2C_0_PIN_SDA
MYNEWT_VAL_I2C_1
MYNEWT_VAL_I2C_1_FREQ_KHZ
MYNEWT_VAL_LOG_CONSOLE
MYNEWT_VAL_LOG_FCB
MYNEWT_VAL_LOG_FCB_SLOT1
MYNEWT_VAL_LOG_GLOBAL_IDX
MYNEWT_VAL_LOG_LEVEL
MYNEWT_VAL_MCU_BUS_DRIVER_I2C_USE_TWIM
MYNEWT_VAL_MCU_COMMON_STARTUP
MYNEWT_VAL_MCU_DCDC_ENABLED
MYNEWT_VAL_MCU_DEBUG_IGNORE_BKPT
MYNEWT_VAL_MCU_FLASH_MIN_WRITE_SIZE
MYNEWT_VAL_MCU_GPIO_USE_PORT_EVENT
MYNEWT_VAL_MCU_HFCLK_SOURCE
MYNEWT_VAL_MCU_HFCLK_SOURCE__HFINT
MYNEWT_VAL_MCU_HFCLK_SOURCE__HFXO
MYNEWT_VAL_MCU_I2C_RECOVERY_DELAY_USEC
MYNEWT_VAL_MCU_ICACHE_ENABLED
MYNEWT_VAL_MCU_LFCLK_SOURCE
MYNEWT_VAL_MCU_LFCLK_SOURCE__LFRC
MYNEWT_VAL_MCU_LFCLK_SOURCE__LFSYNTH
MYNEWT_VAL_MCU_LFCLK_SOURCE__LFXO
MYNEWT_VAL_MCU_NRF52832
MYNEWT_VAL_MCU_NRF52840
MYNEWT_VAL_MCU_TARGET
MYNEWT_VAL_MCU_TARGET__nRF52810
MYNEWT_VAL_MCU_TARGET__nRF52811
MYNEWT_VAL_MCU_TARGET__nRF52832
MYNEWT_VAL_MCU_TARGET__nRF52840
MYNEWT_VAL_MODLOG_CONSOLE_DFLT
MYNEWT_VAL_MODLOG_LOG_MACROS
MYNEWT_VAL_MODLOG_MAX_MAPPINGS
MYNEWT_VAL_MODLOG_MAX_PRINTF_LEN
MYNEWT_VAL_MODLOG_SYSINIT_STAGE
MYNEWT_VAL_MSYS_1_BLOCK_COUNT
MYNEWT_VAL_MSYS_1_BLOCK_SIZE
MYNEWT_VAL_MSYS_1_SANITY_MIN_COUNT
MYNEWT_VAL_MSYS_2_BLOCK_COUNT
MYNEWT_VAL_MSYS_2_BLOCK_SIZE
MYNEWT_VAL_MSYS_2_SANITY_MIN_COUNT
MYNEWT_VAL_MSYS_SANITY_TIMEOUT
MYNEWT_VAL_NEWT_FEATURE_LOGCFG
MYNEWT_VAL_NEWT_FEATURE_SYSDOWN
MYNEWT_VAL_NFC_PINS_AS_GPIO
MYNEWT_VAL_OS_ASSERT_CB
MYNEWT_VAL_OS_CLI
MYNEWT_VAL_OS_COREDUMP
MYNEWT_VAL_OS_COREDUMP_CB
MYNEWT_VAL_OS_CPUTIME_FREQ
MYNEWT_VAL_OS_CPUTIME_TIMER_NUM
MYNEWT_VAL_OS_CRASH_FILE_LINE
MYNEWT_VAL_OS_CRASH_LOG
MYNEWT_VAL_OS_CRASH_RESTORE_REGS
MYNEWT_VAL_OS_CRASH_STACKTRACE
MYNEWT_VAL_OS_CTX_SW_STACK_CHECK
MYNEWT_VAL_OS_CTX_SW_STACK_GUARD
MYNEWT_VAL_OS_DEBUG_MODE
MYNEWT_VAL_OS_EVENTQ_DEBUG
MYNEWT_VAL_OS_EVENTQ_MONITOR
MYNEWT_VAL_OS_IDLE_TICKLESS_MS_MAX
MYNEWT_VAL_OS_IDLE_TICKLESS_MS_MIN
MYNEWT_VAL_OS_MAIN_STACK_SIZE
MYNEWT_VAL_OS_MAIN_TASK_PRIO
MYNEWT_VAL_OS_MAIN_TASK_SANITY_ITVL_MS
MYNEWT_VAL_OS_MEMPOOL_CHECK
MYNEWT_VAL_OS_MEMPOOL_GUARD
MYNEWT_VAL_OS_MEMPOOL_POISON
MYNEWT_VAL_OS_SCHEDULING
MYNEWT_VAL_OS_SYSINIT_STAGE
MYNEWT_VAL_OS_SYSVIEW
MYNEWT_VAL_OS_SYSVIEW_TRACE_CALLOUT
MYNEWT_VAL_OS_SYSVIEW_TRACE_EVENTQ
MYNEWT_VAL_OS_SYSVIEW_TRACE_MBUF
MYNEWT_VAL_OS_SYSVIEW_TRACE_MEMPOOL
MYNEWT_VAL_OS_SYSVIEW_TRACE_MUTEX
MYNEWT_VAL_OS_SYSVIEW_TRACE_SEM
MYNEWT_VAL_OS_TASK_RUN_TIME_CPUTIME
MYNEWT_VAL_OS_TICKS_PER_SEC
MYNEWT_VAL_OS_TIME_DEBUG
MYNEWT_VAL_OS_WATCHDOG_MONITOR
MYNEWT_VAL_PWM_0
MYNEWT_VAL_PWM_1
MYNEWT_VAL_PWM_2
MYNEWT_VAL_PWM_3
MYNEWT_VAL_QSPI_ADDRMODE
MYNEWT_VAL_QSPI_DPMCONFIG
MYNEWT_VAL_QSPI_ENABLE
MYNEWT_VAL_QSPI_FLASH_PAGE_SIZE
MYNEWT_VAL_QSPI_FLASH_SECTOR_COUNT
MYNEWT_VAL_QSPI_FLASH_SECTOR_SIZE
MYNEWT_VAL_QSPI_PIN_CS
MYNEWT_VAL_QSPI_PIN_DIO0
MYNEWT_VAL_QSPI_PIN_DIO1
MYNEWT_VAL_QSPI_PIN_DIO2
MYNEWT_VAL_QSPI_PIN_DIO3
MYNEWT_VAL_QSPI_PIN_SCK
MYNEWT_VAL_QSPI_READOC
MYNEWT_VAL_QSPI_SCK_DELAY
MYNEWT_VAL_QSPI_SCK_FREQ
MYNEWT_VAL_QSPI_SPI_MODE
MYNEWT_VAL_QSPI_WRITEOC
MYNEWT_VAL_RWLOCK_DEBUG
MYNEWT_VAL_SANITY_INTERVAL
MYNEWT_VAL_SOFT_PWM
MYNEWT_VAL_SPI_0_MASTER
MYNEWT_VAL_SPI_0_MASTER_PIN_MISO
MYNEWT_VAL_SPI_0_MASTER_PIN_MOSI
MYNEWT_VAL_SPI_0_MASTER_PIN_SCK
MYNEWT_VAL_SPI_0_SLAVE
MYNEWT_VAL_SPI_0_SLAVE_PIN_MISO
MYNEWT_VAL_SPI_0_SLAVE_PIN_MOSI
MYNEWT_VAL_SPI_0_SLAVE_PIN_SCK
MYNEWT_VAL_SPI_0_SLAVE_PIN_SS
MYNEWT_VAL_SPI_1_MASTER
MYNEWT_VAL_SPI_1_SLAVE
MYNEWT_VAL_SPI_2_MASTER
MYNEWT_VAL_SPI_2_SLAVE
MYNEWT_VAL_SPI_3_MASTER
MYNEWT_VAL_SYSDOWN_CONSTRAIN_DOWN
MYNEWT_VAL_SYSDOWN_PANIC_FILE_LINE
MYNEWT_VAL_SYSDOWN_PANIC_MESSAGE
MYNEWT_VAL_SYSDOWN_TIMEOUT_MS
MYNEWT_VAL_SYSINIT_CONSTRAIN_INIT
MYNEWT_VAL_SYSINIT_PANIC_FILE_LINE
MYNEWT_VAL_SYSINIT_PANIC_MESSAGE
MYNEWT_VAL_TARGET_NAME
MYNEWT_VAL_TARGET_riot
MYNEWT_VAL_TEMP
MYNEWT_VAL_TIMER_0
MYNEWT_VAL_TIMER_1
MYNEWT_VAL_TIMER_2
MYNEWT_VAL_TIMER_3
MYNEWT_VAL_TIMER_4
MYNEWT_VAL_TIMER_5
MYNEWT_VAL_TRNG
MYNEWT_VAL_UART_0
MYNEWT_VAL_UART_0_PIN_CTS
MYNEWT_VAL_UART_0_PIN_RTS
MYNEWT_VAL_UART_0_PIN_RX
MYNEWT_VAL_UART_0_PIN_TX
MYNEWT_VAL_UART_1
MYNEWT_VAL_UART_1_PIN_CTS
MYNEWT_VAL_UART_1_PIN_RTS
MYNEWT_VAL_WATCHDOG_INTERVAL
MYNEWT_VAL_XTAL_32768
MYNEWT_VAL_XTAL_32768_SYNTH
MYNEWT_VAL_XTAL_RC
NAME_MAX
NANOCBOR_DECODER_FLAG_CONTAINER
NANOCBOR_DECODER_FLAG_INDEFINITE
NANOCBOR_MASK_ARR
NANOCBOR_MASK_BSTR
NANOCBOR_MASK_FLOAT
NANOCBOR_MASK_MAP
NANOCBOR_MASK_NINT
NANOCBOR_MASK_TAG
NANOCBOR_MASK_TSTR
NANOCBOR_MASK_UINT
NANOCBOR_SIMPLE_FALSE
NANOCBOR_SIMPLE_NULL
NANOCBOR_SIMPLE_TRUE
NANOCBOR_SIMPLE_UNDEF
NANOCBOR_SIZE_BYTE
NANOCBOR_SIZE_INDEFINITE
NANOCBOR_SIZE_LONG
NANOCBOR_SIZE_SHORT
NANOCBOR_SIZE_WORD
NANOCBOR_TAG_BIGFLOATS
NANOCBOR_TAG_BIGNUMS_N
NANOCBOR_TAG_BIGNUMS_P
NANOCBOR_TAG_DATE_TIME
NANOCBOR_TAG_DEC_FRAC
NANOCBOR_TAG_EPOCH
NANOCBOR_TYPE_ARR
NANOCBOR_TYPE_BSTR
NANOCBOR_TYPE_FLOAT
NANOCBOR_TYPE_MAP
NANOCBOR_TYPE_MASK
NANOCBOR_TYPE_NINT
NANOCBOR_TYPE_OFFSET
NANOCBOR_TYPE_TAG
NANOCBOR_TYPE_TSTR
NANOCBOR_TYPE_UINT
NANOCBOR_VALUE_MASK
NANOCOAP_FS_VFS_DIR_BUFFER_SIZE
NANOCOAP_FS_VFS_FILE_BUFFER_SIZE
NDP_DAD_TRANSMIT_NUMOF
NDP_DELAY_FIRST_PROBE_MS
NDP_HOP_LIMIT
NDP_MAX_ANYCAST_MS_DELAY
NDP_MAX_FIN_RA_NUMOF
NDP_MAX_INIT_RA_INTERVAL
NDP_MAX_INIT_RA_NUMOF
NDP_MAX_MC_SOL_NUMOF
NDP_MAX_NA_NUMOF
NDP_MAX_NS_NUMOF
NDP_MAX_RANDOM_FACTOR
NDP_MAX_RA_DELAY
NDP_MAX_RA_INTERVAL_MS
NDP_MAX_RETRANS_TIMER_MS
NDP_MAX_RS_MS_DELAY
NDP_MAX_RS_NUMOF
NDP_MAX_UC_SOL_NUMOF
NDP_MIN_MS_DELAY_BETWEEN_RAS
NDP_MIN_RANDOM_FACTOR
NDP_MIN_RA_INTERVAL_MS
NDP_NBR_ADV_FLAGS_MASK
NDP_NBR_ADV_FLAGS_O
NDP_NBR_ADV_FLAGS_R
NDP_NBR_ADV_FLAGS_S
NDP_NBR_ADV_LTIME_NOT_DR
NDP_NBR_ADV_REACH_TIME
NDP_NBR_ADV_RETRANS_TIMER
NDP_OPT_6CTX
NDP_OPT_ABR
NDP_OPT_AR
NDP_OPT_MTU
NDP_OPT_MTU_LEN
NDP_OPT_PI
NDP_OPT_PI_FLAGS_A
NDP_OPT_PI_FLAGS_L
NDP_OPT_PI_FLAGS_MASK
NDP_OPT_PI_LEN
NDP_OPT_PI_PREF_LTIME_INF
NDP_OPT_PI_VALID_LTIME_INF
NDP_OPT_RDNSS
NDP_OPT_RDNSS_MIN_LEN
NDP_OPT_RH
NDP_OPT_RI
NDP_OPT_RI_FLAGS_MASK
NDP_OPT_RI_FLAGS_PRF_NEG
NDP_OPT_RI_FLAGS_PRF_NONE
NDP_OPT_RI_FLAGS_PRF_POS
NDP_OPT_RI_FLAGS_PRF_ZERO
NDP_OPT_SL2A
NDP_OPT_TL2A
NDP_REACH_MS
NDP_RETRANS_TIMER_MS
NDP_RS_MS_INTERVAL
NDP_RTR_ADV_CUR_HL_UNSPEC
NDP_RTR_ADV_FLAGS_M
NDP_RTR_ADV_FLAGS_MASK
NDP_RTR_ADV_FLAGS_O
NDP_RTR_ADV_LTIME_SEC_MAX
NDP_RTR_LTIME_SEC
NETDEV_INDEX_ANY
NETDEV_TYPE_BLE
NETDEV_TYPE_CC110X
NETDEV_TYPE_ESP_NOW
NETDEV_TYPE_ETHERNET
NETDEV_TYPE_IEEE802154
NETDEV_TYPE_LORA
NETDEV_TYPE_NRF24L01P_NG
NETDEV_TYPE_NRFMIN
NETDEV_TYPE_RAW
NETDEV_TYPE_SLIP
NETDEV_TYPE_TEST
NETDEV_TYPE_UNKNOWN
NFCT_AUTOCOLRESCONFIG_MODE_Disabled
NFCT_AUTOCOLRESCONFIG_MODE_Enabled
NFCT_AUTOCOLRESCONFIG_MODE_Msk
NFCT_AUTOCOLRESCONFIG_MODE_Pos
NFCT_COUNT
NFCT_EASYDMA_MAXCNT_SIZE
NFCT_ERRORSTATUS_FRAMEDELAYTIMEOUT_Msk
NFCT_ERRORSTATUS_FRAMEDELAYTIMEOUT_Pos
NFCT_EVENTS_AUTOCOLRESSTARTED_EVENTS_AUTOCOLRESSTARTED_Generated
NFCT_EVENTS_AUTOCOLRESSTARTED_EVENTS_AUTOCOLRESSTARTED_Msk
NFCT_EVENTS_AUTOCOLRESSTARTED_EVENTS_AUTOCOLRESSTARTED_NotGenerated
NFCT_EVENTS_AUTOCOLRESSTARTED_EVENTS_AUTOCOLRESSTARTED_Pos
NFCT_EVENTS_COLLISION_EVENTS_COLLISION_Generated
NFCT_EVENTS_COLLISION_EVENTS_COLLISION_Msk
NFCT_EVENTS_COLLISION_EVENTS_COLLISION_NotGenerated
NFCT_EVENTS_COLLISION_EVENTS_COLLISION_Pos
NFCT_EVENTS_ENDRX_EVENTS_ENDRX_Generated
NFCT_EVENTS_ENDRX_EVENTS_ENDRX_Msk
NFCT_EVENTS_ENDRX_EVENTS_ENDRX_NotGenerated
NFCT_EVENTS_ENDRX_EVENTS_ENDRX_Pos
NFCT_EVENTS_ENDTX_EVENTS_ENDTX_Generated
NFCT_EVENTS_ENDTX_EVENTS_ENDTX_Msk
NFCT_EVENTS_ENDTX_EVENTS_ENDTX_NotGenerated
NFCT_EVENTS_ENDTX_EVENTS_ENDTX_Pos
NFCT_EVENTS_ERROR_EVENTS_ERROR_Generated
NFCT_EVENTS_ERROR_EVENTS_ERROR_Msk
NFCT_EVENTS_ERROR_EVENTS_ERROR_NotGenerated
NFCT_EVENTS_ERROR_EVENTS_ERROR_Pos
NFCT_EVENTS_FIELDDETECTED_EVENTS_FIELDDETECTED_Generated
NFCT_EVENTS_FIELDDETECTED_EVENTS_FIELDDETECTED_Msk
NFCT_EVENTS_FIELDDETECTED_EVENTS_FIELDDETECTED_NotGenerated
NFCT_EVENTS_FIELDDETECTED_EVENTS_FIELDDETECTED_Pos
NFCT_EVENTS_FIELDLOST_EVENTS_FIELDLOST_Generated
NFCT_EVENTS_FIELDLOST_EVENTS_FIELDLOST_Msk
NFCT_EVENTS_FIELDLOST_EVENTS_FIELDLOST_NotGenerated
NFCT_EVENTS_FIELDLOST_EVENTS_FIELDLOST_Pos
NFCT_EVENTS_READY_EVENTS_READY_Generated
NFCT_EVENTS_READY_EVENTS_READY_Msk
NFCT_EVENTS_READY_EVENTS_READY_NotGenerated
NFCT_EVENTS_READY_EVENTS_READY_Pos
NFCT_EVENTS_RXERROR_EVENTS_RXERROR_Generated
NFCT_EVENTS_RXERROR_EVENTS_RXERROR_Msk
NFCT_EVENTS_RXERROR_EVENTS_RXERROR_NotGenerated
NFCT_EVENTS_RXERROR_EVENTS_RXERROR_Pos
NFCT_EVENTS_RXFRAMEEND_EVENTS_RXFRAMEEND_Generated
NFCT_EVENTS_RXFRAMEEND_EVENTS_RXFRAMEEND_Msk
NFCT_EVENTS_RXFRAMEEND_EVENTS_RXFRAMEEND_NotGenerated
NFCT_EVENTS_RXFRAMEEND_EVENTS_RXFRAMEEND_Pos
NFCT_EVENTS_RXFRAMESTART_EVENTS_RXFRAMESTART_Generated
NFCT_EVENTS_RXFRAMESTART_EVENTS_RXFRAMESTART_Msk
NFCT_EVENTS_RXFRAMESTART_EVENTS_RXFRAMESTART_NotGenerated
NFCT_EVENTS_RXFRAMESTART_EVENTS_RXFRAMESTART_Pos
NFCT_EVENTS_SELECTED_EVENTS_SELECTED_Generated
NFCT_EVENTS_SELECTED_EVENTS_SELECTED_Msk
NFCT_EVENTS_SELECTED_EVENTS_SELECTED_NotGenerated
NFCT_EVENTS_SELECTED_EVENTS_SELECTED_Pos
NFCT_EVENTS_STARTED_EVENTS_STARTED_Generated
NFCT_EVENTS_STARTED_EVENTS_STARTED_Msk
NFCT_EVENTS_STARTED_EVENTS_STARTED_NotGenerated
NFCT_EVENTS_STARTED_EVENTS_STARTED_Pos
NFCT_EVENTS_TXFRAMEEND_EVENTS_TXFRAMEEND_Generated
NFCT_EVENTS_TXFRAMEEND_EVENTS_TXFRAMEEND_Msk
NFCT_EVENTS_TXFRAMEEND_EVENTS_TXFRAMEEND_NotGenerated
NFCT_EVENTS_TXFRAMEEND_EVENTS_TXFRAMEEND_Pos
NFCT_EVENTS_TXFRAMESTART_EVENTS_TXFRAMESTART_Generated
NFCT_EVENTS_TXFRAMESTART_EVENTS_TXFRAMESTART_Msk
NFCT_EVENTS_TXFRAMESTART_EVENTS_TXFRAMESTART_NotGenerated
NFCT_EVENTS_TXFRAMESTART_EVENTS_TXFRAMESTART_Pos
NFCT_FIELDPRESENT_FIELDPRESENT_FieldPresent
NFCT_FIELDPRESENT_FIELDPRESENT_Msk
NFCT_FIELDPRESENT_FIELDPRESENT_NoField
NFCT_FIELDPRESENT_FIELDPRESENT_Pos
NFCT_FIELDPRESENT_LOCKDETECT_Locked
NFCT_FIELDPRESENT_LOCKDETECT_Msk
NFCT_FIELDPRESENT_LOCKDETECT_NotLocked
NFCT_FIELDPRESENT_LOCKDETECT_Pos
NFCT_FRAMEDELAYMAX_FRAMEDELAYMAX_Msk
NFCT_FRAMEDELAYMAX_FRAMEDELAYMAX_Pos
NFCT_FRAMEDELAYMIN_FRAMEDELAYMIN_Msk
NFCT_FRAMEDELAYMIN_FRAMEDELAYMIN_Pos
NFCT_FRAMEDELAYMODE_FRAMEDELAYMODE_ExactVal
NFCT_FRAMEDELAYMODE_FRAMEDELAYMODE_FreeRun
NFCT_FRAMEDELAYMODE_FRAMEDELAYMODE_Msk
NFCT_FRAMEDELAYMODE_FRAMEDELAYMODE_Pos
NFCT_FRAMEDELAYMODE_FRAMEDELAYMODE_Window
NFCT_FRAMEDELAYMODE_FRAMEDELAYMODE_WindowGrid
NFCT_FRAMESTATUS_RX_CRCERROR_CRCCorrect
NFCT_FRAMESTATUS_RX_CRCERROR_CRCError
NFCT_FRAMESTATUS_RX_CRCERROR_Msk
NFCT_FRAMESTATUS_RX_CRCERROR_Pos
NFCT_FRAMESTATUS_RX_OVERRUN_Msk
NFCT_FRAMESTATUS_RX_OVERRUN_NoOverrun
NFCT_FRAMESTATUS_RX_OVERRUN_Overrun
NFCT_FRAMESTATUS_RX_OVERRUN_Pos
NFCT_FRAMESTATUS_RX_PARITYSTATUS_Msk
NFCT_FRAMESTATUS_RX_PARITYSTATUS_ParityError
NFCT_FRAMESTATUS_RX_PARITYSTATUS_ParityOK
NFCT_FRAMESTATUS_RX_PARITYSTATUS_Pos
NFCT_INTENCLR_AUTOCOLRESSTARTED_Clear
NFCT_INTENCLR_AUTOCOLRESSTARTED_Disabled
NFCT_INTENCLR_AUTOCOLRESSTARTED_Enabled
NFCT_INTENCLR_AUTOCOLRESSTARTED_Msk
NFCT_INTENCLR_AUTOCOLRESSTARTED_Pos
NFCT_INTENCLR_COLLISION_Clear
NFCT_INTENCLR_COLLISION_Disabled
NFCT_INTENCLR_COLLISION_Enabled
NFCT_INTENCLR_COLLISION_Msk
NFCT_INTENCLR_COLLISION_Pos
NFCT_INTENCLR_ENDRX_Clear
NFCT_INTENCLR_ENDRX_Disabled
NFCT_INTENCLR_ENDRX_Enabled
NFCT_INTENCLR_ENDRX_Msk
NFCT_INTENCLR_ENDRX_Pos
NFCT_INTENCLR_ENDTX_Clear
NFCT_INTENCLR_ENDTX_Disabled
NFCT_INTENCLR_ENDTX_Enabled
NFCT_INTENCLR_ENDTX_Msk
NFCT_INTENCLR_ENDTX_Pos
NFCT_INTENCLR_ERROR_Clear
NFCT_INTENCLR_ERROR_Disabled
NFCT_INTENCLR_ERROR_Enabled
NFCT_INTENCLR_ERROR_Msk
NFCT_INTENCLR_ERROR_Pos
NFCT_INTENCLR_FIELDDETECTED_Clear
NFCT_INTENCLR_FIELDDETECTED_Disabled
NFCT_INTENCLR_FIELDDETECTED_Enabled
NFCT_INTENCLR_FIELDDETECTED_Msk
NFCT_INTENCLR_FIELDDETECTED_Pos
NFCT_INTENCLR_FIELDLOST_Clear
NFCT_INTENCLR_FIELDLOST_Disabled
NFCT_INTENCLR_FIELDLOST_Enabled
NFCT_INTENCLR_FIELDLOST_Msk
NFCT_INTENCLR_FIELDLOST_Pos
NFCT_INTENCLR_READY_Clear
NFCT_INTENCLR_READY_Disabled
NFCT_INTENCLR_READY_Enabled
NFCT_INTENCLR_READY_Msk
NFCT_INTENCLR_READY_Pos
NFCT_INTENCLR_RXERROR_Clear
NFCT_INTENCLR_RXERROR_Disabled
NFCT_INTENCLR_RXERROR_Enabled
NFCT_INTENCLR_RXERROR_Msk
NFCT_INTENCLR_RXERROR_Pos
NFCT_INTENCLR_RXFRAMEEND_Clear
NFCT_INTENCLR_RXFRAMEEND_Disabled
NFCT_INTENCLR_RXFRAMEEND_Enabled
NFCT_INTENCLR_RXFRAMEEND_Msk
NFCT_INTENCLR_RXFRAMEEND_Pos
NFCT_INTENCLR_RXFRAMESTART_Clear
NFCT_INTENCLR_RXFRAMESTART_Disabled
NFCT_INTENCLR_RXFRAMESTART_Enabled
NFCT_INTENCLR_RXFRAMESTART_Msk
NFCT_INTENCLR_RXFRAMESTART_Pos
NFCT_INTENCLR_SELECTED_Clear
NFCT_INTENCLR_SELECTED_Disabled
NFCT_INTENCLR_SELECTED_Enabled
NFCT_INTENCLR_SELECTED_Msk
NFCT_INTENCLR_SELECTED_Pos
NFCT_INTENCLR_STARTED_Clear
NFCT_INTENCLR_STARTED_Disabled
NFCT_INTENCLR_STARTED_Enabled
NFCT_INTENCLR_STARTED_Msk
NFCT_INTENCLR_STARTED_Pos
NFCT_INTENCLR_TXFRAMEEND_Clear
NFCT_INTENCLR_TXFRAMEEND_Disabled
NFCT_INTENCLR_TXFRAMEEND_Enabled
NFCT_INTENCLR_TXFRAMEEND_Msk
NFCT_INTENCLR_TXFRAMEEND_Pos
NFCT_INTENCLR_TXFRAMESTART_Clear
NFCT_INTENCLR_TXFRAMESTART_Disabled
NFCT_INTENCLR_TXFRAMESTART_Enabled
NFCT_INTENCLR_TXFRAMESTART_Msk
NFCT_INTENCLR_TXFRAMESTART_Pos
NFCT_INTENSET_AUTOCOLRESSTARTED_Disabled
NFCT_INTENSET_AUTOCOLRESSTARTED_Enabled
NFCT_INTENSET_AUTOCOLRESSTARTED_Msk
NFCT_INTENSET_AUTOCOLRESSTARTED_Pos
NFCT_INTENSET_AUTOCOLRESSTARTED_Set
NFCT_INTENSET_COLLISION_Disabled
NFCT_INTENSET_COLLISION_Enabled
NFCT_INTENSET_COLLISION_Msk
NFCT_INTENSET_COLLISION_Pos
NFCT_INTENSET_COLLISION_Set
NFCT_INTENSET_ENDRX_Disabled
NFCT_INTENSET_ENDRX_Enabled
NFCT_INTENSET_ENDRX_Msk
NFCT_INTENSET_ENDRX_Pos
NFCT_INTENSET_ENDRX_Set
NFCT_INTENSET_ENDTX_Disabled
NFCT_INTENSET_ENDTX_Enabled
NFCT_INTENSET_ENDTX_Msk
NFCT_INTENSET_ENDTX_Pos
NFCT_INTENSET_ENDTX_Set
NFCT_INTENSET_ERROR_Disabled
NFCT_INTENSET_ERROR_Enabled
NFCT_INTENSET_ERROR_Msk
NFCT_INTENSET_ERROR_Pos
NFCT_INTENSET_ERROR_Set
NFCT_INTENSET_FIELDDETECTED_Disabled
NFCT_INTENSET_FIELDDETECTED_Enabled
NFCT_INTENSET_FIELDDETECTED_Msk
NFCT_INTENSET_FIELDDETECTED_Pos
NFCT_INTENSET_FIELDDETECTED_Set
NFCT_INTENSET_FIELDLOST_Disabled
NFCT_INTENSET_FIELDLOST_Enabled
NFCT_INTENSET_FIELDLOST_Msk
NFCT_INTENSET_FIELDLOST_Pos
NFCT_INTENSET_FIELDLOST_Set
NFCT_INTENSET_READY_Disabled
NFCT_INTENSET_READY_Enabled
NFCT_INTENSET_READY_Msk
NFCT_INTENSET_READY_Pos
NFCT_INTENSET_READY_Set
NFCT_INTENSET_RXERROR_Disabled
NFCT_INTENSET_RXERROR_Enabled
NFCT_INTENSET_RXERROR_Msk
NFCT_INTENSET_RXERROR_Pos
NFCT_INTENSET_RXERROR_Set
NFCT_INTENSET_RXFRAMEEND_Disabled
NFCT_INTENSET_RXFRAMEEND_Enabled
NFCT_INTENSET_RXFRAMEEND_Msk
NFCT_INTENSET_RXFRAMEEND_Pos
NFCT_INTENSET_RXFRAMEEND_Set
NFCT_INTENSET_RXFRAMESTART_Disabled
NFCT_INTENSET_RXFRAMESTART_Enabled
NFCT_INTENSET_RXFRAMESTART_Msk
NFCT_INTENSET_RXFRAMESTART_Pos
NFCT_INTENSET_RXFRAMESTART_Set
NFCT_INTENSET_SELECTED_Disabled
NFCT_INTENSET_SELECTED_Enabled
NFCT_INTENSET_SELECTED_Msk
NFCT_INTENSET_SELECTED_Pos
NFCT_INTENSET_SELECTED_Set
NFCT_INTENSET_STARTED_Disabled
NFCT_INTENSET_STARTED_Enabled
NFCT_INTENSET_STARTED_Msk
NFCT_INTENSET_STARTED_Pos
NFCT_INTENSET_STARTED_Set
NFCT_INTENSET_TXFRAMEEND_Disabled
NFCT_INTENSET_TXFRAMEEND_Enabled
NFCT_INTENSET_TXFRAMEEND_Msk
NFCT_INTENSET_TXFRAMEEND_Pos
NFCT_INTENSET_TXFRAMEEND_Set
NFCT_INTENSET_TXFRAMESTART_Disabled
NFCT_INTENSET_TXFRAMESTART_Enabled
NFCT_INTENSET_TXFRAMESTART_Msk
NFCT_INTENSET_TXFRAMESTART_Pos
NFCT_INTENSET_TXFRAMESTART_Set
NFCT_INTEN_AUTOCOLRESSTARTED_Disabled
NFCT_INTEN_AUTOCOLRESSTARTED_Enabled
NFCT_INTEN_AUTOCOLRESSTARTED_Msk
NFCT_INTEN_AUTOCOLRESSTARTED_Pos
NFCT_INTEN_COLLISION_Disabled
NFCT_INTEN_COLLISION_Enabled
NFCT_INTEN_COLLISION_Msk
NFCT_INTEN_COLLISION_Pos
NFCT_INTEN_ENDRX_Disabled
NFCT_INTEN_ENDRX_Enabled
NFCT_INTEN_ENDRX_Msk
NFCT_INTEN_ENDRX_Pos
NFCT_INTEN_ENDTX_Disabled
NFCT_INTEN_ENDTX_Enabled
NFCT_INTEN_ENDTX_Msk
NFCT_INTEN_ENDTX_Pos
NFCT_INTEN_ERROR_Disabled
NFCT_INTEN_ERROR_Enabled
NFCT_INTEN_ERROR_Msk
NFCT_INTEN_ERROR_Pos
NFCT_INTEN_FIELDDETECTED_Disabled
NFCT_INTEN_FIELDDETECTED_Enabled
NFCT_INTEN_FIELDDETECTED_Msk
NFCT_INTEN_FIELDDETECTED_Pos
NFCT_INTEN_FIELDLOST_Disabled
NFCT_INTEN_FIELDLOST_Enabled
NFCT_INTEN_FIELDLOST_Msk
NFCT_INTEN_FIELDLOST_Pos
NFCT_INTEN_READY_Disabled
NFCT_INTEN_READY_Enabled
NFCT_INTEN_READY_Msk
NFCT_INTEN_READY_Pos
NFCT_INTEN_RXERROR_Disabled
NFCT_INTEN_RXERROR_Enabled
NFCT_INTEN_RXERROR_Msk
NFCT_INTEN_RXERROR_Pos
NFCT_INTEN_RXFRAMEEND_Disabled
NFCT_INTEN_RXFRAMEEND_Enabled
NFCT_INTEN_RXFRAMEEND_Msk
NFCT_INTEN_RXFRAMEEND_Pos
NFCT_INTEN_RXFRAMESTART_Disabled
NFCT_INTEN_RXFRAMESTART_Enabled
NFCT_INTEN_RXFRAMESTART_Msk
NFCT_INTEN_RXFRAMESTART_Pos
NFCT_INTEN_SELECTED_Disabled
NFCT_INTEN_SELECTED_Enabled
NFCT_INTEN_SELECTED_Msk
NFCT_INTEN_SELECTED_Pos
NFCT_INTEN_STARTED_Disabled
NFCT_INTEN_STARTED_Enabled
NFCT_INTEN_STARTED_Msk
NFCT_INTEN_STARTED_Pos
NFCT_INTEN_TXFRAMEEND_Disabled
NFCT_INTEN_TXFRAMEEND_Enabled
NFCT_INTEN_TXFRAMEEND_Msk
NFCT_INTEN_TXFRAMEEND_Pos
NFCT_INTEN_TXFRAMESTART_Disabled
NFCT_INTEN_TXFRAMESTART_Enabled
NFCT_INTEN_TXFRAMESTART_Msk
NFCT_INTEN_TXFRAMESTART_Pos
NFCT_MAXLEN_MAXLEN_Msk
NFCT_MAXLEN_MAXLEN_Pos
NFCT_NFCID1_2ND_LAST_NFCID1_T_Msk
NFCT_NFCID1_2ND_LAST_NFCID1_T_Pos
NFCT_NFCID1_2ND_LAST_NFCID1_U_Msk
NFCT_NFCID1_2ND_LAST_NFCID1_U_Pos
NFCT_NFCID1_2ND_LAST_NFCID1_V_Msk
NFCT_NFCID1_2ND_LAST_NFCID1_V_Pos
NFCT_NFCID1_3RD_LAST_NFCID1_Q_Msk
NFCT_NFCID1_3RD_LAST_NFCID1_Q_Pos
NFCT_NFCID1_3RD_LAST_NFCID1_R_Msk
NFCT_NFCID1_3RD_LAST_NFCID1_R_Pos
NFCT_NFCID1_3RD_LAST_NFCID1_S_Msk
NFCT_NFCID1_3RD_LAST_NFCID1_S_Pos
NFCT_NFCID1_LAST_NFCID1_W_Msk
NFCT_NFCID1_LAST_NFCID1_W_Pos
NFCT_NFCID1_LAST_NFCID1_X_Msk
NFCT_NFCID1_LAST_NFCID1_X_Pos
NFCT_NFCID1_LAST_NFCID1_Y_Msk
NFCT_NFCID1_LAST_NFCID1_Y_Pos
NFCT_NFCID1_LAST_NFCID1_Z_Msk
NFCT_NFCID1_LAST_NFCID1_Z_Pos
NFCT_NFCTAGSTATE_NFCTAGSTATE_Disabled
NFCT_NFCTAGSTATE_NFCTAGSTATE_FrameDelay
NFCT_NFCTAGSTATE_NFCTAGSTATE_Idle
NFCT_NFCTAGSTATE_NFCTAGSTATE_Msk
NFCT_NFCTAGSTATE_NFCTAGSTATE_Pos
NFCT_NFCTAGSTATE_NFCTAGSTATE_RampUp
NFCT_NFCTAGSTATE_NFCTAGSTATE_Receive
NFCT_NFCTAGSTATE_NFCTAGSTATE_Transmit
NFCT_PACKETPTR_PTR_Msk
NFCT_PACKETPTR_PTR_Pos
NFCT_RXD_AMOUNT_RXDATABITS_Msk
NFCT_RXD_AMOUNT_RXDATABITS_Pos
NFCT_RXD_AMOUNT_RXDATABYTES_Msk
NFCT_RXD_AMOUNT_RXDATABYTES_Pos
NFCT_RXD_FRAMECONFIG_CRCMODERX_CRC16RX
NFCT_RXD_FRAMECONFIG_CRCMODERX_Msk
NFCT_RXD_FRAMECONFIG_CRCMODERX_NoCRCRX
NFCT_RXD_FRAMECONFIG_CRCMODERX_Pos
NFCT_RXD_FRAMECONFIG_PARITY_Msk
NFCT_RXD_FRAMECONFIG_PARITY_NoParity
NFCT_RXD_FRAMECONFIG_PARITY_Parity
NFCT_RXD_FRAMECONFIG_PARITY_Pos
NFCT_RXD_FRAMECONFIG_SOF_Msk
NFCT_RXD_FRAMECONFIG_SOF_NoSoF
NFCT_RXD_FRAMECONFIG_SOF_Pos
NFCT_RXD_FRAMECONFIG_SOF_SoF
NFCT_SELRES_CASCADE_Msk
NFCT_SELRES_CASCADE_Pos
NFCT_SELRES_PROTOCOL_Msk
NFCT_SELRES_PROTOCOL_Pos
NFCT_SELRES_RFU10_Msk
NFCT_SELRES_RFU10_Pos
NFCT_SELRES_RFU43_Msk
NFCT_SELRES_RFU43_Pos
NFCT_SELRES_RFU7_Msk
NFCT_SELRES_RFU7_Pos
NFCT_SENSRES_BITFRAMESDD_Msk
NFCT_SENSRES_BITFRAMESDD_Pos
NFCT_SENSRES_BITFRAMESDD_SDD00000
NFCT_SENSRES_BITFRAMESDD_SDD00001
NFCT_SENSRES_BITFRAMESDD_SDD00010
NFCT_SENSRES_BITFRAMESDD_SDD00100
NFCT_SENSRES_BITFRAMESDD_SDD01000
NFCT_SENSRES_BITFRAMESDD_SDD10000
NFCT_SENSRES_NFCIDSIZE_Msk
NFCT_SENSRES_NFCIDSIZE_NFCID1Double
NFCT_SENSRES_NFCIDSIZE_NFCID1Single
NFCT_SENSRES_NFCIDSIZE_NFCID1Triple
NFCT_SENSRES_NFCIDSIZE_Pos
NFCT_SENSRES_PLATFCONFIG_Msk
NFCT_SENSRES_PLATFCONFIG_Pos
NFCT_SENSRES_RFU5_Msk
NFCT_SENSRES_RFU5_Pos
NFCT_SENSRES_RFU74_Msk
NFCT_SENSRES_RFU74_Pos
NFCT_SHORTS_FIELDDETECTED_ACTIVATE_Disabled
NFCT_SHORTS_FIELDDETECTED_ACTIVATE_Enabled
NFCT_SHORTS_FIELDDETECTED_ACTIVATE_Msk
NFCT_SHORTS_FIELDDETECTED_ACTIVATE_Pos
NFCT_SHORTS_FIELDLOST_SENSE_Disabled
NFCT_SHORTS_FIELDLOST_SENSE_Enabled
NFCT_SHORTS_FIELDLOST_SENSE_Msk
NFCT_SHORTS_FIELDLOST_SENSE_Pos
NFCT_SHORTS_TXFRAMEEND_ENABLERXDATA_Disabled
NFCT_SHORTS_TXFRAMEEND_ENABLERXDATA_Enabled
NFCT_SHORTS_TXFRAMEEND_ENABLERXDATA_Msk
NFCT_SHORTS_TXFRAMEEND_ENABLERXDATA_Pos
NFCT_SLEEPSTATE_SLEEPSTATE_Idle
NFCT_SLEEPSTATE_SLEEPSTATE_Msk
NFCT_SLEEPSTATE_SLEEPSTATE_Pos
NFCT_SLEEPSTATE_SLEEPSTATE_SleepA
NFCT_TASKS_ACTIVATE_TASKS_ACTIVATE_Msk
NFCT_TASKS_ACTIVATE_TASKS_ACTIVATE_Pos
NFCT_TASKS_ACTIVATE_TASKS_ACTIVATE_Trigger
NFCT_TASKS_DISABLE_TASKS_DISABLE_Msk
NFCT_TASKS_DISABLE_TASKS_DISABLE_Pos
NFCT_TASKS_DISABLE_TASKS_DISABLE_Trigger
NFCT_TASKS_ENABLERXDATA_TASKS_ENABLERXDATA_Msk
NFCT_TASKS_ENABLERXDATA_TASKS_ENABLERXDATA_Pos
NFCT_TASKS_ENABLERXDATA_TASKS_ENABLERXDATA_Trigger
NFCT_TASKS_GOIDLE_TASKS_GOIDLE_Msk
NFCT_TASKS_GOIDLE_TASKS_GOIDLE_Pos
NFCT_TASKS_GOIDLE_TASKS_GOIDLE_Trigger
NFCT_TASKS_GOSLEEP_TASKS_GOSLEEP_Msk
NFCT_TASKS_GOSLEEP_TASKS_GOSLEEP_Pos
NFCT_TASKS_GOSLEEP_TASKS_GOSLEEP_Trigger
NFCT_TASKS_SENSE_TASKS_SENSE_Msk
NFCT_TASKS_SENSE_TASKS_SENSE_Pos
NFCT_TASKS_SENSE_TASKS_SENSE_Trigger
NFCT_TASKS_STARTTX_TASKS_STARTTX_Msk
NFCT_TASKS_STARTTX_TASKS_STARTTX_Pos
NFCT_TASKS_STARTTX_TASKS_STARTTX_Trigger
NFCT_TXD_AMOUNT_TXDATABITS_Msk
NFCT_TXD_AMOUNT_TXDATABITS_Pos
NFCT_TXD_AMOUNT_TXDATABYTES_Msk
NFCT_TXD_AMOUNT_TXDATABYTES_Pos
NFCT_TXD_FRAMECONFIG_CRCMODETX_CRC16TX
NFCT_TXD_FRAMECONFIG_CRCMODETX_Msk
NFCT_TXD_FRAMECONFIG_CRCMODETX_NoCRCTX
NFCT_TXD_FRAMECONFIG_CRCMODETX_Pos
NFCT_TXD_FRAMECONFIG_DISCARDMODE_DiscardEnd
NFCT_TXD_FRAMECONFIG_DISCARDMODE_DiscardStart
NFCT_TXD_FRAMECONFIG_DISCARDMODE_Msk
NFCT_TXD_FRAMECONFIG_DISCARDMODE_Pos
NFCT_TXD_FRAMECONFIG_PARITY_Msk
NFCT_TXD_FRAMECONFIG_PARITY_NoParity
NFCT_TXD_FRAMECONFIG_PARITY_Parity
NFCT_TXD_FRAMECONFIG_PARITY_Pos
NFCT_TXD_FRAMECONFIG_SOF_Msk
NFCT_TXD_FRAMECONFIG_SOF_NoSoF
NFCT_TXD_FRAMECONFIG_SOF_Pos
NFCT_TXD_FRAMECONFIG_SOF_SoF
NGROUPS_MAX
NIMBLE_CFG_CONTROLLER
NL_ARGMAX
NON_BLOCKING
NRF52840_XXAA
NRF52_AIN0
NRF52_AIN1
NRF52_AIN2
NRF52_AIN3
NRF52_AIN4
NRF52_AIN5
NRF52_AIN6
NRF52_AIN7
NRF52_VDD
NRF52_VDDHDIV5
NRF_AAR_BASE
NRF_ACL_BASE
NRF_CCM_BASE
NRF_CC_HOST_RGF_BASE
NRF_CLOCK_BASE
NRF_COMP_BASE
NRF_CRYPTOCELL_BASE
NRF_ECB_BASE
NRF_EGU0_BASE
NRF_EGU1_BASE
NRF_EGU2_BASE
NRF_EGU3_BASE
NRF_EGU4_BASE
NRF_EGU5_BASE
NRF_FICR_BASE
NRF_FPU_BASE
NRF_GPIOTE_BASE
NRF_I2S_BASE
NRF_LPCOMP_BASE
NRF_MWU_BASE
NRF_NFCT_BASE
NRF_NVMC_BASE
NRF_P0_BASE
NRF_P1_BASE
NRF_PDM_BASE
NRF_POWER_BASE
NRF_PPI_BASE
NRF_PWM0_BASE
NRF_PWM1_BASE
NRF_PWM2_BASE
NRF_PWM3_BASE
NRF_QDEC_BASE
NRF_QSPI_BASE
NRF_RADIO_BASE
NRF_RNG_BASE
NRF_RTC0_BASE
NRF_RTC1_BASE
NRF_RTC2_BASE
NRF_SAADC_BASE
NRF_SPI0_BASE
NRF_SPI1_BASE
NRF_SPI2_BASE
NRF_SPIM0_BASE
NRF_SPIM1_BASE
NRF_SPIM2_BASE
NRF_SPIM3_BASE
NRF_SPIS0_BASE
NRF_SPIS1_BASE
NRF_SPIS2_BASE
NRF_SWI0_BASE
NRF_SWI1_BASE
NRF_SWI2_BASE
NRF_SWI3_BASE
NRF_SWI4_BASE
NRF_SWI5_BASE
NRF_TEMP_BASE
NRF_TIMER0_BASE
NRF_TIMER1_BASE
NRF_TIMER2_BASE
NRF_TIMER3_BASE
NRF_TIMER4_BASE
NRF_TWI0_BASE
NRF_TWI1_BASE
NRF_TWIM0_BASE
NRF_TWIM1_BASE
NRF_TWIS0_BASE
NRF_TWIS1_BASE
NRF_UART0_BASE
NRF_UARTE0_BASE
NRF_UARTE1_BASE
NRF_UICR_BASE
NRF_USBD_BASE
NRF_WDT_BASE
NS_PER_MS
NS_PER_SEC
NS_PER_US
NVIC_BASE
NVIC_STIR_INTID_Msk
NVIC_STIR_INTID_Pos
NVIC_USER_IRQ_OFFSET
NVMC_CONFIG_WEN_Een
NVMC_CONFIG_WEN_Msk
NVMC_CONFIG_WEN_Pos
NVMC_CONFIG_WEN_Ren
NVMC_CONFIG_WEN_Wen
NVMC_COUNT
NVMC_ERASEALL_ERASEALL_Erase
NVMC_ERASEALL_ERASEALL_Msk
NVMC_ERASEALL_ERASEALL_NoOperation
NVMC_ERASEALL_ERASEALL_Pos
NVMC_ERASEPAGEPARTIALCFG_DURATION_Msk
NVMC_ERASEPAGEPARTIALCFG_DURATION_Pos
NVMC_ERASEPAGEPARTIAL_ERASEPAGEPARTIAL_Msk
NVMC_ERASEPAGEPARTIAL_ERASEPAGEPARTIAL_Pos
NVMC_ERASEPAGE_ERASEPAGE_Msk
NVMC_ERASEPAGE_ERASEPAGE_Pos
NVMC_ERASEPCR0_ERASEPCR0_Msk
NVMC_ERASEPCR0_ERASEPCR0_Pos
NVMC_ERASEPCR1_ERASEPCR1_Msk
NVMC_ERASEPCR1_ERASEPCR1_Pos
NVMC_ERASEUICR_ERASEUICR_Erase
NVMC_ERASEUICR_ERASEUICR_Msk
NVMC_ERASEUICR_ERASEUICR_NoOperation
NVMC_ERASEUICR_ERASEUICR_Pos
NVMC_ICACHECNF_CACHEEN_Disabled
NVMC_ICACHECNF_CACHEEN_Enabled
NVMC_ICACHECNF_CACHEEN_Msk
NVMC_ICACHECNF_CACHEEN_Pos
NVMC_ICACHECNF_CACHEPROFEN_Disabled
NVMC_ICACHECNF_CACHEPROFEN_Enabled
NVMC_ICACHECNF_CACHEPROFEN_Msk
NVMC_ICACHECNF_CACHEPROFEN_Pos
NVMC_IHIT_HITS_Msk
NVMC_IHIT_HITS_Pos
NVMC_IMISS_MISSES_Msk
NVMC_IMISS_MISSES_Pos
NVMC_READYNEXT_READYNEXT_Busy
NVMC_READYNEXT_READYNEXT_Msk
NVMC_READYNEXT_READYNEXT_Pos
NVMC_READYNEXT_READYNEXT_Ready
NVMC_READY_READY_Busy
NVMC_READY_READY_Msk
NVMC_READY_READY_Pos
NVMC_READY_READY_Ready
NWDT_TIME_LOWER_LIMIT
OPEN_MAX
OS_ALIGNMENT
OS_MEMPOOL_F_EXT
OS_MEMPOOL_INFO_NAME_LEN
O_APPEND
O_BINARY
O_CREAT
O_EXCL
O_NOCTTY
O_NONBLOCK
O_RDONLY
O_RDWR
O_SYNC
O_TRUNC
O_WRONLY
P0_FEATURE_PINS_PRESENT
P0_PIN_NUM
P1_FEATURE_PINS_PRESENT
P1_PIN_NUM
PATH_MAX
PBKDF2_KEY_SIZE
PDM_COUNT
PDM_EASYDMA_MAXCNT_SIZE
PDM_ENABLE_ENABLE_Disabled
PDM_ENABLE_ENABLE_Enabled
PDM_ENABLE_ENABLE_Msk
PDM_ENABLE_ENABLE_Pos
PDM_EVENTS_END_EVENTS_END_Generated
PDM_EVENTS_END_EVENTS_END_Msk
PDM_EVENTS_END_EVENTS_END_NotGenerated
PDM_EVENTS_END_EVENTS_END_Pos
PDM_EVENTS_STARTED_EVENTS_STARTED_Generated
PDM_EVENTS_STARTED_EVENTS_STARTED_Msk
PDM_EVENTS_STARTED_EVENTS_STARTED_NotGenerated
PDM_EVENTS_STARTED_EVENTS_STARTED_Pos
PDM_EVENTS_STOPPED_EVENTS_STOPPED_Generated
PDM_EVENTS_STOPPED_EVENTS_STOPPED_Msk
PDM_EVENTS_STOPPED_EVENTS_STOPPED_NotGenerated
PDM_EVENTS_STOPPED_EVENTS_STOPPED_Pos
PDM_GAINL_GAINL_DefaultGain
PDM_GAINL_GAINL_MaxGain
PDM_GAINL_GAINL_MinGain
PDM_GAINL_GAINL_Msk
PDM_GAINL_GAINL_Pos
PDM_GAINR_GAINR_DefaultGain
PDM_GAINR_GAINR_MaxGain
PDM_GAINR_GAINR_MinGain
PDM_GAINR_GAINR_Msk
PDM_GAINR_GAINR_Pos
PDM_INTENCLR_END_Clear
PDM_INTENCLR_END_Disabled
PDM_INTENCLR_END_Enabled
PDM_INTENCLR_END_Msk
PDM_INTENCLR_END_Pos
PDM_INTENCLR_STARTED_Clear
PDM_INTENCLR_STARTED_Disabled
PDM_INTENCLR_STARTED_Enabled
PDM_INTENCLR_STARTED_Msk
PDM_INTENCLR_STARTED_Pos
PDM_INTENCLR_STOPPED_Clear
PDM_INTENCLR_STOPPED_Disabled
PDM_INTENCLR_STOPPED_Enabled
PDM_INTENCLR_STOPPED_Msk
PDM_INTENCLR_STOPPED_Pos
PDM_INTENSET_END_Disabled
PDM_INTENSET_END_Enabled
PDM_INTENSET_END_Msk
PDM_INTENSET_END_Pos
PDM_INTENSET_END_Set
PDM_INTENSET_STARTED_Disabled
PDM_INTENSET_STARTED_Enabled
PDM_INTENSET_STARTED_Msk
PDM_INTENSET_STARTED_Pos
PDM_INTENSET_STARTED_Set
PDM_INTENSET_STOPPED_Disabled
PDM_INTENSET_STOPPED_Enabled
PDM_INTENSET_STOPPED_Msk
PDM_INTENSET_STOPPED_Pos
PDM_INTENSET_STOPPED_Set
PDM_INTEN_END_Disabled
PDM_INTEN_END_Enabled
PDM_INTEN_END_Msk
PDM_INTEN_END_Pos
PDM_INTEN_STARTED_Disabled
PDM_INTEN_STARTED_Enabled
PDM_INTEN_STARTED_Msk
PDM_INTEN_STARTED_Pos
PDM_INTEN_STOPPED_Disabled
PDM_INTEN_STOPPED_Enabled
PDM_INTEN_STOPPED_Msk
PDM_INTEN_STOPPED_Pos
PDM_MODE_EDGE_LeftFalling
PDM_MODE_EDGE_LeftRising
PDM_MODE_EDGE_Msk
PDM_MODE_EDGE_Pos
PDM_MODE_OPERATION_Mono
PDM_MODE_OPERATION_Msk
PDM_MODE_OPERATION_Pos
PDM_MODE_OPERATION_Stereo
PDM_PDMCLKCTRL_FREQ_1000K
PDM_PDMCLKCTRL_FREQ_1067K
PDM_PDMCLKCTRL_FREQ_1231K
PDM_PDMCLKCTRL_FREQ_1280K
PDM_PDMCLKCTRL_FREQ_1333K
PDM_PDMCLKCTRL_FREQ_Default
PDM_PDMCLKCTRL_FREQ_Msk
PDM_PDMCLKCTRL_FREQ_Pos
PDM_PSEL_CLK_CONNECT_Connected
PDM_PSEL_CLK_CONNECT_Disconnected
PDM_PSEL_CLK_CONNECT_Msk
PDM_PSEL_CLK_CONNECT_Pos
PDM_PSEL_CLK_PIN_Msk
PDM_PSEL_CLK_PIN_Pos
PDM_PSEL_CLK_PORT_Msk
PDM_PSEL_CLK_PORT_Pos
PDM_PSEL_DIN_CONNECT_Connected
PDM_PSEL_DIN_CONNECT_Disconnected
PDM_PSEL_DIN_CONNECT_Msk
PDM_PSEL_DIN_CONNECT_Pos
PDM_PSEL_DIN_PIN_Msk
PDM_PSEL_DIN_PIN_Pos
PDM_PSEL_DIN_PORT_Msk
PDM_PSEL_DIN_PORT_Pos
PDM_RATIO_RATIO_Msk
PDM_RATIO_RATIO_Pos
PDM_RATIO_RATIO_Ratio64
PDM_RATIO_RATIO_Ratio80
PDM_SAMPLE_MAXCNT_BUFFSIZE_Msk
PDM_SAMPLE_MAXCNT_BUFFSIZE_Pos
PDM_SAMPLE_PTR_SAMPLEPTR_Msk
PDM_SAMPLE_PTR_SAMPLEPTR_Pos
PDM_TASKS_START_TASKS_START_Msk
PDM_TASKS_START_TASKS_START_Pos
PDM_TASKS_START_TASKS_START_Trigger
PDM_TASKS_STOP_TASKS_STOP_Msk
PDM_TASKS_STOP_TASKS_STOP_Pos
PDM_TASKS_STOP_TASKS_STOP_Trigger
PDP_ENDIAN
PERIPH_CLOCK
PERIPH_TIMER_PROVIDES_SET
PHYDAT_DIM
PIPE_BUF
POWER_COUNT
POWER_DCDCEN0_DCDCEN_Disabled
POWER_DCDCEN0_DCDCEN_Enabled
POWER_DCDCEN0_DCDCEN_Msk
POWER_DCDCEN0_DCDCEN_Pos
POWER_DCDCEN_DCDCEN_Disabled
POWER_DCDCEN_DCDCEN_Enabled
POWER_DCDCEN_DCDCEN_Msk
POWER_DCDCEN_DCDCEN_Pos
POWER_EVENTS_POFWARN_EVENTS_POFWARN_Generated
POWER_EVENTS_POFWARN_EVENTS_POFWARN_Msk
POWER_EVENTS_POFWARN_EVENTS_POFWARN_NotGenerated
POWER_EVENTS_POFWARN_EVENTS_POFWARN_Pos
POWER_EVENTS_SLEEPENTER_EVENTS_SLEEPENTER_Generated
POWER_EVENTS_SLEEPENTER_EVENTS_SLEEPENTER_Msk
POWER_EVENTS_SLEEPENTER_EVENTS_SLEEPENTER_NotGenerated
POWER_EVENTS_SLEEPENTER_EVENTS_SLEEPENTER_Pos
POWER_EVENTS_SLEEPEXIT_EVENTS_SLEEPEXIT_Generated
POWER_EVENTS_SLEEPEXIT_EVENTS_SLEEPEXIT_Msk
POWER_EVENTS_SLEEPEXIT_EVENTS_SLEEPEXIT_NotGenerated
POWER_EVENTS_SLEEPEXIT_EVENTS_SLEEPEXIT_Pos
POWER_EVENTS_USBDETECTED_EVENTS_USBDETECTED_Generated
POWER_EVENTS_USBDETECTED_EVENTS_USBDETECTED_Msk
POWER_EVENTS_USBDETECTED_EVENTS_USBDETECTED_NotGenerated
POWER_EVENTS_USBDETECTED_EVENTS_USBDETECTED_Pos
POWER_EVENTS_USBPWRRDY_EVENTS_USBPWRRDY_Generated
POWER_EVENTS_USBPWRRDY_EVENTS_USBPWRRDY_Msk
POWER_EVENTS_USBPWRRDY_EVENTS_USBPWRRDY_NotGenerated
POWER_EVENTS_USBPWRRDY_EVENTS_USBPWRRDY_Pos
POWER_EVENTS_USBREMOVED_EVENTS_USBREMOVED_Generated
POWER_EVENTS_USBREMOVED_EVENTS_USBREMOVED_Msk
POWER_EVENTS_USBREMOVED_EVENTS_USBREMOVED_NotGenerated
POWER_EVENTS_USBREMOVED_EVENTS_USBREMOVED_Pos
POWER_FEATURE_RAM_REGISTERS_COUNT
POWER_GPREGRET2_GPREGRET_Msk
POWER_GPREGRET2_GPREGRET_Pos
POWER_GPREGRET_GPREGRET_Msk
POWER_GPREGRET_GPREGRET_Pos
POWER_INTENCLR_POFWARN_Clear
POWER_INTENCLR_POFWARN_Disabled
POWER_INTENCLR_POFWARN_Enabled
POWER_INTENCLR_POFWARN_Msk
POWER_INTENCLR_POFWARN_Pos
POWER_INTENCLR_SLEEPENTER_Clear
POWER_INTENCLR_SLEEPENTER_Disabled
POWER_INTENCLR_SLEEPENTER_Enabled
POWER_INTENCLR_SLEEPENTER_Msk
POWER_INTENCLR_SLEEPENTER_Pos
POWER_INTENCLR_SLEEPEXIT_Clear
POWER_INTENCLR_SLEEPEXIT_Disabled
POWER_INTENCLR_SLEEPEXIT_Enabled
POWER_INTENCLR_SLEEPEXIT_Msk
POWER_INTENCLR_SLEEPEXIT_Pos
POWER_INTENCLR_USBDETECTED_Clear
POWER_INTENCLR_USBDETECTED_Disabled
POWER_INTENCLR_USBDETECTED_Enabled
POWER_INTENCLR_USBDETECTED_Msk
POWER_INTENCLR_USBDETECTED_Pos
POWER_INTENCLR_USBPWRRDY_Clear
POWER_INTENCLR_USBPWRRDY_Disabled
POWER_INTENCLR_USBPWRRDY_Enabled
POWER_INTENCLR_USBPWRRDY_Msk
POWER_INTENCLR_USBPWRRDY_Pos
POWER_INTENCLR_USBREMOVED_Clear
POWER_INTENCLR_USBREMOVED_Disabled
POWER_INTENCLR_USBREMOVED_Enabled
POWER_INTENCLR_USBREMOVED_Msk
POWER_INTENCLR_USBREMOVED_Pos
POWER_INTENSET_POFWARN_Disabled
POWER_INTENSET_POFWARN_Enabled
POWER_INTENSET_POFWARN_Msk
POWER_INTENSET_POFWARN_Pos
POWER_INTENSET_POFWARN_Set
POWER_INTENSET_SLEEPENTER_Disabled
POWER_INTENSET_SLEEPENTER_Enabled
POWER_INTENSET_SLEEPENTER_Msk
POWER_INTENSET_SLEEPENTER_Pos
POWER_INTENSET_SLEEPENTER_Set
POWER_INTENSET_SLEEPEXIT_Disabled
POWER_INTENSET_SLEEPEXIT_Enabled
POWER_INTENSET_SLEEPEXIT_Msk
POWER_INTENSET_SLEEPEXIT_Pos
POWER_INTENSET_SLEEPEXIT_Set
POWER_INTENSET_USBDETECTED_Disabled
POWER_INTENSET_USBDETECTED_Enabled
POWER_INTENSET_USBDETECTED_Msk
POWER_INTENSET_USBDETECTED_Pos
POWER_INTENSET_USBDETECTED_Set
POWER_INTENSET_USBPWRRDY_Disabled
POWER_INTENSET_USBPWRRDY_Enabled
POWER_INTENSET_USBPWRRDY_Msk
POWER_INTENSET_USBPWRRDY_Pos
POWER_INTENSET_USBPWRRDY_Set
POWER_INTENSET_USBREMOVED_Disabled
POWER_INTENSET_USBREMOVED_Enabled
POWER_INTENSET_USBREMOVED_Msk
POWER_INTENSET_USBREMOVED_Pos
POWER_INTENSET_USBREMOVED_Set
POWER_MAINREGSTATUS_MAINREGSTATUS_High
POWER_MAINREGSTATUS_MAINREGSTATUS_Msk
POWER_MAINREGSTATUS_MAINREGSTATUS_Normal
POWER_MAINREGSTATUS_MAINREGSTATUS_Pos
POWER_POFCON_POF_Disabled
POWER_POFCON_POF_Enabled
POWER_POFCON_POF_Msk
POWER_POFCON_POF_Pos
POWER_POFCON_THRESHOLDVDDH_Msk
POWER_POFCON_THRESHOLDVDDH_Pos
POWER_POFCON_THRESHOLDVDDH_V27
POWER_POFCON_THRESHOLDVDDH_V28
POWER_POFCON_THRESHOLDVDDH_V29
POWER_POFCON_THRESHOLDVDDH_V30
POWER_POFCON_THRESHOLDVDDH_V31
POWER_POFCON_THRESHOLDVDDH_V32
POWER_POFCON_THRESHOLDVDDH_V33
POWER_POFCON_THRESHOLDVDDH_V34
POWER_POFCON_THRESHOLDVDDH_V35
POWER_POFCON_THRESHOLDVDDH_V36
POWER_POFCON_THRESHOLDVDDH_V37
POWER_POFCON_THRESHOLDVDDH_V38
POWER_POFCON_THRESHOLDVDDH_V39
POWER_POFCON_THRESHOLDVDDH_V40
POWER_POFCON_THRESHOLDVDDH_V41
POWER_POFCON_THRESHOLDVDDH_V42
POWER_POFCON_THRESHOLD_Msk
POWER_POFCON_THRESHOLD_Pos
POWER_POFCON_THRESHOLD_V17
POWER_POFCON_THRESHOLD_V18
POWER_POFCON_THRESHOLD_V19
POWER_POFCON_THRESHOLD_V20
POWER_POFCON_THRESHOLD_V21
POWER_POFCON_THRESHOLD_V22
POWER_POFCON_THRESHOLD_V23
POWER_POFCON_THRESHOLD_V24
POWER_POFCON_THRESHOLD_V25
POWER_POFCON_THRESHOLD_V26
POWER_POFCON_THRESHOLD_V27
POWER_POFCON_THRESHOLD_V28
POWER_RAMSTATUS_RAMBLOCK0_Msk
POWER_RAMSTATUS_RAMBLOCK0_Off
POWER_RAMSTATUS_RAMBLOCK0_On
POWER_RAMSTATUS_RAMBLOCK0_Pos
POWER_RAMSTATUS_RAMBLOCK1_Msk
POWER_RAMSTATUS_RAMBLOCK1_Off
POWER_RAMSTATUS_RAMBLOCK1_On
POWER_RAMSTATUS_RAMBLOCK1_Pos
POWER_RAMSTATUS_RAMBLOCK2_Msk
POWER_RAMSTATUS_RAMBLOCK2_Off
POWER_RAMSTATUS_RAMBLOCK2_On
POWER_RAMSTATUS_RAMBLOCK2_Pos
POWER_RAMSTATUS_RAMBLOCK3_Msk
POWER_RAMSTATUS_RAMBLOCK3_Off
POWER_RAMSTATUS_RAMBLOCK3_On
POWER_RAMSTATUS_RAMBLOCK3_Pos
POWER_RAM_POWERCLR_S0POWER_Msk
POWER_RAM_POWERCLR_S0POWER_Off
POWER_RAM_POWERCLR_S0POWER_Pos
POWER_RAM_POWERCLR_S0RETENTION_Msk
POWER_RAM_POWERCLR_S0RETENTION_Off
POWER_RAM_POWERCLR_S0RETENTION_Pos
POWER_RAM_POWERCLR_S10POWER_Msk
POWER_RAM_POWERCLR_S10POWER_Off
POWER_RAM_POWERCLR_S10POWER_Pos
POWER_RAM_POWERCLR_S10RETENTION_Msk
POWER_RAM_POWERCLR_S10RETENTION_Off
POWER_RAM_POWERCLR_S10RETENTION_Pos
POWER_RAM_POWERCLR_S11POWER_Msk
POWER_RAM_POWERCLR_S11POWER_Off
POWER_RAM_POWERCLR_S11POWER_Pos
POWER_RAM_POWERCLR_S11RETENTION_Msk
POWER_RAM_POWERCLR_S11RETENTION_Off
POWER_RAM_POWERCLR_S11RETENTION_Pos
POWER_RAM_POWERCLR_S12POWER_Msk
POWER_RAM_POWERCLR_S12POWER_Off
POWER_RAM_POWERCLR_S12POWER_Pos
POWER_RAM_POWERCLR_S12RETENTION_Msk
POWER_RAM_POWERCLR_S12RETENTION_Off
POWER_RAM_POWERCLR_S12RETENTION_Pos
POWER_RAM_POWERCLR_S13POWER_Msk
POWER_RAM_POWERCLR_S13POWER_Off
POWER_RAM_POWERCLR_S13POWER_Pos
POWER_RAM_POWERCLR_S13RETENTION_Msk
POWER_RAM_POWERCLR_S13RETENTION_Off
POWER_RAM_POWERCLR_S13RETENTION_Pos
POWER_RAM_POWERCLR_S14POWER_Msk
POWER_RAM_POWERCLR_S14POWER_Off
POWER_RAM_POWERCLR_S14POWER_Pos
POWER_RAM_POWERCLR_S14RETENTION_Msk
POWER_RAM_POWERCLR_S14RETENTION_Off
POWER_RAM_POWERCLR_S14RETENTION_Pos
POWER_RAM_POWERCLR_S15POWER_Msk
POWER_RAM_POWERCLR_S15POWER_Off
POWER_RAM_POWERCLR_S15POWER_Pos
POWER_RAM_POWERCLR_S15RETENTION_Msk
POWER_RAM_POWERCLR_S15RETENTION_Off
POWER_RAM_POWERCLR_S15RETENTION_Pos
POWER_RAM_POWERCLR_S1POWER_Msk
POWER_RAM_POWERCLR_S1POWER_Off
POWER_RAM_POWERCLR_S1POWER_Pos
POWER_RAM_POWERCLR_S1RETENTION_Msk
POWER_RAM_POWERCLR_S1RETENTION_Off
POWER_RAM_POWERCLR_S1RETENTION_Pos
POWER_RAM_POWERCLR_S2POWER_Msk
POWER_RAM_POWERCLR_S2POWER_Off
POWER_RAM_POWERCLR_S2POWER_Pos
POWER_RAM_POWERCLR_S2RETENTION_Msk
POWER_RAM_POWERCLR_S2RETENTION_Off
POWER_RAM_POWERCLR_S2RETENTION_Pos
POWER_RAM_POWERCLR_S3POWER_Msk
POWER_RAM_POWERCLR_S3POWER_Off
POWER_RAM_POWERCLR_S3POWER_Pos
POWER_RAM_POWERCLR_S3RETENTION_Msk
POWER_RAM_POWERCLR_S3RETENTION_Off
POWER_RAM_POWERCLR_S3RETENTION_Pos
POWER_RAM_POWERCLR_S4POWER_Msk
POWER_RAM_POWERCLR_S4POWER_Off
POWER_RAM_POWERCLR_S4POWER_Pos
POWER_RAM_POWERCLR_S4RETENTION_Msk
POWER_RAM_POWERCLR_S4RETENTION_Off
POWER_RAM_POWERCLR_S4RETENTION_Pos
POWER_RAM_POWERCLR_S5POWER_Msk
POWER_RAM_POWERCLR_S5POWER_Off
POWER_RAM_POWERCLR_S5POWER_Pos
POWER_RAM_POWERCLR_S5RETENTION_Msk
POWER_RAM_POWERCLR_S5RETENTION_Off
POWER_RAM_POWERCLR_S5RETENTION_Pos
POWER_RAM_POWERCLR_S6POWER_Msk
POWER_RAM_POWERCLR_S6POWER_Off
POWER_RAM_POWERCLR_S6POWER_Pos
POWER_RAM_POWERCLR_S6RETENTION_Msk
POWER_RAM_POWERCLR_S6RETENTION_Off
POWER_RAM_POWERCLR_S6RETENTION_Pos
POWER_RAM_POWERCLR_S7POWER_Msk
POWER_RAM_POWERCLR_S7POWER_Off
POWER_RAM_POWERCLR_S7POWER_Pos
POWER_RAM_POWERCLR_S7RETENTION_Msk
POWER_RAM_POWERCLR_S7RETENTION_Off
POWER_RAM_POWERCLR_S7RETENTION_Pos
POWER_RAM_POWERCLR_S8POWER_Msk
POWER_RAM_POWERCLR_S8POWER_Off
POWER_RAM_POWERCLR_S8POWER_Pos
POWER_RAM_POWERCLR_S8RETENTION_Msk
POWER_RAM_POWERCLR_S8RETENTION_Off
POWER_RAM_POWERCLR_S8RETENTION_Pos
POWER_RAM_POWERCLR_S9POWER_Msk
POWER_RAM_POWERCLR_S9POWER_Off
POWER_RAM_POWERCLR_S9POWER_Pos
POWER_RAM_POWERCLR_S9RETENTION_Msk
POWER_RAM_POWERCLR_S9RETENTION_Off
POWER_RAM_POWERCLR_S9RETENTION_Pos
POWER_RAM_POWERSET_S0POWER_Msk
POWER_RAM_POWERSET_S0POWER_On
POWER_RAM_POWERSET_S0POWER_Pos
POWER_RAM_POWERSET_S0RETENTION_Msk
POWER_RAM_POWERSET_S0RETENTION_On
POWER_RAM_POWERSET_S0RETENTION_Pos
POWER_RAM_POWERSET_S10POWER_Msk
POWER_RAM_POWERSET_S10POWER_On
POWER_RAM_POWERSET_S10POWER_Pos
POWER_RAM_POWERSET_S10RETENTION_Msk
POWER_RAM_POWERSET_S10RETENTION_On
POWER_RAM_POWERSET_S10RETENTION_Pos
POWER_RAM_POWERSET_S11POWER_Msk
POWER_RAM_POWERSET_S11POWER_On
POWER_RAM_POWERSET_S11POWER_Pos
POWER_RAM_POWERSET_S11RETENTION_Msk
POWER_RAM_POWERSET_S11RETENTION_On
POWER_RAM_POWERSET_S11RETENTION_Pos
POWER_RAM_POWERSET_S12POWER_Msk
POWER_RAM_POWERSET_S12POWER_On
POWER_RAM_POWERSET_S12POWER_Pos
POWER_RAM_POWERSET_S12RETENTION_Msk
POWER_RAM_POWERSET_S12RETENTION_On
POWER_RAM_POWERSET_S12RETENTION_Pos
POWER_RAM_POWERSET_S13POWER_Msk
POWER_RAM_POWERSET_S13POWER_On
POWER_RAM_POWERSET_S13POWER_Pos
POWER_RAM_POWERSET_S13RETENTION_Msk
POWER_RAM_POWERSET_S13RETENTION_On
POWER_RAM_POWERSET_S13RETENTION_Pos
POWER_RAM_POWERSET_S14POWER_Msk
POWER_RAM_POWERSET_S14POWER_On
POWER_RAM_POWERSET_S14POWER_Pos
POWER_RAM_POWERSET_S14RETENTION_Msk
POWER_RAM_POWERSET_S14RETENTION_On
POWER_RAM_POWERSET_S14RETENTION_Pos
POWER_RAM_POWERSET_S15POWER_Msk
POWER_RAM_POWERSET_S15POWER_On
POWER_RAM_POWERSET_S15POWER_Pos
POWER_RAM_POWERSET_S15RETENTION_Msk
POWER_RAM_POWERSET_S15RETENTION_On
POWER_RAM_POWERSET_S15RETENTION_Pos
POWER_RAM_POWERSET_S1POWER_Msk
POWER_RAM_POWERSET_S1POWER_On
POWER_RAM_POWERSET_S1POWER_Pos
POWER_RAM_POWERSET_S1RETENTION_Msk
POWER_RAM_POWERSET_S1RETENTION_On
POWER_RAM_POWERSET_S1RETENTION_Pos
POWER_RAM_POWERSET_S2POWER_Msk
POWER_RAM_POWERSET_S2POWER_On
POWER_RAM_POWERSET_S2POWER_Pos
POWER_RAM_POWERSET_S2RETENTION_Msk
POWER_RAM_POWERSET_S2RETENTION_On
POWER_RAM_POWERSET_S2RETENTION_Pos
POWER_RAM_POWERSET_S3POWER_Msk
POWER_RAM_POWERSET_S3POWER_On
POWER_RAM_POWERSET_S3POWER_Pos
POWER_RAM_POWERSET_S3RETENTION_Msk
POWER_RAM_POWERSET_S3RETENTION_On
POWER_RAM_POWERSET_S3RETENTION_Pos
POWER_RAM_POWERSET_S4POWER_Msk
POWER_RAM_POWERSET_S4POWER_On
POWER_RAM_POWERSET_S4POWER_Pos
POWER_RAM_POWERSET_S4RETENTION_Msk
POWER_RAM_POWERSET_S4RETENTION_On
POWER_RAM_POWERSET_S4RETENTION_Pos
POWER_RAM_POWERSET_S5POWER_Msk
POWER_RAM_POWERSET_S5POWER_On
POWER_RAM_POWERSET_S5POWER_Pos
POWER_RAM_POWERSET_S5RETENTION_Msk
POWER_RAM_POWERSET_S5RETENTION_On
POWER_RAM_POWERSET_S5RETENTION_Pos
POWER_RAM_POWERSET_S6POWER_Msk
POWER_RAM_POWERSET_S6POWER_On
POWER_RAM_POWERSET_S6POWER_Pos
POWER_RAM_POWERSET_S6RETENTION_Msk
POWER_RAM_POWERSET_S6RETENTION_On
POWER_RAM_POWERSET_S6RETENTION_Pos
POWER_RAM_POWERSET_S7POWER_Msk
POWER_RAM_POWERSET_S7POWER_On
POWER_RAM_POWERSET_S7POWER_Pos
POWER_RAM_POWERSET_S7RETENTION_Msk
POWER_RAM_POWERSET_S7RETENTION_On
POWER_RAM_POWERSET_S7RETENTION_Pos
POWER_RAM_POWERSET_S8POWER_Msk
POWER_RAM_POWERSET_S8POWER_On
POWER_RAM_POWERSET_S8POWER_Pos
POWER_RAM_POWERSET_S8RETENTION_Msk
POWER_RAM_POWERSET_S8RETENTION_On
POWER_RAM_POWERSET_S8RETENTION_Pos
POWER_RAM_POWERSET_S9POWER_Msk
POWER_RAM_POWERSET_S9POWER_On
POWER_RAM_POWERSET_S9POWER_Pos
POWER_RAM_POWERSET_S9RETENTION_Msk
POWER_RAM_POWERSET_S9RETENTION_On
POWER_RAM_POWERSET_S9RETENTION_Pos
POWER_RAM_POWER_S0POWER_Msk
POWER_RAM_POWER_S0POWER_Off
POWER_RAM_POWER_S0POWER_On
POWER_RAM_POWER_S0POWER_Pos
POWER_RAM_POWER_S0RETENTION_Msk
POWER_RAM_POWER_S0RETENTION_Off
POWER_RAM_POWER_S0RETENTION_On
POWER_RAM_POWER_S0RETENTION_Pos
POWER_RAM_POWER_S10POWER_Msk
POWER_RAM_POWER_S10POWER_Off
POWER_RAM_POWER_S10POWER_On
POWER_RAM_POWER_S10POWER_Pos
POWER_RAM_POWER_S10RETENTION_Msk
POWER_RAM_POWER_S10RETENTION_Off
POWER_RAM_POWER_S10RETENTION_On
POWER_RAM_POWER_S10RETENTION_Pos
POWER_RAM_POWER_S11POWER_Msk
POWER_RAM_POWER_S11POWER_Off
POWER_RAM_POWER_S11POWER_On
POWER_RAM_POWER_S11POWER_Pos
POWER_RAM_POWER_S11RETENTION_Msk
POWER_RAM_POWER_S11RETENTION_Off
POWER_RAM_POWER_S11RETENTION_On
POWER_RAM_POWER_S11RETENTION_Pos
POWER_RAM_POWER_S12POWER_Msk
POWER_RAM_POWER_S12POWER_Off
POWER_RAM_POWER_S12POWER_On
POWER_RAM_POWER_S12POWER_Pos
POWER_RAM_POWER_S12RETENTION_Msk
POWER_RAM_POWER_S12RETENTION_Off
POWER_RAM_POWER_S12RETENTION_On
POWER_RAM_POWER_S12RETENTION_Pos
POWER_RAM_POWER_S13POWER_Msk
POWER_RAM_POWER_S13POWER_Off
POWER_RAM_POWER_S13POWER_On
POWER_RAM_POWER_S13POWER_Pos
POWER_RAM_POWER_S13RETENTION_Msk
POWER_RAM_POWER_S13RETENTION_Off
POWER_RAM_POWER_S13RETENTION_On
POWER_RAM_POWER_S13RETENTION_Pos
POWER_RAM_POWER_S14POWER_Msk
POWER_RAM_POWER_S14POWER_Off
POWER_RAM_POWER_S14POWER_On
POWER_RAM_POWER_S14POWER_Pos
POWER_RAM_POWER_S14RETENTION_Msk
POWER_RAM_POWER_S14RETENTION_Off
POWER_RAM_POWER_S14RETENTION_On
POWER_RAM_POWER_S14RETENTION_Pos
POWER_RAM_POWER_S15POWER_Msk
POWER_RAM_POWER_S15POWER_Off
POWER_RAM_POWER_S15POWER_On
POWER_RAM_POWER_S15POWER_Pos
POWER_RAM_POWER_S15RETENTION_Msk
POWER_RAM_POWER_S15RETENTION_Off
POWER_RAM_POWER_S15RETENTION_On
POWER_RAM_POWER_S15RETENTION_Pos
POWER_RAM_POWER_S1POWER_Msk
POWER_RAM_POWER_S1POWER_Off
POWER_RAM_POWER_S1POWER_On
POWER_RAM_POWER_S1POWER_Pos
POWER_RAM_POWER_S1RETENTION_Msk
POWER_RAM_POWER_S1RETENTION_Off
POWER_RAM_POWER_S1RETENTION_On
POWER_RAM_POWER_S1RETENTION_Pos
POWER_RAM_POWER_S2POWER_Msk
POWER_RAM_POWER_S2POWER_Off
POWER_RAM_POWER_S2POWER_On
POWER_RAM_POWER_S2POWER_Pos
POWER_RAM_POWER_S2RETENTION_Msk
POWER_RAM_POWER_S2RETENTION_Off
POWER_RAM_POWER_S2RETENTION_On
POWER_RAM_POWER_S2RETENTION_Pos
POWER_RAM_POWER_S3POWER_Msk
POWER_RAM_POWER_S3POWER_Off
POWER_RAM_POWER_S3POWER_On
POWER_RAM_POWER_S3POWER_Pos
POWER_RAM_POWER_S3RETENTION_Msk
POWER_RAM_POWER_S3RETENTION_Off
POWER_RAM_POWER_S3RETENTION_On
POWER_RAM_POWER_S3RETENTION_Pos
POWER_RAM_POWER_S4POWER_Msk
POWER_RAM_POWER_S4POWER_Off
POWER_RAM_POWER_S4POWER_On
POWER_RAM_POWER_S4POWER_Pos
POWER_RAM_POWER_S4RETENTION_Msk
POWER_RAM_POWER_S4RETENTION_Off
POWER_RAM_POWER_S4RETENTION_On
POWER_RAM_POWER_S4RETENTION_Pos
POWER_RAM_POWER_S5POWER_Msk
POWER_RAM_POWER_S5POWER_Off
POWER_RAM_POWER_S5POWER_On
POWER_RAM_POWER_S5POWER_Pos
POWER_RAM_POWER_S5RETENTION_Msk
POWER_RAM_POWER_S5RETENTION_Off
POWER_RAM_POWER_S5RETENTION_On
POWER_RAM_POWER_S5RETENTION_Pos
POWER_RAM_POWER_S6POWER_Msk
POWER_RAM_POWER_S6POWER_Off
POWER_RAM_POWER_S6POWER_On
POWER_RAM_POWER_S6POWER_Pos
POWER_RAM_POWER_S6RETENTION_Msk
POWER_RAM_POWER_S6RETENTION_Off
POWER_RAM_POWER_S6RETENTION_On
POWER_RAM_POWER_S6RETENTION_Pos
POWER_RAM_POWER_S7POWER_Msk
POWER_RAM_POWER_S7POWER_Off
POWER_RAM_POWER_S7POWER_On
POWER_RAM_POWER_S7POWER_Pos
POWER_RAM_POWER_S7RETENTION_Msk
POWER_RAM_POWER_S7RETENTION_Off
POWER_RAM_POWER_S7RETENTION_On
POWER_RAM_POWER_S7RETENTION_Pos
POWER_RAM_POWER_S8POWER_Msk
POWER_RAM_POWER_S8POWER_Off
POWER_RAM_POWER_S8POWER_On
POWER_RAM_POWER_S8POWER_Pos
POWER_RAM_POWER_S8RETENTION_Msk
POWER_RAM_POWER_S8RETENTION_Off
POWER_RAM_POWER_S8RETENTION_On
POWER_RAM_POWER_S8RETENTION_Pos
POWER_RAM_POWER_S9POWER_Msk
POWER_RAM_POWER_S9POWER_Off
POWER_RAM_POWER_S9POWER_On
POWER_RAM_POWER_S9POWER_Pos
POWER_RAM_POWER_S9RETENTION_Msk
POWER_RAM_POWER_S9RETENTION_Off
POWER_RAM_POWER_S9RETENTION_On
POWER_RAM_POWER_S9RETENTION_Pos
POWER_RESETREAS_DIF_Detected
POWER_RESETREAS_DIF_Msk
POWER_RESETREAS_DIF_NotDetected
POWER_RESETREAS_DIF_Pos
POWER_RESETREAS_DOG_Detected
POWER_RESETREAS_DOG_Msk
POWER_RESETREAS_DOG_NotDetected
POWER_RESETREAS_DOG_Pos
POWER_RESETREAS_LOCKUP_Detected
POWER_RESETREAS_LOCKUP_Msk
POWER_RESETREAS_LOCKUP_NotDetected
POWER_RESETREAS_LOCKUP_Pos
POWER_RESETREAS_LPCOMP_Detected
POWER_RESETREAS_LPCOMP_Msk
POWER_RESETREAS_LPCOMP_NotDetected
POWER_RESETREAS_LPCOMP_Pos
POWER_RESETREAS_NFC_Detected
POWER_RESETREAS_NFC_Msk
POWER_RESETREAS_NFC_NotDetected
POWER_RESETREAS_NFC_Pos
POWER_RESETREAS_OFF_Detected
POWER_RESETREAS_OFF_Msk
POWER_RESETREAS_OFF_NotDetected
POWER_RESETREAS_OFF_Pos
POWER_RESETREAS_RESETPIN_Detected
POWER_RESETREAS_RESETPIN_Msk
POWER_RESETREAS_RESETPIN_NotDetected
POWER_RESETREAS_RESETPIN_Pos
POWER_RESETREAS_SREQ_Detected
POWER_RESETREAS_SREQ_Msk
POWER_RESETREAS_SREQ_NotDetected
POWER_RESETREAS_SREQ_Pos
POWER_RESETREAS_VBUS_Detected
POWER_RESETREAS_VBUS_Msk
POWER_RESETREAS_VBUS_NotDetected
POWER_RESETREAS_VBUS_Pos
POWER_SYSTEMOFF_SYSTEMOFF_Enter
POWER_SYSTEMOFF_SYSTEMOFF_Msk
POWER_SYSTEMOFF_SYSTEMOFF_Pos
POWER_TASKS_CONSTLAT_TASKS_CONSTLAT_Msk
POWER_TASKS_CONSTLAT_TASKS_CONSTLAT_Pos
POWER_TASKS_CONSTLAT_TASKS_CONSTLAT_Trigger
POWER_TASKS_LOWPWR_TASKS_LOWPWR_Msk
POWER_TASKS_LOWPWR_TASKS_LOWPWR_Pos
POWER_TASKS_LOWPWR_TASKS_LOWPWR_Trigger
POWER_USBREGSTATUS_OUTPUTRDY_Msk
POWER_USBREGSTATUS_OUTPUTRDY_NotReady
POWER_USBREGSTATUS_OUTPUTRDY_Pos
POWER_USBREGSTATUS_OUTPUTRDY_Ready
POWER_USBREGSTATUS_VBUSDETECT_Msk
POWER_USBREGSTATUS_VBUSDETECT_NoVbus
POWER_USBREGSTATUS_VBUSDETECT_Pos
POWER_USBREGSTATUS_VBUSDETECT_VbusPresent
PPI_CHENCLR_CH0_Clear
PPI_CHENCLR_CH0_Disabled
PPI_CHENCLR_CH0_Enabled
PPI_CHENCLR_CH0_Msk
PPI_CHENCLR_CH0_Pos
PPI_CHENCLR_CH10_Clear
PPI_CHENCLR_CH10_Disabled
PPI_CHENCLR_CH10_Enabled
PPI_CHENCLR_CH10_Msk
PPI_CHENCLR_CH10_Pos
PPI_CHENCLR_CH11_Clear
PPI_CHENCLR_CH11_Disabled
PPI_CHENCLR_CH11_Enabled
PPI_CHENCLR_CH11_Msk
PPI_CHENCLR_CH11_Pos
PPI_CHENCLR_CH12_Clear
PPI_CHENCLR_CH12_Disabled
PPI_CHENCLR_CH12_Enabled
PPI_CHENCLR_CH12_Msk
PPI_CHENCLR_CH12_Pos
PPI_CHENCLR_CH13_Clear
PPI_CHENCLR_CH13_Disabled
PPI_CHENCLR_CH13_Enabled
PPI_CHENCLR_CH13_Msk
PPI_CHENCLR_CH13_Pos
PPI_CHENCLR_CH14_Clear
PPI_CHENCLR_CH14_Disabled
PPI_CHENCLR_CH14_Enabled
PPI_CHENCLR_CH14_Msk
PPI_CHENCLR_CH14_Pos
PPI_CHENCLR_CH15_Clear
PPI_CHENCLR_CH15_Disabled
PPI_CHENCLR_CH15_Enabled
PPI_CHENCLR_CH15_Msk
PPI_CHENCLR_CH15_Pos
PPI_CHENCLR_CH16_Clear
PPI_CHENCLR_CH16_Disabled
PPI_CHENCLR_CH16_Enabled
PPI_CHENCLR_CH16_Msk
PPI_CHENCLR_CH16_Pos
PPI_CHENCLR_CH17_Clear
PPI_CHENCLR_CH17_Disabled
PPI_CHENCLR_CH17_Enabled
PPI_CHENCLR_CH17_Msk
PPI_CHENCLR_CH17_Pos
PPI_CHENCLR_CH18_Clear
PPI_CHENCLR_CH18_Disabled
PPI_CHENCLR_CH18_Enabled
PPI_CHENCLR_CH18_Msk
PPI_CHENCLR_CH18_Pos
PPI_CHENCLR_CH19_Clear
PPI_CHENCLR_CH19_Disabled
PPI_CHENCLR_CH19_Enabled
PPI_CHENCLR_CH19_Msk
PPI_CHENCLR_CH19_Pos
PPI_CHENCLR_CH1_Clear
PPI_CHENCLR_CH1_Disabled
PPI_CHENCLR_CH1_Enabled
PPI_CHENCLR_CH1_Msk
PPI_CHENCLR_CH1_Pos
PPI_CHENCLR_CH20_Clear
PPI_CHENCLR_CH20_Disabled
PPI_CHENCLR_CH20_Enabled
PPI_CHENCLR_CH20_Msk
PPI_CHENCLR_CH20_Pos
PPI_CHENCLR_CH21_Clear
PPI_CHENCLR_CH21_Disabled
PPI_CHENCLR_CH21_Enabled
PPI_CHENCLR_CH21_Msk
PPI_CHENCLR_CH21_Pos
PPI_CHENCLR_CH22_Clear
PPI_CHENCLR_CH22_Disabled
PPI_CHENCLR_CH22_Enabled
PPI_CHENCLR_CH22_Msk
PPI_CHENCLR_CH22_Pos
PPI_CHENCLR_CH23_Clear
PPI_CHENCLR_CH23_Disabled
PPI_CHENCLR_CH23_Enabled
PPI_CHENCLR_CH23_Msk
PPI_CHENCLR_CH23_Pos
PPI_CHENCLR_CH24_Clear
PPI_CHENCLR_CH24_Disabled
PPI_CHENCLR_CH24_Enabled
PPI_CHENCLR_CH24_Msk
PPI_CHENCLR_CH24_Pos
PPI_CHENCLR_CH25_Clear
PPI_CHENCLR_CH25_Disabled
PPI_CHENCLR_CH25_Enabled
PPI_CHENCLR_CH25_Msk
PPI_CHENCLR_CH25_Pos
PPI_CHENCLR_CH26_Clear
PPI_CHENCLR_CH26_Disabled
PPI_CHENCLR_CH26_Enabled
PPI_CHENCLR_CH26_Msk
PPI_CHENCLR_CH26_Pos
PPI_CHENCLR_CH27_Clear
PPI_CHENCLR_CH27_Disabled
PPI_CHENCLR_CH27_Enabled
PPI_CHENCLR_CH27_Msk
PPI_CHENCLR_CH27_Pos
PPI_CHENCLR_CH28_Clear
PPI_CHENCLR_CH28_Disabled
PPI_CHENCLR_CH28_Enabled
PPI_CHENCLR_CH28_Msk
PPI_CHENCLR_CH28_Pos
PPI_CHENCLR_CH29_Clear
PPI_CHENCLR_CH29_Disabled
PPI_CHENCLR_CH29_Enabled
PPI_CHENCLR_CH29_Msk
PPI_CHENCLR_CH29_Pos
PPI_CHENCLR_CH2_Clear
PPI_CHENCLR_CH2_Disabled
PPI_CHENCLR_CH2_Enabled
PPI_CHENCLR_CH2_Msk
PPI_CHENCLR_CH2_Pos
PPI_CHENCLR_CH30_Clear
PPI_CHENCLR_CH30_Disabled
PPI_CHENCLR_CH30_Enabled
PPI_CHENCLR_CH30_Msk
PPI_CHENCLR_CH30_Pos
PPI_CHENCLR_CH31_Clear
PPI_CHENCLR_CH31_Disabled
PPI_CHENCLR_CH31_Enabled
PPI_CHENCLR_CH31_Msk
PPI_CHENCLR_CH31_Pos
PPI_CHENCLR_CH3_Clear
PPI_CHENCLR_CH3_Disabled
PPI_CHENCLR_CH3_Enabled
PPI_CHENCLR_CH3_Msk
PPI_CHENCLR_CH3_Pos
PPI_CHENCLR_CH4_Clear
PPI_CHENCLR_CH4_Disabled
PPI_CHENCLR_CH4_Enabled
PPI_CHENCLR_CH4_Msk
PPI_CHENCLR_CH4_Pos
PPI_CHENCLR_CH5_Clear
PPI_CHENCLR_CH5_Disabled
PPI_CHENCLR_CH5_Enabled
PPI_CHENCLR_CH5_Msk
PPI_CHENCLR_CH5_Pos
PPI_CHENCLR_CH6_Clear
PPI_CHENCLR_CH6_Disabled
PPI_CHENCLR_CH6_Enabled
PPI_CHENCLR_CH6_Msk
PPI_CHENCLR_CH6_Pos
PPI_CHENCLR_CH7_Clear
PPI_CHENCLR_CH7_Disabled
PPI_CHENCLR_CH7_Enabled
PPI_CHENCLR_CH7_Msk
PPI_CHENCLR_CH7_Pos
PPI_CHENCLR_CH8_Clear
PPI_CHENCLR_CH8_Disabled
PPI_CHENCLR_CH8_Enabled
PPI_CHENCLR_CH8_Msk
PPI_CHENCLR_CH8_Pos
PPI_CHENCLR_CH9_Clear
PPI_CHENCLR_CH9_Disabled
PPI_CHENCLR_CH9_Enabled
PPI_CHENCLR_CH9_Msk
PPI_CHENCLR_CH9_Pos
PPI_CHENSET_CH0_Disabled
PPI_CHENSET_CH0_Enabled
PPI_CHENSET_CH0_Msk
PPI_CHENSET_CH0_Pos
PPI_CHENSET_CH0_Set
PPI_CHENSET_CH10_Disabled
PPI_CHENSET_CH10_Enabled
PPI_CHENSET_CH10_Msk
PPI_CHENSET_CH10_Pos
PPI_CHENSET_CH10_Set
PPI_CHENSET_CH11_Disabled
PPI_CHENSET_CH11_Enabled
PPI_CHENSET_CH11_Msk
PPI_CHENSET_CH11_Pos
PPI_CHENSET_CH11_Set
PPI_CHENSET_CH12_Disabled
PPI_CHENSET_CH12_Enabled
PPI_CHENSET_CH12_Msk
PPI_CHENSET_CH12_Pos
PPI_CHENSET_CH12_Set
PPI_CHENSET_CH13_Disabled
PPI_CHENSET_CH13_Enabled
PPI_CHENSET_CH13_Msk
PPI_CHENSET_CH13_Pos
PPI_CHENSET_CH13_Set
PPI_CHENSET_CH14_Disabled
PPI_CHENSET_CH14_Enabled
PPI_CHENSET_CH14_Msk
PPI_CHENSET_CH14_Pos
PPI_CHENSET_CH14_Set
PPI_CHENSET_CH15_Disabled
PPI_CHENSET_CH15_Enabled
PPI_CHENSET_CH15_Msk
PPI_CHENSET_CH15_Pos
PPI_CHENSET_CH15_Set
PPI_CHENSET_CH16_Disabled
PPI_CHENSET_CH16_Enabled
PPI_CHENSET_CH16_Msk
PPI_CHENSET_CH16_Pos
PPI_CHENSET_CH16_Set
PPI_CHENSET_CH17_Disabled
PPI_CHENSET_CH17_Enabled
PPI_CHENSET_CH17_Msk
PPI_CHENSET_CH17_Pos
PPI_CHENSET_CH17_Set
PPI_CHENSET_CH18_Disabled
PPI_CHENSET_CH18_Enabled
PPI_CHENSET_CH18_Msk
PPI_CHENSET_CH18_Pos
PPI_CHENSET_CH18_Set
PPI_CHENSET_CH19_Disabled
PPI_CHENSET_CH19_Enabled
PPI_CHENSET_CH19_Msk
PPI_CHENSET_CH19_Pos
PPI_CHENSET_CH19_Set
PPI_CHENSET_CH1_Disabled
PPI_CHENSET_CH1_Enabled
PPI_CHENSET_CH1_Msk
PPI_CHENSET_CH1_Pos
PPI_CHENSET_CH1_Set
PPI_CHENSET_CH20_Disabled
PPI_CHENSET_CH20_Enabled
PPI_CHENSET_CH20_Msk
PPI_CHENSET_CH20_Pos
PPI_CHENSET_CH20_Set
PPI_CHENSET_CH21_Disabled
PPI_CHENSET_CH21_Enabled
PPI_CHENSET_CH21_Msk
PPI_CHENSET_CH21_Pos
PPI_CHENSET_CH21_Set
PPI_CHENSET_CH22_Disabled
PPI_CHENSET_CH22_Enabled
PPI_CHENSET_CH22_Msk
PPI_CHENSET_CH22_Pos
PPI_CHENSET_CH22_Set
PPI_CHENSET_CH23_Disabled
PPI_CHENSET_CH23_Enabled
PPI_CHENSET_CH23_Msk
PPI_CHENSET_CH23_Pos
PPI_CHENSET_CH23_Set
PPI_CHENSET_CH24_Disabled
PPI_CHENSET_CH24_Enabled
PPI_CHENSET_CH24_Msk
PPI_CHENSET_CH24_Pos
PPI_CHENSET_CH24_Set
PPI_CHENSET_CH25_Disabled
PPI_CHENSET_CH25_Enabled
PPI_CHENSET_CH25_Msk
PPI_CHENSET_CH25_Pos
PPI_CHENSET_CH25_Set
PPI_CHENSET_CH26_Disabled
PPI_CHENSET_CH26_Enabled
PPI_CHENSET_CH26_Msk
PPI_CHENSET_CH26_Pos
PPI_CHENSET_CH26_Set
PPI_CHENSET_CH27_Disabled
PPI_CHENSET_CH27_Enabled
PPI_CHENSET_CH27_Msk
PPI_CHENSET_CH27_Pos
PPI_CHENSET_CH27_Set
PPI_CHENSET_CH28_Disabled
PPI_CHENSET_CH28_Enabled
PPI_CHENSET_CH28_Msk
PPI_CHENSET_CH28_Pos
PPI_CHENSET_CH28_Set
PPI_CHENSET_CH29_Disabled
PPI_CHENSET_CH29_Enabled
PPI_CHENSET_CH29_Msk
PPI_CHENSET_CH29_Pos
PPI_CHENSET_CH29_Set
PPI_CHENSET_CH2_Disabled
PPI_CHENSET_CH2_Enabled
PPI_CHENSET_CH2_Msk
PPI_CHENSET_CH2_Pos
PPI_CHENSET_CH2_Set
PPI_CHENSET_CH30_Disabled
PPI_CHENSET_CH30_Enabled
PPI_CHENSET_CH30_Msk
PPI_CHENSET_CH30_Pos
PPI_CHENSET_CH30_Set
PPI_CHENSET_CH31_Disabled
PPI_CHENSET_CH31_Enabled
PPI_CHENSET_CH31_Msk
PPI_CHENSET_CH31_Pos
PPI_CHENSET_CH31_Set
PPI_CHENSET_CH3_Disabled
PPI_CHENSET_CH3_Enabled
PPI_CHENSET_CH3_Msk
PPI_CHENSET_CH3_Pos
PPI_CHENSET_CH3_Set
PPI_CHENSET_CH4_Disabled
PPI_CHENSET_CH4_Enabled
PPI_CHENSET_CH4_Msk
PPI_CHENSET_CH4_Pos
PPI_CHENSET_CH4_Set
PPI_CHENSET_CH5_Disabled
PPI_CHENSET_CH5_Enabled
PPI_CHENSET_CH5_Msk
PPI_CHENSET_CH5_Pos
PPI_CHENSET_CH5_Set
PPI_CHENSET_CH6_Disabled
PPI_CHENSET_CH6_Enabled
PPI_CHENSET_CH6_Msk
PPI_CHENSET_CH6_Pos
PPI_CHENSET_CH6_Set
PPI_CHENSET_CH7_Disabled
PPI_CHENSET_CH7_Enabled
PPI_CHENSET_CH7_Msk
PPI_CHENSET_CH7_Pos
PPI_CHENSET_CH7_Set
PPI_CHENSET_CH8_Disabled
PPI_CHENSET_CH8_Enabled
PPI_CHENSET_CH8_Msk
PPI_CHENSET_CH8_Pos
PPI_CHENSET_CH8_Set
PPI_CHENSET_CH9_Disabled
PPI_CHENSET_CH9_Enabled
PPI_CHENSET_CH9_Msk
PPI_CHENSET_CH9_Pos
PPI_CHENSET_CH9_Set
PPI_CHEN_CH0_Disabled
PPI_CHEN_CH0_Enabled
PPI_CHEN_CH0_Msk
PPI_CHEN_CH0_Pos
PPI_CHEN_CH10_Disabled
PPI_CHEN_CH10_Enabled
PPI_CHEN_CH10_Msk
PPI_CHEN_CH10_Pos
PPI_CHEN_CH11_Disabled
PPI_CHEN_CH11_Enabled
PPI_CHEN_CH11_Msk
PPI_CHEN_CH11_Pos
PPI_CHEN_CH12_Disabled
PPI_CHEN_CH12_Enabled
PPI_CHEN_CH12_Msk
PPI_CHEN_CH12_Pos
PPI_CHEN_CH13_Disabled
PPI_CHEN_CH13_Enabled
PPI_CHEN_CH13_Msk
PPI_CHEN_CH13_Pos
PPI_CHEN_CH14_Disabled
PPI_CHEN_CH14_Enabled
PPI_CHEN_CH14_Msk
PPI_CHEN_CH14_Pos
PPI_CHEN_CH15_Disabled
PPI_CHEN_CH15_Enabled
PPI_CHEN_CH15_Msk
PPI_CHEN_CH15_Pos
PPI_CHEN_CH16_Disabled
PPI_CHEN_CH16_Enabled
PPI_CHEN_CH16_Msk
PPI_CHEN_CH16_Pos
PPI_CHEN_CH17_Disabled
PPI_CHEN_CH17_Enabled
PPI_CHEN_CH17_Msk
PPI_CHEN_CH17_Pos
PPI_CHEN_CH18_Disabled
PPI_CHEN_CH18_Enabled
PPI_CHEN_CH18_Msk
PPI_CHEN_CH18_Pos
PPI_CHEN_CH19_Disabled
PPI_CHEN_CH19_Enabled
PPI_CHEN_CH19_Msk
PPI_CHEN_CH19_Pos
PPI_CHEN_CH1_Disabled
PPI_CHEN_CH1_Enabled
PPI_CHEN_CH1_Msk
PPI_CHEN_CH1_Pos
PPI_CHEN_CH20_Disabled
PPI_CHEN_CH20_Enabled
PPI_CHEN_CH20_Msk
PPI_CHEN_CH20_Pos
PPI_CHEN_CH21_Disabled
PPI_CHEN_CH21_Enabled
PPI_CHEN_CH21_Msk
PPI_CHEN_CH21_Pos
PPI_CHEN_CH22_Disabled
PPI_CHEN_CH22_Enabled
PPI_CHEN_CH22_Msk
PPI_CHEN_CH22_Pos
PPI_CHEN_CH23_Disabled
PPI_CHEN_CH23_Enabled
PPI_CHEN_CH23_Msk
PPI_CHEN_CH23_Pos
PPI_CHEN_CH24_Disabled
PPI_CHEN_CH24_Enabled
PPI_CHEN_CH24_Msk
PPI_CHEN_CH24_Pos
PPI_CHEN_CH25_Disabled
PPI_CHEN_CH25_Enabled
PPI_CHEN_CH25_Msk
PPI_CHEN_CH25_Pos
PPI_CHEN_CH26_Disabled
PPI_CHEN_CH26_Enabled
PPI_CHEN_CH26_Msk
PPI_CHEN_CH26_Pos
PPI_CHEN_CH27_Disabled
PPI_CHEN_CH27_Enabled
PPI_CHEN_CH27_Msk
PPI_CHEN_CH27_Pos
PPI_CHEN_CH28_Disabled
PPI_CHEN_CH28_Enabled
PPI_CHEN_CH28_Msk
PPI_CHEN_CH28_Pos
PPI_CHEN_CH29_Disabled
PPI_CHEN_CH29_Enabled
PPI_CHEN_CH29_Msk
PPI_CHEN_CH29_Pos
PPI_CHEN_CH2_Disabled
PPI_CHEN_CH2_Enabled
PPI_CHEN_CH2_Msk
PPI_CHEN_CH2_Pos
PPI_CHEN_CH30_Disabled
PPI_CHEN_CH30_Enabled
PPI_CHEN_CH30_Msk
PPI_CHEN_CH30_Pos
PPI_CHEN_CH31_Disabled
PPI_CHEN_CH31_Enabled
PPI_CHEN_CH31_Msk
PPI_CHEN_CH31_Pos
PPI_CHEN_CH3_Disabled
PPI_CHEN_CH3_Enabled
PPI_CHEN_CH3_Msk
PPI_CHEN_CH3_Pos
PPI_CHEN_CH4_Disabled
PPI_CHEN_CH4_Enabled
PPI_CHEN_CH4_Msk
PPI_CHEN_CH4_Pos
PPI_CHEN_CH5_Disabled
PPI_CHEN_CH5_Enabled
PPI_CHEN_CH5_Msk
PPI_CHEN_CH5_Pos
PPI_CHEN_CH6_Disabled
PPI_CHEN_CH6_Enabled
PPI_CHEN_CH6_Msk
PPI_CHEN_CH6_Pos
PPI_CHEN_CH7_Disabled
PPI_CHEN_CH7_Enabled
PPI_CHEN_CH7_Msk
PPI_CHEN_CH7_Pos
PPI_CHEN_CH8_Disabled
PPI_CHEN_CH8_Enabled
PPI_CHEN_CH8_Msk
PPI_CHEN_CH8_Pos
PPI_CHEN_CH9_Disabled
PPI_CHEN_CH9_Enabled
PPI_CHEN_CH9_Msk
PPI_CHEN_CH9_Pos
PPI_CHG_CH0_Excluded
PPI_CHG_CH0_Included
PPI_CHG_CH0_Msk
PPI_CHG_CH0_Pos
PPI_CHG_CH10_Excluded
PPI_CHG_CH10_Included
PPI_CHG_CH10_Msk
PPI_CHG_CH10_Pos
PPI_CHG_CH11_Excluded
PPI_CHG_CH11_Included
PPI_CHG_CH11_Msk
PPI_CHG_CH11_Pos
PPI_CHG_CH12_Excluded
PPI_CHG_CH12_Included
PPI_CHG_CH12_Msk
PPI_CHG_CH12_Pos
PPI_CHG_CH13_Excluded
PPI_CHG_CH13_Included
PPI_CHG_CH13_Msk
PPI_CHG_CH13_Pos
PPI_CHG_CH14_Excluded
PPI_CHG_CH14_Included
PPI_CHG_CH14_Msk
PPI_CHG_CH14_Pos
PPI_CHG_CH15_Excluded
PPI_CHG_CH15_Included
PPI_CHG_CH15_Msk
PPI_CHG_CH15_Pos
PPI_CHG_CH16_Excluded
PPI_CHG_CH16_Included
PPI_CHG_CH16_Msk
PPI_CHG_CH16_Pos
PPI_CHG_CH17_Excluded
PPI_CHG_CH17_Included
PPI_CHG_CH17_Msk
PPI_CHG_CH17_Pos
PPI_CHG_CH18_Excluded
PPI_CHG_CH18_Included
PPI_CHG_CH18_Msk
PPI_CHG_CH18_Pos
PPI_CHG_CH19_Excluded
PPI_CHG_CH19_Included
PPI_CHG_CH19_Msk
PPI_CHG_CH19_Pos
PPI_CHG_CH1_Excluded
PPI_CHG_CH1_Included
PPI_CHG_CH1_Msk
PPI_CHG_CH1_Pos
PPI_CHG_CH20_Excluded
PPI_CHG_CH20_Included
PPI_CHG_CH20_Msk
PPI_CHG_CH20_Pos
PPI_CHG_CH21_Excluded
PPI_CHG_CH21_Included
PPI_CHG_CH21_Msk
PPI_CHG_CH21_Pos
PPI_CHG_CH22_Excluded
PPI_CHG_CH22_Included
PPI_CHG_CH22_Msk
PPI_CHG_CH22_Pos
PPI_CHG_CH23_Excluded
PPI_CHG_CH23_Included
PPI_CHG_CH23_Msk
PPI_CHG_CH23_Pos
PPI_CHG_CH24_Excluded
PPI_CHG_CH24_Included
PPI_CHG_CH24_Msk
PPI_CHG_CH24_Pos
PPI_CHG_CH25_Excluded
PPI_CHG_CH25_Included
PPI_CHG_CH25_Msk
PPI_CHG_CH25_Pos
PPI_CHG_CH26_Excluded
PPI_CHG_CH26_Included
PPI_CHG_CH26_Msk
PPI_CHG_CH26_Pos
PPI_CHG_CH27_Excluded
PPI_CHG_CH27_Included
PPI_CHG_CH27_Msk
PPI_CHG_CH27_Pos
PPI_CHG_CH28_Excluded
PPI_CHG_CH28_Included
PPI_CHG_CH28_Msk
PPI_CHG_CH28_Pos
PPI_CHG_CH29_Excluded
PPI_CHG_CH29_Included
PPI_CHG_CH29_Msk
PPI_CHG_CH29_Pos
PPI_CHG_CH2_Excluded
PPI_CHG_CH2_Included
PPI_CHG_CH2_Msk
PPI_CHG_CH2_Pos
PPI_CHG_CH30_Excluded
PPI_CHG_CH30_Included
PPI_CHG_CH30_Msk
PPI_CHG_CH30_Pos
PPI_CHG_CH31_Excluded
PPI_CHG_CH31_Included
PPI_CHG_CH31_Msk
PPI_CHG_CH31_Pos
PPI_CHG_CH3_Excluded
PPI_CHG_CH3_Included
PPI_CHG_CH3_Msk
PPI_CHG_CH3_Pos
PPI_CHG_CH4_Excluded
PPI_CHG_CH4_Included
PPI_CHG_CH4_Msk
PPI_CHG_CH4_Pos
PPI_CHG_CH5_Excluded
PPI_CHG_CH5_Included
PPI_CHG_CH5_Msk
PPI_CHG_CH5_Pos
PPI_CHG_CH6_Excluded
PPI_CHG_CH6_Included
PPI_CHG_CH6_Msk
PPI_CHG_CH6_Pos
PPI_CHG_CH7_Excluded
PPI_CHG_CH7_Included
PPI_CHG_CH7_Msk
PPI_CHG_CH7_Pos
PPI_CHG_CH8_Excluded
PPI_CHG_CH8_Included
PPI_CHG_CH8_Msk
PPI_CHG_CH8_Pos
PPI_CHG_CH9_Excluded
PPI_CHG_CH9_Included
PPI_CHG_CH9_Msk
PPI_CHG_CH9_Pos
PPI_CH_EEP_EEP_Msk
PPI_CH_EEP_EEP_Pos
PPI_CH_NUM
PPI_CH_TEP_TEP_Msk
PPI_CH_TEP_TEP_Pos
PPI_COUNT
PPI_FIXED_CH_NUM
PPI_FORK_TEP_TEP_Msk
PPI_FORK_TEP_TEP_Pos
PPI_GROUP_NUM
PPI_TASKS_CHG_DIS_DIS_Msk
PPI_TASKS_CHG_DIS_DIS_Pos
PPI_TASKS_CHG_DIS_DIS_Trigger
PPI_TASKS_CHG_EN_EN_Msk
PPI_TASKS_CHG_EN_EN_Pos
PPI_TASKS_CHG_EN_EN_Trigger
PRIXSIZE
PRI_SIZE_T_MODIFIER
PRIdSIZE
PRIiSIZE
PRIoSIZE
PRIsflash
PRIuSIZE
PRIxSIZE
PRNG_FLOAT
PROTNUM_3PC
PROTNUM_ARGUS
PROTNUM_ARIS
PROTNUM_AX_25
PROTNUM_A_N
PROTNUM_BBN_RCC_MON
PROTNUM_BNA
PROTNUM_BR_SAT_MON
PROTNUM_CBT
PROTNUM_CFTP
PROTNUM_CHAOS
PROTNUM_COMPAQ_PEER
PROTNUM_CPHB
PROTNUM_CPNX
PROTNUM_CRTP
PROTNUM_CRUDP
PROTNUM_DCCP
PROTNUM_DCN_MEAS
PROTNUM_DDP
PROTNUM_DDX
PROTNUM_DGP
PROTNUM_DSR
PROTNUM_EGP
PROTNUM_EIGRP
PROTNUM_EMCON
PROTNUM_ENCAP
PROTNUM_ETHERIP
PROTNUM_FC
PROTNUM_FIRE
PROTNUM_GGP
PROTNUM_GMTP
PROTNUM_GRE
PROTNUM_HIP
PROTNUM_HMP
PROTNUM_IATP
PROTNUM_ICMP
PROTNUM_ICMPV6
PROTNUM_IDPR
PROTNUM_IDPR_CMTP
PROTNUM_IDRP
PROTNUM_IFMP
PROTNUM_IGMP
PROTNUM_IGP
PROTNUM_IL
PROTNUM_IPCOMP
PROTNUM_IPCV
PROTNUM_IPIP
PROTNUM_IPLT
PROTNUM_IPPC
PROTNUM_IPTM
PROTNUM_IPV4
PROTNUM_IPV6
PROTNUM_IPV6_EXT_AH
PROTNUM_IPV6_EXT_DST
PROTNUM_IPV6_EXT_ESP
PROTNUM_IPV6_EXT_FRAG
PROTNUM_IPV6_EXT_HOPOPT
PROTNUM_IPV6_EXT_MOB
PROTNUM_IPV6_EXT_RH
PROTNUM_IPV6_NONXT
PROTNUM_IPX_IN_IP
PROTNUM_IRTP
PROTNUM_ISIS_OVER_IPV4
PROTNUM_ISO_IP
PROTNUM_ISO_TP4
PROTNUM_I_NLSP
PROTNUM_KRYPTOLAN
PROTNUM_L2TP
PROTNUM_LARP
PROTNUM_LEAF_1
PROTNUM_LEAF_2
PROTNUM_MANET
PROTNUM_MERIT_INP
PROTNUM_MFE_NSP
PROTNUM_MICP
PROTNUM_MOBILE
PROTNUM_MPLS_IN_IP
PROTNUM_MTP
PROTNUM_MUX
PROTNUM_NARP
PROTNUM_NETBLT
PROTNUM_NSFNET_IGP
PROTNUM_NVP_II
PROTNUM_OSPFIGP
PROTNUM_PGM
PROTNUM_PIM
PROTNUM_PIPE
PROTNUM_PNNI
PROTNUM_PRM
PROTNUM_PTP
PROTNUM_PUP
PROTNUM_PVP
PROTNUM_QNX
PROTNUM_RDP
PROTNUM_RESERVED
PROTNUM_ROHC
PROTNUM_RSVP
PROTNUM_RSVP_E2E_IGNORE
PROTNUM_RVD
PROTNUM_SAT_EXPAK
PROTNUM_SAT_MON
PROTNUM_SCC_SP
PROTNUM_SCPS
PROTNUM_SCTP
PROTNUM_SDRP
PROTNUM_SECURE_VMTP
PROTNUM_SHIM6
PROTNUM_SKIP
PROTNUM_SM
PROTNUM_SMP
PROTNUM_SNP
PROTNUM_SPRITE_RPC
PROTNUM_SPS
PROTNUM_SRP
PROTNUM_SSCOPMCE
PROTNUM_ST
PROTNUM_STP
PROTNUM_SUN_ND
PROTNUM_SWIPE
PROTNUM_TCF
PROTNUM_TCP
PROTNUM_TLSP
PROTNUM_TPPLUSPLUS
PROTNUM_TRUNK_1
PROTNUM_TRUNK_2
PROTNUM_TTP
PROTNUM_UDP
PROTNUM_UDPLITE
PROTNUM_UTI
PROTNUM_VINES
PROTNUM_VISA
PROTNUM_VMTP
PROTNUM_VRRP
PROTNUM_WB_EXPAK
PROTNUM_WB_MON
PROTNUM_WESP
PROTNUM_WSN
PROTNUM_XNET
PROTNUM_XNS_IDP
PROTNUM_XTP
PWM0_CH_NUM
PWM0_EASYDMA_MAXCNT_SIZE
PWM1_CH_NUM
PWM1_EASYDMA_MAXCNT_SIZE
PWM2_CH_NUM
PWM2_EASYDMA_MAXCNT_SIZE
PWM3_CH_NUM
PWM3_EASYDMA_MAXCNT_SIZE
PWM_CHANNELS
PWM_COUNT
PWM_COUNTERTOP_COUNTERTOP_Msk
PWM_COUNTERTOP_COUNTERTOP_Pos
PWM_DECODER_LOAD_Common
PWM_DECODER_LOAD_Grouped
PWM_DECODER_LOAD_Individual
PWM_DECODER_LOAD_Msk
PWM_DECODER_LOAD_Pos
PWM_DECODER_LOAD_WaveForm
PWM_DECODER_MODE_Msk
PWM_DECODER_MODE_NextStep
PWM_DECODER_MODE_Pos
PWM_DECODER_MODE_RefreshCount
PWM_ENABLE_ENABLE_Disabled
PWM_ENABLE_ENABLE_Enabled
PWM_ENABLE_ENABLE_Msk
PWM_ENABLE_ENABLE_Pos
PWM_EVENTS_LOOPSDONE_EVENTS_LOOPSDONE_Generated
PWM_EVENTS_LOOPSDONE_EVENTS_LOOPSDONE_Msk
PWM_EVENTS_LOOPSDONE_EVENTS_LOOPSDONE_NotGenerated
PWM_EVENTS_LOOPSDONE_EVENTS_LOOPSDONE_Pos
PWM_EVENTS_PWMPERIODEND_EVENTS_PWMPERIODEND_Generated
PWM_EVENTS_PWMPERIODEND_EVENTS_PWMPERIODEND_Msk
PWM_EVENTS_PWMPERIODEND_EVENTS_PWMPERIODEND_NotGenerated
PWM_EVENTS_PWMPERIODEND_EVENTS_PWMPERIODEND_Pos
PWM_EVENTS_SEQEND_EVENTS_SEQEND_Generated
PWM_EVENTS_SEQEND_EVENTS_SEQEND_Msk
PWM_EVENTS_SEQEND_EVENTS_SEQEND_NotGenerated
PWM_EVENTS_SEQEND_EVENTS_SEQEND_Pos
PWM_EVENTS_SEQSTARTED_EVENTS_SEQSTARTED_Generated
PWM_EVENTS_SEQSTARTED_EVENTS_SEQSTARTED_Msk
PWM_EVENTS_SEQSTARTED_EVENTS_SEQSTARTED_NotGenerated
PWM_EVENTS_SEQSTARTED_EVENTS_SEQSTARTED_Pos
PWM_EVENTS_STOPPED_EVENTS_STOPPED_Generated
PWM_EVENTS_STOPPED_EVENTS_STOPPED_Msk
PWM_EVENTS_STOPPED_EVENTS_STOPPED_NotGenerated
PWM_EVENTS_STOPPED_EVENTS_STOPPED_Pos
PWM_INTENCLR_LOOPSDONE_Clear
PWM_INTENCLR_LOOPSDONE_Disabled
PWM_INTENCLR_LOOPSDONE_Enabled
PWM_INTENCLR_LOOPSDONE_Msk
PWM_INTENCLR_LOOPSDONE_Pos
PWM_INTENCLR_PWMPERIODEND_Clear
PWM_INTENCLR_PWMPERIODEND_Disabled
PWM_INTENCLR_PWMPERIODEND_Enabled
PWM_INTENCLR_PWMPERIODEND_Msk
PWM_INTENCLR_PWMPERIODEND_Pos
PWM_INTENCLR_SEQEND0_Clear
PWM_INTENCLR_SEQEND0_Disabled
PWM_INTENCLR_SEQEND0_Enabled
PWM_INTENCLR_SEQEND0_Msk
PWM_INTENCLR_SEQEND0_Pos
PWM_INTENCLR_SEQEND1_Clear
PWM_INTENCLR_SEQEND1_Disabled
PWM_INTENCLR_SEQEND1_Enabled
PWM_INTENCLR_SEQEND1_Msk
PWM_INTENCLR_SEQEND1_Pos
PWM_INTENCLR_SEQSTARTED0_Clear
PWM_INTENCLR_SEQSTARTED0_Disabled
PWM_INTENCLR_SEQSTARTED0_Enabled
PWM_INTENCLR_SEQSTARTED0_Msk
PWM_INTENCLR_SEQSTARTED0_Pos
PWM_INTENCLR_SEQSTARTED1_Clear
PWM_INTENCLR_SEQSTARTED1_Disabled
PWM_INTENCLR_SEQSTARTED1_Enabled
PWM_INTENCLR_SEQSTARTED1_Msk
PWM_INTENCLR_SEQSTARTED1_Pos
PWM_INTENCLR_STOPPED_Clear
PWM_INTENCLR_STOPPED_Disabled
PWM_INTENCLR_STOPPED_Enabled
PWM_INTENCLR_STOPPED_Msk
PWM_INTENCLR_STOPPED_Pos
PWM_INTENSET_LOOPSDONE_Disabled
PWM_INTENSET_LOOPSDONE_Enabled
PWM_INTENSET_LOOPSDONE_Msk
PWM_INTENSET_LOOPSDONE_Pos
PWM_INTENSET_LOOPSDONE_Set
PWM_INTENSET_PWMPERIODEND_Disabled
PWM_INTENSET_PWMPERIODEND_Enabled
PWM_INTENSET_PWMPERIODEND_Msk
PWM_INTENSET_PWMPERIODEND_Pos
PWM_INTENSET_PWMPERIODEND_Set
PWM_INTENSET_SEQEND0_Disabled
PWM_INTENSET_SEQEND0_Enabled
PWM_INTENSET_SEQEND0_Msk
PWM_INTENSET_SEQEND0_Pos
PWM_INTENSET_SEQEND0_Set
PWM_INTENSET_SEQEND1_Disabled
PWM_INTENSET_SEQEND1_Enabled
PWM_INTENSET_SEQEND1_Msk
PWM_INTENSET_SEQEND1_Pos
PWM_INTENSET_SEQEND1_Set
PWM_INTENSET_SEQSTARTED0_Disabled
PWM_INTENSET_SEQSTARTED0_Enabled
PWM_INTENSET_SEQSTARTED0_Msk
PWM_INTENSET_SEQSTARTED0_Pos
PWM_INTENSET_SEQSTARTED0_Set
PWM_INTENSET_SEQSTARTED1_Disabled
PWM_INTENSET_SEQSTARTED1_Enabled
PWM_INTENSET_SEQSTARTED1_Msk
PWM_INTENSET_SEQSTARTED1_Pos
PWM_INTENSET_SEQSTARTED1_Set
PWM_INTENSET_STOPPED_Disabled
PWM_INTENSET_STOPPED_Enabled
PWM_INTENSET_STOPPED_Msk
PWM_INTENSET_STOPPED_Pos
PWM_INTENSET_STOPPED_Set
PWM_INTEN_LOOPSDONE_Disabled
PWM_INTEN_LOOPSDONE_Enabled
PWM_INTEN_LOOPSDONE_Msk
PWM_INTEN_LOOPSDONE_Pos
PWM_INTEN_PWMPERIODEND_Disabled
PWM_INTEN_PWMPERIODEND_Enabled
PWM_INTEN_PWMPERIODEND_Msk
PWM_INTEN_PWMPERIODEND_Pos
PWM_INTEN_SEQEND0_Disabled
PWM_INTEN_SEQEND0_Enabled
PWM_INTEN_SEQEND0_Msk
PWM_INTEN_SEQEND0_Pos
PWM_INTEN_SEQEND1_Disabled
PWM_INTEN_SEQEND1_Enabled
PWM_INTEN_SEQEND1_Msk
PWM_INTEN_SEQEND1_Pos
PWM_INTEN_SEQSTARTED0_Disabled
PWM_INTEN_SEQSTARTED0_Enabled
PWM_INTEN_SEQSTARTED0_Msk
PWM_INTEN_SEQSTARTED0_Pos
PWM_INTEN_SEQSTARTED1_Disabled
PWM_INTEN_SEQSTARTED1_Enabled
PWM_INTEN_SEQSTARTED1_Msk
PWM_INTEN_SEQSTARTED1_Pos
PWM_INTEN_STOPPED_Disabled
PWM_INTEN_STOPPED_Enabled
PWM_INTEN_STOPPED_Msk
PWM_INTEN_STOPPED_Pos
PWM_LOOP_CNT_Disabled
PWM_LOOP_CNT_Msk
PWM_LOOP_CNT_Pos
PWM_MODE_UPDOWN_Msk
PWM_MODE_UPDOWN_Pos
PWM_MODE_UPDOWN_Up
PWM_MODE_UPDOWN_UpAndDown
PWM_PRESCALER_PRESCALER_DIV_1
PWM_PRESCALER_PRESCALER_DIV_128
PWM_PRESCALER_PRESCALER_DIV_16
PWM_PRESCALER_PRESCALER_DIV_2
PWM_PRESCALER_PRESCALER_DIV_32
PWM_PRESCALER_PRESCALER_DIV_4
PWM_PRESCALER_PRESCALER_DIV_64
PWM_PRESCALER_PRESCALER_DIV_8
PWM_PRESCALER_PRESCALER_Msk
PWM_PRESCALER_PRESCALER_Pos
PWM_PSEL_OUT_CONNECT_Connected
PWM_PSEL_OUT_CONNECT_Disconnected
PWM_PSEL_OUT_CONNECT_Msk
PWM_PSEL_OUT_CONNECT_Pos
PWM_PSEL_OUT_PIN_Msk
PWM_PSEL_OUT_PIN_Pos
PWM_PSEL_OUT_PORT_Msk
PWM_PSEL_OUT_PORT_Pos
PWM_SEQ_CNT_CNT_Disabled
PWM_SEQ_CNT_CNT_Msk
PWM_SEQ_CNT_CNT_Pos
PWM_SEQ_ENDDELAY_CNT_Msk
PWM_SEQ_ENDDELAY_CNT_Pos
PWM_SEQ_PTR_PTR_Msk
PWM_SEQ_PTR_PTR_Pos
PWM_SEQ_REFRESH_CNT_Continuous
PWM_SEQ_REFRESH_CNT_Msk
PWM_SEQ_REFRESH_CNT_Pos
PWM_SHORTS_LOOPSDONE_SEQSTART0_Disabled
PWM_SHORTS_LOOPSDONE_SEQSTART0_Enabled
PWM_SHORTS_LOOPSDONE_SEQSTART0_Msk
PWM_SHORTS_LOOPSDONE_SEQSTART0_Pos
PWM_SHORTS_LOOPSDONE_SEQSTART1_Disabled
PWM_SHORTS_LOOPSDONE_SEQSTART1_Enabled
PWM_SHORTS_LOOPSDONE_SEQSTART1_Msk
PWM_SHORTS_LOOPSDONE_SEQSTART1_Pos
PWM_SHORTS_LOOPSDONE_STOP_Disabled
PWM_SHORTS_LOOPSDONE_STOP_Enabled
PWM_SHORTS_LOOPSDONE_STOP_Msk
PWM_SHORTS_LOOPSDONE_STOP_Pos
PWM_SHORTS_SEQEND0_STOP_Disabled
PWM_SHORTS_SEQEND0_STOP_Enabled
PWM_SHORTS_SEQEND0_STOP_Msk
PWM_SHORTS_SEQEND0_STOP_Pos
PWM_SHORTS_SEQEND1_STOP_Disabled
PWM_SHORTS_SEQEND1_STOP_Enabled
PWM_SHORTS_SEQEND1_STOP_Msk
PWM_SHORTS_SEQEND1_STOP_Pos
PWM_TASKS_NEXTSTEP_TASKS_NEXTSTEP_Msk
PWM_TASKS_NEXTSTEP_TASKS_NEXTSTEP_Pos
PWM_TASKS_NEXTSTEP_TASKS_NEXTSTEP_Trigger
PWM_TASKS_SEQSTART_TASKS_SEQSTART_Msk
PWM_TASKS_SEQSTART_TASKS_SEQSTART_Pos
PWM_TASKS_SEQSTART_TASKS_SEQSTART_Trigger
PWM_TASKS_STOP_TASKS_STOP_Msk
PWM_TASKS_STOP_TASKS_STOP_Pos
PWM_TASKS_STOP_TASKS_STOP_Trigger
QDEC_ACCDBLREAD_ACCDBLREAD_Msk
QDEC_ACCDBLREAD_ACCDBLREAD_Pos
QDEC_ACCDBL_ACCDBL_Msk
QDEC_ACCDBL_ACCDBL_Pos
QDEC_ACCREAD_ACCREAD_Msk
QDEC_ACCREAD_ACCREAD_Pos
QDEC_ACC_ACC_Msk
QDEC_ACC_ACC_Pos
QDEC_COUNT
QDEC_DBFEN_DBFEN_Disabled
QDEC_DBFEN_DBFEN_Enabled
QDEC_DBFEN_DBFEN_Msk
QDEC_DBFEN_DBFEN_Pos
QDEC_ENABLE_ENABLE_Disabled
QDEC_ENABLE_ENABLE_Enabled
QDEC_ENABLE_ENABLE_Msk
QDEC_ENABLE_ENABLE_Pos
QDEC_EVENTS_ACCOF_EVENTS_ACCOF_Generated
QDEC_EVENTS_ACCOF_EVENTS_ACCOF_Msk
QDEC_EVENTS_ACCOF_EVENTS_ACCOF_NotGenerated
QDEC_EVENTS_ACCOF_EVENTS_ACCOF_Pos
QDEC_EVENTS_DBLRDY_EVENTS_DBLRDY_Generated
QDEC_EVENTS_DBLRDY_EVENTS_DBLRDY_Msk
QDEC_EVENTS_DBLRDY_EVENTS_DBLRDY_NotGenerated
QDEC_EVENTS_DBLRDY_EVENTS_DBLRDY_Pos
QDEC_EVENTS_REPORTRDY_EVENTS_REPORTRDY_Generated
QDEC_EVENTS_REPORTRDY_EVENTS_REPORTRDY_Msk
QDEC_EVENTS_REPORTRDY_EVENTS_REPORTRDY_NotGenerated
QDEC_EVENTS_REPORTRDY_EVENTS_REPORTRDY_Pos
QDEC_EVENTS_SAMPLERDY_EVENTS_SAMPLERDY_Generated
QDEC_EVENTS_SAMPLERDY_EVENTS_SAMPLERDY_Msk
QDEC_EVENTS_SAMPLERDY_EVENTS_SAMPLERDY_NotGenerated
QDEC_EVENTS_SAMPLERDY_EVENTS_SAMPLERDY_Pos
QDEC_EVENTS_STOPPED_EVENTS_STOPPED_Generated
QDEC_EVENTS_STOPPED_EVENTS_STOPPED_Msk
QDEC_EVENTS_STOPPED_EVENTS_STOPPED_NotGenerated
QDEC_EVENTS_STOPPED_EVENTS_STOPPED_Pos
QDEC_INTENCLR_ACCOF_Clear
QDEC_INTENCLR_ACCOF_Disabled
QDEC_INTENCLR_ACCOF_Enabled
QDEC_INTENCLR_ACCOF_Msk
QDEC_INTENCLR_ACCOF_Pos
QDEC_INTENCLR_DBLRDY_Clear
QDEC_INTENCLR_DBLRDY_Disabled
QDEC_INTENCLR_DBLRDY_Enabled
QDEC_INTENCLR_DBLRDY_Msk
QDEC_INTENCLR_DBLRDY_Pos
QDEC_INTENCLR_REPORTRDY_Clear
QDEC_INTENCLR_REPORTRDY_Disabled
QDEC_INTENCLR_REPORTRDY_Enabled
QDEC_INTENCLR_REPORTRDY_Msk
QDEC_INTENCLR_REPORTRDY_Pos
QDEC_INTENCLR_SAMPLERDY_Clear
QDEC_INTENCLR_SAMPLERDY_Disabled
QDEC_INTENCLR_SAMPLERDY_Enabled
QDEC_INTENCLR_SAMPLERDY_Msk
QDEC_INTENCLR_SAMPLERDY_Pos
QDEC_INTENCLR_STOPPED_Clear
QDEC_INTENCLR_STOPPED_Disabled
QDEC_INTENCLR_STOPPED_Enabled
QDEC_INTENCLR_STOPPED_Msk
QDEC_INTENCLR_STOPPED_Pos
QDEC_INTENSET_ACCOF_Disabled
QDEC_INTENSET_ACCOF_Enabled
QDEC_INTENSET_ACCOF_Msk
QDEC_INTENSET_ACCOF_Pos
QDEC_INTENSET_ACCOF_Set
QDEC_INTENSET_DBLRDY_Disabled
QDEC_INTENSET_DBLRDY_Enabled
QDEC_INTENSET_DBLRDY_Msk
QDEC_INTENSET_DBLRDY_Pos
QDEC_INTENSET_DBLRDY_Set
QDEC_INTENSET_REPORTRDY_Disabled
QDEC_INTENSET_REPORTRDY_Enabled
QDEC_INTENSET_REPORTRDY_Msk
QDEC_INTENSET_REPORTRDY_Pos
QDEC_INTENSET_REPORTRDY_Set
QDEC_INTENSET_SAMPLERDY_Disabled
QDEC_INTENSET_SAMPLERDY_Enabled
QDEC_INTENSET_SAMPLERDY_Msk
QDEC_INTENSET_SAMPLERDY_Pos
QDEC_INTENSET_SAMPLERDY_Set
QDEC_INTENSET_STOPPED_Disabled
QDEC_INTENSET_STOPPED_Enabled
QDEC_INTENSET_STOPPED_Msk
QDEC_INTENSET_STOPPED_Pos
QDEC_INTENSET_STOPPED_Set
QDEC_LEDPOL_LEDPOL_ActiveHigh
QDEC_LEDPOL_LEDPOL_ActiveLow
QDEC_LEDPOL_LEDPOL_Msk
QDEC_LEDPOL_LEDPOL_Pos
QDEC_LEDPRE_LEDPRE_Msk
QDEC_LEDPRE_LEDPRE_Pos
QDEC_PSEL_A_CONNECT_Connected
QDEC_PSEL_A_CONNECT_Disconnected
QDEC_PSEL_A_CONNECT_Msk
QDEC_PSEL_A_CONNECT_Pos
QDEC_PSEL_A_PIN_Msk
QDEC_PSEL_A_PIN_Pos
QDEC_PSEL_A_PORT_Msk
QDEC_PSEL_A_PORT_Pos
QDEC_PSEL_B_CONNECT_Connected
QDEC_PSEL_B_CONNECT_Disconnected
QDEC_PSEL_B_CONNECT_Msk
QDEC_PSEL_B_CONNECT_Pos
QDEC_PSEL_B_PIN_Msk
QDEC_PSEL_B_PIN_Pos
QDEC_PSEL_B_PORT_Msk
QDEC_PSEL_B_PORT_Pos
QDEC_PSEL_LED_CONNECT_Connected
QDEC_PSEL_LED_CONNECT_Disconnected
QDEC_PSEL_LED_CONNECT_Msk
QDEC_PSEL_LED_CONNECT_Pos
QDEC_PSEL_LED_PIN_Msk
QDEC_PSEL_LED_PIN_Pos
QDEC_PSEL_LED_PORT_Msk
QDEC_PSEL_LED_PORT_Pos
QDEC_REPORTPER_REPORTPER_10Smpl
QDEC_REPORTPER_REPORTPER_120Smpl
QDEC_REPORTPER_REPORTPER_160Smpl
QDEC_REPORTPER_REPORTPER_1Smpl
QDEC_REPORTPER_REPORTPER_200Smpl
QDEC_REPORTPER_REPORTPER_240Smpl
QDEC_REPORTPER_REPORTPER_280Smpl
QDEC_REPORTPER_REPORTPER_40Smpl
QDEC_REPORTPER_REPORTPER_80Smpl
QDEC_REPORTPER_REPORTPER_Msk
QDEC_REPORTPER_REPORTPER_Pos
QDEC_SAMPLEPER_SAMPLEPER_1024us
QDEC_SAMPLEPER_SAMPLEPER_128us
QDEC_SAMPLEPER_SAMPLEPER_131ms
QDEC_SAMPLEPER_SAMPLEPER_16384us
QDEC_SAMPLEPER_SAMPLEPER_2048us
QDEC_SAMPLEPER_SAMPLEPER_256us
QDEC_SAMPLEPER_SAMPLEPER_32ms
QDEC_SAMPLEPER_SAMPLEPER_4096us
QDEC_SAMPLEPER_SAMPLEPER_512us
QDEC_SAMPLEPER_SAMPLEPER_65ms
QDEC_SAMPLEPER_SAMPLEPER_8192us
QDEC_SAMPLEPER_SAMPLEPER_Msk
QDEC_SAMPLEPER_SAMPLEPER_Pos
QDEC_SAMPLE_SAMPLE_Msk
QDEC_SAMPLE_SAMPLE_Pos
QDEC_SHORTS_DBLRDY_RDCLRDBL_Disabled
QDEC_SHORTS_DBLRDY_RDCLRDBL_Enabled
QDEC_SHORTS_DBLRDY_RDCLRDBL_Msk
QDEC_SHORTS_DBLRDY_RDCLRDBL_Pos
QDEC_SHORTS_DBLRDY_STOP_Disabled
QDEC_SHORTS_DBLRDY_STOP_Enabled
QDEC_SHORTS_DBLRDY_STOP_Msk
QDEC_SHORTS_DBLRDY_STOP_Pos
QDEC_SHORTS_REPORTRDY_RDCLRACC_Disabled
QDEC_SHORTS_REPORTRDY_RDCLRACC_Enabled
QDEC_SHORTS_REPORTRDY_RDCLRACC_Msk
QDEC_SHORTS_REPORTRDY_RDCLRACC_Pos
QDEC_SHORTS_REPORTRDY_READCLRACC_Disabled
QDEC_SHORTS_REPORTRDY_READCLRACC_Enabled
QDEC_SHORTS_REPORTRDY_READCLRACC_Msk
QDEC_SHORTS_REPORTRDY_READCLRACC_Pos
QDEC_SHORTS_REPORTRDY_STOP_Disabled
QDEC_SHORTS_REPORTRDY_STOP_Enabled
QDEC_SHORTS_REPORTRDY_STOP_Msk
QDEC_SHORTS_REPORTRDY_STOP_Pos
QDEC_SHORTS_SAMPLERDY_READCLRACC_Disabled
QDEC_SHORTS_SAMPLERDY_READCLRACC_Enabled
QDEC_SHORTS_SAMPLERDY_READCLRACC_Msk
QDEC_SHORTS_SAMPLERDY_READCLRACC_Pos
QDEC_SHORTS_SAMPLERDY_STOP_Disabled
QDEC_SHORTS_SAMPLERDY_STOP_Enabled
QDEC_SHORTS_SAMPLERDY_STOP_Msk
QDEC_SHORTS_SAMPLERDY_STOP_Pos
QDEC_TASKS_RDCLRACC_TASKS_RDCLRACC_Msk
QDEC_TASKS_RDCLRACC_TASKS_RDCLRACC_Pos
QDEC_TASKS_RDCLRACC_TASKS_RDCLRACC_Trigger
QDEC_TASKS_RDCLRDBL_TASKS_RDCLRDBL_Msk
QDEC_TASKS_RDCLRDBL_TASKS_RDCLRDBL_Pos
QDEC_TASKS_RDCLRDBL_TASKS_RDCLRDBL_Trigger
QDEC_TASKS_READCLRACC_TASKS_READCLRACC_Msk
QDEC_TASKS_READCLRACC_TASKS_READCLRACC_Pos
QDEC_TASKS_READCLRACC_TASKS_READCLRACC_Trigger
QDEC_TASKS_START_TASKS_START_Msk
QDEC_TASKS_START_TASKS_START_Pos
QDEC_TASKS_START_TASKS_START_Trigger
QDEC_TASKS_STOP_TASKS_STOP_Msk
QDEC_TASKS_STOP_TASKS_STOP_Pos
QDEC_TASKS_STOP_TASKS_STOP_Trigger
QSPI_ADDRCONF_BYTE0_Msk
QSPI_ADDRCONF_BYTE0_Pos
QSPI_ADDRCONF_BYTE1_Msk
QSPI_ADDRCONF_BYTE1_Pos
QSPI_ADDRCONF_MODE_All
QSPI_ADDRCONF_MODE_Msk
QSPI_ADDRCONF_MODE_NoInstr
QSPI_ADDRCONF_MODE_OpByte0
QSPI_ADDRCONF_MODE_Opcode
QSPI_ADDRCONF_MODE_Pos
QSPI_ADDRCONF_OPCODE_Msk
QSPI_ADDRCONF_OPCODE_Pos
QSPI_ADDRCONF_WIPWAIT_Disable
QSPI_ADDRCONF_WIPWAIT_Enable
QSPI_ADDRCONF_WIPWAIT_Msk
QSPI_ADDRCONF_WIPWAIT_Pos
QSPI_ADDRCONF_WREN_Disable
QSPI_ADDRCONF_WREN_Enable
QSPI_ADDRCONF_WREN_Msk
QSPI_ADDRCONF_WREN_Pos
QSPI_CINSTRCONF_LENGTH_1B
QSPI_CINSTRCONF_LENGTH_2B
QSPI_CINSTRCONF_LENGTH_3B
QSPI_CINSTRCONF_LENGTH_4B
QSPI_CINSTRCONF_LENGTH_5B
QSPI_CINSTRCONF_LENGTH_6B
QSPI_CINSTRCONF_LENGTH_7B
QSPI_CINSTRCONF_LENGTH_8B
QSPI_CINSTRCONF_LENGTH_9B
QSPI_CINSTRCONF_LENGTH_Msk
QSPI_CINSTRCONF_LENGTH_Pos
QSPI_CINSTRCONF_LFEN_Disable
QSPI_CINSTRCONF_LFEN_Enable
QSPI_CINSTRCONF_LFEN_Msk
QSPI_CINSTRCONF_LFEN_Pos
QSPI_CINSTRCONF_LFSTOP_Msk
QSPI_CINSTRCONF_LFSTOP_Pos
QSPI_CINSTRCONF_LFSTOP_Stop
QSPI_CINSTRCONF_LIO2_Msk
QSPI_CINSTRCONF_LIO2_Pos
QSPI_CINSTRCONF_LIO3_Msk
QSPI_CINSTRCONF_LIO3_Pos
QSPI_CINSTRCONF_OPCODE_Msk
QSPI_CINSTRCONF_OPCODE_Pos
QSPI_CINSTRCONF_WIPWAIT_Disable
QSPI_CINSTRCONF_WIPWAIT_Enable
QSPI_CINSTRCONF_WIPWAIT_Msk
QSPI_CINSTRCONF_WIPWAIT_Pos
QSPI_CINSTRCONF_WREN_Disable
QSPI_CINSTRCONF_WREN_Enable
QSPI_CINSTRCONF_WREN_Msk
QSPI_CINSTRCONF_WREN_Pos
QSPI_CINSTRDAT0_BYTE0_Msk
QSPI_CINSTRDAT0_BYTE0_Pos
QSPI_CINSTRDAT0_BYTE1_Msk
QSPI_CINSTRDAT0_BYTE1_Pos
QSPI_CINSTRDAT0_BYTE2_Msk
QSPI_CINSTRDAT0_BYTE2_Pos
QSPI_CINSTRDAT0_BYTE3_Msk
QSPI_CINSTRDAT0_BYTE3_Pos
QSPI_CINSTRDAT1_BYTE4_Msk
QSPI_CINSTRDAT1_BYTE4_Pos
QSPI_CINSTRDAT1_BYTE5_Msk
QSPI_CINSTRDAT1_BYTE5_Pos
QSPI_CINSTRDAT1_BYTE6_Msk
QSPI_CINSTRDAT1_BYTE6_Pos
QSPI_CINSTRDAT1_BYTE7_Msk
QSPI_CINSTRDAT1_BYTE7_Pos
QSPI_COUNT
QSPI_DPMDUR_ENTER_Msk
QSPI_DPMDUR_ENTER_Pos
QSPI_DPMDUR_EXIT_Msk
QSPI_DPMDUR_EXIT_Pos
QSPI_EASYDMA_MAXCNT_SIZE
QSPI_ENABLE_ENABLE_Disabled
QSPI_ENABLE_ENABLE_Enabled
QSPI_ENABLE_ENABLE_Msk
QSPI_ENABLE_ENABLE_Pos
QSPI_ERASE_LEN_LEN_4KB
QSPI_ERASE_LEN_LEN_64KB
QSPI_ERASE_LEN_LEN_All
QSPI_ERASE_LEN_LEN_Msk
QSPI_ERASE_LEN_LEN_Pos
QSPI_ERASE_PTR_PTR_Msk
QSPI_ERASE_PTR_PTR_Pos
QSPI_EVENTS_READY_EVENTS_READY_Generated
QSPI_EVENTS_READY_EVENTS_READY_Msk
QSPI_EVENTS_READY_EVENTS_READY_NotGenerated
QSPI_EVENTS_READY_EVENTS_READY_Pos
QSPI_IFCONFIG0_ADDRMODE_24BIT
QSPI_IFCONFIG0_ADDRMODE_32BIT
QSPI_IFCONFIG0_ADDRMODE_Msk
QSPI_IFCONFIG0_ADDRMODE_Pos
QSPI_IFCONFIG0_DPMENABLE_Disable
QSPI_IFCONFIG0_DPMENABLE_Enable
QSPI_IFCONFIG0_DPMENABLE_Msk
QSPI_IFCONFIG0_DPMENABLE_Pos
QSPI_IFCONFIG0_PPSIZE_256Bytes
QSPI_IFCONFIG0_PPSIZE_512Bytes
QSPI_IFCONFIG0_PPSIZE_Msk
QSPI_IFCONFIG0_PPSIZE_Pos
QSPI_IFCONFIG0_READOC_FASTREAD
QSPI_IFCONFIG0_READOC_Msk
QSPI_IFCONFIG0_READOC_Pos
QSPI_IFCONFIG0_READOC_READ2IO
QSPI_IFCONFIG0_READOC_READ2O
QSPI_IFCONFIG0_READOC_READ4IO
QSPI_IFCONFIG0_READOC_READ4O
QSPI_IFCONFIG0_WRITEOC_Msk
QSPI_IFCONFIG0_WRITEOC_PP
QSPI_IFCONFIG0_WRITEOC_PP2O
QSPI_IFCONFIG0_WRITEOC_PP4IO
QSPI_IFCONFIG0_WRITEOC_PP4O
QSPI_IFCONFIG0_WRITEOC_Pos
QSPI_IFCONFIG1_DPMEN_Enter
QSPI_IFCONFIG1_DPMEN_Exit
QSPI_IFCONFIG1_DPMEN_Msk
QSPI_IFCONFIG1_DPMEN_Pos
QSPI_IFCONFIG1_SCKDELAY_Msk
QSPI_IFCONFIG1_SCKDELAY_Pos
QSPI_IFCONFIG1_SCKFREQ_Msk
QSPI_IFCONFIG1_SCKFREQ_Pos
QSPI_IFCONFIG1_SPIMODE_MODE0
QSPI_IFCONFIG1_SPIMODE_MODE3
QSPI_IFCONFIG1_SPIMODE_Msk
QSPI_IFCONFIG1_SPIMODE_Pos
QSPI_IFTIMING_RXDELAY_Msk
QSPI_IFTIMING_RXDELAY_Pos
QSPI_INTENCLR_READY_Clear
QSPI_INTENCLR_READY_Disabled
QSPI_INTENCLR_READY_Enabled
QSPI_INTENCLR_READY_Msk
QSPI_INTENCLR_READY_Pos
QSPI_INTENSET_READY_Disabled
QSPI_INTENSET_READY_Enabled
QSPI_INTENSET_READY_Msk
QSPI_INTENSET_READY_Pos
QSPI_INTENSET_READY_Set
QSPI_INTEN_READY_Disabled
QSPI_INTEN_READY_Enabled
QSPI_INTEN_READY_Msk
QSPI_INTEN_READY_Pos
QSPI_PSEL_CSN_CONNECT_Connected
QSPI_PSEL_CSN_CONNECT_Disconnected
QSPI_PSEL_CSN_CONNECT_Msk
QSPI_PSEL_CSN_CONNECT_Pos
QSPI_PSEL_CSN_PIN_Msk
QSPI_PSEL_CSN_PIN_Pos
QSPI_PSEL_CSN_PORT_Msk
QSPI_PSEL_CSN_PORT_Pos
QSPI_PSEL_IO0_CONNECT_Connected
QSPI_PSEL_IO0_CONNECT_Disconnected
QSPI_PSEL_IO0_CONNECT_Msk
QSPI_PSEL_IO0_CONNECT_Pos
QSPI_PSEL_IO0_PIN_Msk
QSPI_PSEL_IO0_PIN_Pos
QSPI_PSEL_IO0_PORT_Msk
QSPI_PSEL_IO0_PORT_Pos
QSPI_PSEL_IO1_CONNECT_Connected
QSPI_PSEL_IO1_CONNECT_Disconnected
QSPI_PSEL_IO1_CONNECT_Msk
QSPI_PSEL_IO1_CONNECT_Pos
QSPI_PSEL_IO1_PIN_Msk
QSPI_PSEL_IO1_PIN_Pos
QSPI_PSEL_IO1_PORT_Msk
QSPI_PSEL_IO1_PORT_Pos
QSPI_PSEL_IO2_CONNECT_Connected
QSPI_PSEL_IO2_CONNECT_Disconnected
QSPI_PSEL_IO2_CONNECT_Msk
QSPI_PSEL_IO2_CONNECT_Pos
QSPI_PSEL_IO2_PIN_Msk
QSPI_PSEL_IO2_PIN_Pos
QSPI_PSEL_IO2_PORT_Msk
QSPI_PSEL_IO2_PORT_Pos
QSPI_PSEL_IO3_CONNECT_Connected
QSPI_PSEL_IO3_CONNECT_Disconnected
QSPI_PSEL_IO3_CONNECT_Msk
QSPI_PSEL_IO3_CONNECT_Pos
QSPI_PSEL_IO3_PIN_Msk
QSPI_PSEL_IO3_PIN_Pos
QSPI_PSEL_IO3_PORT_Msk
QSPI_PSEL_IO3_PORT_Pos
QSPI_PSEL_SCK_CONNECT_Connected
QSPI_PSEL_SCK_CONNECT_Disconnected
QSPI_PSEL_SCK_CONNECT_Msk
QSPI_PSEL_SCK_CONNECT_Pos
QSPI_PSEL_SCK_PIN_Msk
QSPI_PSEL_SCK_PIN_Pos
QSPI_PSEL_SCK_PORT_Msk
QSPI_PSEL_SCK_PORT_Pos
QSPI_READ_CNT_CNT_Msk
QSPI_READ_CNT_CNT_Pos
QSPI_READ_DST_DST_Msk
QSPI_READ_DST_DST_Pos
QSPI_READ_SRC_SRC_Msk
QSPI_READ_SRC_SRC_Pos
QSPI_STATUS_DPM_Disabled
QSPI_STATUS_DPM_Enabled
QSPI_STATUS_DPM_Msk
QSPI_STATUS_DPM_Pos
QSPI_STATUS_READY_BUSY
QSPI_STATUS_READY_Msk
QSPI_STATUS_READY_Pos
QSPI_STATUS_READY_READY
QSPI_STATUS_SREG_Msk
QSPI_STATUS_SREG_Pos
QSPI_TASKS_ACTIVATE_TASKS_ACTIVATE_Msk
QSPI_TASKS_ACTIVATE_TASKS_ACTIVATE_Pos
QSPI_TASKS_ACTIVATE_TASKS_ACTIVATE_Trigger
QSPI_TASKS_DEACTIVATE_TASKS_DEACTIVATE_Msk
QSPI_TASKS_DEACTIVATE_TASKS_DEACTIVATE_Pos
QSPI_TASKS_DEACTIVATE_TASKS_DEACTIVATE_Trigger
QSPI_TASKS_ERASESTART_TASKS_ERASESTART_Msk
QSPI_TASKS_ERASESTART_TASKS_ERASESTART_Pos
QSPI_TASKS_ERASESTART_TASKS_ERASESTART_Trigger
QSPI_TASKS_READSTART_TASKS_READSTART_Msk
QSPI_TASKS_READSTART_TASKS_READSTART_Pos
QSPI_TASKS_READSTART_TASKS_READSTART_Trigger
QSPI_TASKS_WRITESTART_TASKS_WRITESTART_Msk
QSPI_TASKS_WRITESTART_TASKS_WRITESTART_Pos
QSPI_TASKS_WRITESTART_TASKS_WRITESTART_Trigger
QSPI_WRITE_CNT_CNT_Msk
QSPI_WRITE_CNT_CNT_Pos
QSPI_WRITE_DST_DST_Msk
QSPI_WRITE_DST_DST_Pos
QSPI_WRITE_SRC_SRC_Msk
QSPI_WRITE_SRC_SRC_Pos
QSPI_XIPOFFSET_XIPOFFSET_Msk
QSPI_XIPOFFSET_XIPOFFSET_Pos
RADIO_BASE0_BASE0_Msk
RADIO_BASE0_BASE0_Pos
RADIO_BASE1_BASE1_Msk
RADIO_BASE1_BASE1_Pos
RADIO_BCC_BCC_Msk
RADIO_BCC_BCC_Pos
RADIO_CCACTRL_CCACORRCNT_Msk
RADIO_CCACTRL_CCACORRCNT_Pos
RADIO_CCACTRL_CCACORRTHRES_Msk
RADIO_CCACTRL_CCACORRTHRES_Pos
RADIO_CCACTRL_CCAEDTHRES_Msk
RADIO_CCACTRL_CCAEDTHRES_Pos
RADIO_CCACTRL_CCAMODE_CarrierAndEdMode
RADIO_CCACTRL_CCAMODE_CarrierMode
RADIO_CCACTRL_CCAMODE_CarrierOrEdMode
RADIO_CCACTRL_CCAMODE_EdMode
RADIO_CCACTRL_CCAMODE_EdModeTest1
RADIO_CCACTRL_CCAMODE_Msk
RADIO_CCACTRL_CCAMODE_Pos
RADIO_COUNT
RADIO_CRCCNF_LEN_Disabled
RADIO_CRCCNF_LEN_Msk
RADIO_CRCCNF_LEN_One
RADIO_CRCCNF_LEN_Pos
RADIO_CRCCNF_LEN_Three
RADIO_CRCCNF_LEN_Two
RADIO_CRCCNF_SKIPADDR_Ieee802154
RADIO_CRCCNF_SKIPADDR_Include
RADIO_CRCCNF_SKIPADDR_Msk
RADIO_CRCCNF_SKIPADDR_Pos
RADIO_CRCCNF_SKIPADDR_Skip
RADIO_CRCINIT_CRCINIT_Msk
RADIO_CRCINIT_CRCINIT_Pos
RADIO_CRCPOLY_CRCPOLY_Msk
RADIO_CRCPOLY_CRCPOLY_Pos
RADIO_CRCSTATUS_CRCSTATUS_CRCError
RADIO_CRCSTATUS_CRCSTATUS_CRCOk
RADIO_CRCSTATUS_CRCSTATUS_Msk
RADIO_CRCSTATUS_CRCSTATUS_Pos
RADIO_DAB_DAB_Msk
RADIO_DAB_DAB_Pos
RADIO_DACNF_ENA0_Disabled
RADIO_DACNF_ENA0_Enabled
RADIO_DACNF_ENA0_Msk
RADIO_DACNF_ENA0_Pos
RADIO_DACNF_ENA1_Disabled
RADIO_DACNF_ENA1_Enabled
RADIO_DACNF_ENA1_Msk
RADIO_DACNF_ENA1_Pos
RADIO_DACNF_ENA2_Disabled
RADIO_DACNF_ENA2_Enabled
RADIO_DACNF_ENA2_Msk
RADIO_DACNF_ENA2_Pos
RADIO_DACNF_ENA3_Disabled
RADIO_DACNF_ENA3_Enabled
RADIO_DACNF_ENA3_Msk
RADIO_DACNF_ENA3_Pos
RADIO_DACNF_ENA4_Disabled
RADIO_DACNF_ENA4_Enabled
RADIO_DACNF_ENA4_Msk
RADIO_DACNF_ENA4_Pos
RADIO_DACNF_ENA5_Disabled
RADIO_DACNF_ENA5_Enabled
RADIO_DACNF_ENA5_Msk
RADIO_DACNF_ENA5_Pos
RADIO_DACNF_ENA6_Disabled
RADIO_DACNF_ENA6_Enabled
RADIO_DACNF_ENA6_Msk
RADIO_DACNF_ENA6_Pos
RADIO_DACNF_ENA7_Disabled
RADIO_DACNF_ENA7_Enabled
RADIO_DACNF_ENA7_Msk
RADIO_DACNF_ENA7_Pos
RADIO_DACNF_TXADD0_Msk
RADIO_DACNF_TXADD0_Pos
RADIO_DACNF_TXADD1_Msk
RADIO_DACNF_TXADD1_Pos
RADIO_DACNF_TXADD2_Msk
RADIO_DACNF_TXADD2_Pos
RADIO_DACNF_TXADD3_Msk
RADIO_DACNF_TXADD3_Pos
RADIO_DACNF_TXADD4_Msk
RADIO_DACNF_TXADD4_Pos
RADIO_DACNF_TXADD5_Msk
RADIO_DACNF_TXADD5_Pos
RADIO_DACNF_TXADD6_Msk
RADIO_DACNF_TXADD6_Pos
RADIO_DACNF_TXADD7_Msk
RADIO_DACNF_TXADD7_Pos
RADIO_DAI_DAI_Msk
RADIO_DAI_DAI_Pos
RADIO_DAP_DAP_Msk
RADIO_DAP_DAP_Pos
RADIO_DATAWHITEIV_DATAWHITEIV_Msk
RADIO_DATAWHITEIV_DATAWHITEIV_Pos
RADIO_EASYDMA_MAXCNT_SIZE
RADIO_EDCNT_EDCNT_Msk
RADIO_EDCNT_EDCNT_Pos
RADIO_EDSAMPLE_EDLVL_Msk
RADIO_EDSAMPLE_EDLVL_Pos
RADIO_EVENTS_ADDRESS_EVENTS_ADDRESS_Generated
RADIO_EVENTS_ADDRESS_EVENTS_ADDRESS_Msk
RADIO_EVENTS_ADDRESS_EVENTS_ADDRESS_NotGenerated
RADIO_EVENTS_ADDRESS_EVENTS_ADDRESS_Pos
RADIO_EVENTS_BCMATCH_EVENTS_BCMATCH_Generated
RADIO_EVENTS_BCMATCH_EVENTS_BCMATCH_Msk
RADIO_EVENTS_BCMATCH_EVENTS_BCMATCH_NotGenerated
RADIO_EVENTS_BCMATCH_EVENTS_BCMATCH_Pos
RADIO_EVENTS_CCABUSY_EVENTS_CCABUSY_Generated
RADIO_EVENTS_CCABUSY_EVENTS_CCABUSY_Msk
RADIO_EVENTS_CCABUSY_EVENTS_CCABUSY_NotGenerated
RADIO_EVENTS_CCABUSY_EVENTS_CCABUSY_Pos
RADIO_EVENTS_CCAIDLE_EVENTS_CCAIDLE_Generated
RADIO_EVENTS_CCAIDLE_EVENTS_CCAIDLE_Msk
RADIO_EVENTS_CCAIDLE_EVENTS_CCAIDLE_NotGenerated
RADIO_EVENTS_CCAIDLE_EVENTS_CCAIDLE_Pos
RADIO_EVENTS_CCASTOPPED_EVENTS_CCASTOPPED_Generated
RADIO_EVENTS_CCASTOPPED_EVENTS_CCASTOPPED_Msk
RADIO_EVENTS_CCASTOPPED_EVENTS_CCASTOPPED_NotGenerated
RADIO_EVENTS_CCASTOPPED_EVENTS_CCASTOPPED_Pos
RADIO_EVENTS_CRCERROR_EVENTS_CRCERROR_Generated
RADIO_EVENTS_CRCERROR_EVENTS_CRCERROR_Msk
RADIO_EVENTS_CRCERROR_EVENTS_CRCERROR_NotGenerated
RADIO_EVENTS_CRCERROR_EVENTS_CRCERROR_Pos
RADIO_EVENTS_CRCOK_EVENTS_CRCOK_Generated
RADIO_EVENTS_CRCOK_EVENTS_CRCOK_Msk
RADIO_EVENTS_CRCOK_EVENTS_CRCOK_NotGenerated
RADIO_EVENTS_CRCOK_EVENTS_CRCOK_Pos
RADIO_EVENTS_DEVMATCH_EVENTS_DEVMATCH_Generated
RADIO_EVENTS_DEVMATCH_EVENTS_DEVMATCH_Msk
RADIO_EVENTS_DEVMATCH_EVENTS_DEVMATCH_NotGenerated
RADIO_EVENTS_DEVMATCH_EVENTS_DEVMATCH_Pos
RADIO_EVENTS_DEVMISS_EVENTS_DEVMISS_Generated
RADIO_EVENTS_DEVMISS_EVENTS_DEVMISS_Msk
RADIO_EVENTS_DEVMISS_EVENTS_DEVMISS_NotGenerated
RADIO_EVENTS_DEVMISS_EVENTS_DEVMISS_Pos
RADIO_EVENTS_DISABLED_EVENTS_DISABLED_Generated
RADIO_EVENTS_DISABLED_EVENTS_DISABLED_Msk
RADIO_EVENTS_DISABLED_EVENTS_DISABLED_NotGenerated
RADIO_EVENTS_DISABLED_EVENTS_DISABLED_Pos
RADIO_EVENTS_EDEND_EVENTS_EDEND_Generated
RADIO_EVENTS_EDEND_EVENTS_EDEND_Msk
RADIO_EVENTS_EDEND_EVENTS_EDEND_NotGenerated
RADIO_EVENTS_EDEND_EVENTS_EDEND_Pos
RADIO_EVENTS_EDSTOPPED_EVENTS_EDSTOPPED_Generated
RADIO_EVENTS_EDSTOPPED_EVENTS_EDSTOPPED_Msk
RADIO_EVENTS_EDSTOPPED_EVENTS_EDSTOPPED_NotGenerated
RADIO_EVENTS_EDSTOPPED_EVENTS_EDSTOPPED_Pos
RADIO_EVENTS_END_EVENTS_END_Generated
RADIO_EVENTS_END_EVENTS_END_Msk
RADIO_EVENTS_END_EVENTS_END_NotGenerated
RADIO_EVENTS_END_EVENTS_END_Pos
RADIO_EVENTS_FRAMESTART_EVENTS_FRAMESTART_Generated
RADIO_EVENTS_FRAMESTART_EVENTS_FRAMESTART_Msk
RADIO_EVENTS_FRAMESTART_EVENTS_FRAMESTART_NotGenerated
RADIO_EVENTS_FRAMESTART_EVENTS_FRAMESTART_Pos
RADIO_EVENTS_MHRMATCH_EVENTS_MHRMATCH_Generated
RADIO_EVENTS_MHRMATCH_EVENTS_MHRMATCH_Msk
RADIO_EVENTS_MHRMATCH_EVENTS_MHRMATCH_NotGenerated
RADIO_EVENTS_MHRMATCH_EVENTS_MHRMATCH_Pos
RADIO_EVENTS_PAYLOAD_EVENTS_PAYLOAD_Generated
RADIO_EVENTS_PAYLOAD_EVENTS_PAYLOAD_Msk
RADIO_EVENTS_PAYLOAD_EVENTS_PAYLOAD_NotGenerated
RADIO_EVENTS_PAYLOAD_EVENTS_PAYLOAD_Pos
RADIO_EVENTS_PHYEND_EVENTS_PHYEND_Generated
RADIO_EVENTS_PHYEND_EVENTS_PHYEND_Msk
RADIO_EVENTS_PHYEND_EVENTS_PHYEND_NotGenerated
RADIO_EVENTS_PHYEND_EVENTS_PHYEND_Pos
RADIO_EVENTS_RATEBOOST_EVENTS_RATEBOOST_Generated
RADIO_EVENTS_RATEBOOST_EVENTS_RATEBOOST_Msk
RADIO_EVENTS_RATEBOOST_EVENTS_RATEBOOST_NotGenerated
RADIO_EVENTS_RATEBOOST_EVENTS_RATEBOOST_Pos
RADIO_EVENTS_READY_EVENTS_READY_Generated
RADIO_EVENTS_READY_EVENTS_READY_Msk
RADIO_EVENTS_READY_EVENTS_READY_NotGenerated
RADIO_EVENTS_READY_EVENTS_READY_Pos
RADIO_EVENTS_RSSIEND_EVENTS_RSSIEND_Generated
RADIO_EVENTS_RSSIEND_EVENTS_RSSIEND_Msk
RADIO_EVENTS_RSSIEND_EVENTS_RSSIEND_NotGenerated
RADIO_EVENTS_RSSIEND_EVENTS_RSSIEND_Pos
RADIO_EVENTS_RXREADY_EVENTS_RXREADY_Generated
RADIO_EVENTS_RXREADY_EVENTS_RXREADY_Msk
RADIO_EVENTS_RXREADY_EVENTS_RXREADY_NotGenerated
RADIO_EVENTS_RXREADY_EVENTS_RXREADY_Pos
RADIO_EVENTS_TXREADY_EVENTS_TXREADY_Generated
RADIO_EVENTS_TXREADY_EVENTS_TXREADY_Msk
RADIO_EVENTS_TXREADY_EVENTS_TXREADY_NotGenerated
RADIO_EVENTS_TXREADY_EVENTS_TXREADY_Pos
RADIO_FREQUENCY_FREQUENCY_Msk
RADIO_FREQUENCY_FREQUENCY_Pos
RADIO_FREQUENCY_MAP_Default
RADIO_FREQUENCY_MAP_Low
RADIO_FREQUENCY_MAP_Msk
RADIO_FREQUENCY_MAP_Pos
RADIO_INTENCLR_ADDRESS_Clear
RADIO_INTENCLR_ADDRESS_Disabled
RADIO_INTENCLR_ADDRESS_Enabled
RADIO_INTENCLR_ADDRESS_Msk
RADIO_INTENCLR_ADDRESS_Pos
RADIO_INTENCLR_BCMATCH_Clear
RADIO_INTENCLR_BCMATCH_Disabled
RADIO_INTENCLR_BCMATCH_Enabled
RADIO_INTENCLR_BCMATCH_Msk
RADIO_INTENCLR_BCMATCH_Pos
RADIO_INTENCLR_CCABUSY_Clear
RADIO_INTENCLR_CCABUSY_Disabled
RADIO_INTENCLR_CCABUSY_Enabled
RADIO_INTENCLR_CCABUSY_Msk
RADIO_INTENCLR_CCABUSY_Pos
RADIO_INTENCLR_CCAIDLE_Clear
RADIO_INTENCLR_CCAIDLE_Disabled
RADIO_INTENCLR_CCAIDLE_Enabled
RADIO_INTENCLR_CCAIDLE_Msk
RADIO_INTENCLR_CCAIDLE_Pos
RADIO_INTENCLR_CCASTOPPED_Clear
RADIO_INTENCLR_CCASTOPPED_Disabled
RADIO_INTENCLR_CCASTOPPED_Enabled
RADIO_INTENCLR_CCASTOPPED_Msk
RADIO_INTENCLR_CCASTOPPED_Pos
RADIO_INTENCLR_CRCERROR_Clear
RADIO_INTENCLR_CRCERROR_Disabled
RADIO_INTENCLR_CRCERROR_Enabled
RADIO_INTENCLR_CRCERROR_Msk
RADIO_INTENCLR_CRCERROR_Pos
RADIO_INTENCLR_CRCOK_Clear
RADIO_INTENCLR_CRCOK_Disabled
RADIO_INTENCLR_CRCOK_Enabled
RADIO_INTENCLR_CRCOK_Msk
RADIO_INTENCLR_CRCOK_Pos
RADIO_INTENCLR_DEVMATCH_Clear
RADIO_INTENCLR_DEVMATCH_Disabled
RADIO_INTENCLR_DEVMATCH_Enabled
RADIO_INTENCLR_DEVMATCH_Msk
RADIO_INTENCLR_DEVMATCH_Pos
RADIO_INTENCLR_DEVMISS_Clear
RADIO_INTENCLR_DEVMISS_Disabled
RADIO_INTENCLR_DEVMISS_Enabled
RADIO_INTENCLR_DEVMISS_Msk
RADIO_INTENCLR_DEVMISS_Pos
RADIO_INTENCLR_DISABLED_Clear
RADIO_INTENCLR_DISABLED_Disabled
RADIO_INTENCLR_DISABLED_Enabled
RADIO_INTENCLR_DISABLED_Msk
RADIO_INTENCLR_DISABLED_Pos
RADIO_INTENCLR_EDEND_Clear
RADIO_INTENCLR_EDEND_Disabled
RADIO_INTENCLR_EDEND_Enabled
RADIO_INTENCLR_EDEND_Msk
RADIO_INTENCLR_EDEND_Pos
RADIO_INTENCLR_EDSTOPPED_Clear
RADIO_INTENCLR_EDSTOPPED_Disabled
RADIO_INTENCLR_EDSTOPPED_Enabled
RADIO_INTENCLR_EDSTOPPED_Msk
RADIO_INTENCLR_EDSTOPPED_Pos
RADIO_INTENCLR_END_Clear
RADIO_INTENCLR_END_Disabled
RADIO_INTENCLR_END_Enabled
RADIO_INTENCLR_END_Msk
RADIO_INTENCLR_END_Pos
RADIO_INTENCLR_FRAMESTART_Clear
RADIO_INTENCLR_FRAMESTART_Disabled
RADIO_INTENCLR_FRAMESTART_Enabled
RADIO_INTENCLR_FRAMESTART_Msk
RADIO_INTENCLR_FRAMESTART_Pos
RADIO_INTENCLR_MHRMATCH_Clear
RADIO_INTENCLR_MHRMATCH_Disabled
RADIO_INTENCLR_MHRMATCH_Enabled
RADIO_INTENCLR_MHRMATCH_Msk
RADIO_INTENCLR_MHRMATCH_Pos
RADIO_INTENCLR_PAYLOAD_Clear
RADIO_INTENCLR_PAYLOAD_Disabled
RADIO_INTENCLR_PAYLOAD_Enabled
RADIO_INTENCLR_PAYLOAD_Msk
RADIO_INTENCLR_PAYLOAD_Pos
RADIO_INTENCLR_PHYEND_Clear
RADIO_INTENCLR_PHYEND_Disabled
RADIO_INTENCLR_PHYEND_Enabled
RADIO_INTENCLR_PHYEND_Msk
RADIO_INTENCLR_PHYEND_Pos
RADIO_INTENCLR_RATEBOOST_Clear
RADIO_INTENCLR_RATEBOOST_Disabled
RADIO_INTENCLR_RATEBOOST_Enabled
RADIO_INTENCLR_RATEBOOST_Msk
RADIO_INTENCLR_RATEBOOST_Pos
RADIO_INTENCLR_READY_Clear
RADIO_INTENCLR_READY_Disabled
RADIO_INTENCLR_READY_Enabled
RADIO_INTENCLR_READY_Msk
RADIO_INTENCLR_READY_Pos
RADIO_INTENCLR_RSSIEND_Clear
RADIO_INTENCLR_RSSIEND_Disabled
RADIO_INTENCLR_RSSIEND_Enabled
RADIO_INTENCLR_RSSIEND_Msk
RADIO_INTENCLR_RSSIEND_Pos
RADIO_INTENCLR_RXREADY_Clear
RADIO_INTENCLR_RXREADY_Disabled
RADIO_INTENCLR_RXREADY_Enabled
RADIO_INTENCLR_RXREADY_Msk
RADIO_INTENCLR_RXREADY_Pos
RADIO_INTENCLR_TXREADY_Clear
RADIO_INTENCLR_TXREADY_Disabled
RADIO_INTENCLR_TXREADY_Enabled
RADIO_INTENCLR_TXREADY_Msk
RADIO_INTENCLR_TXREADY_Pos
RADIO_INTENSET_ADDRESS_Disabled
RADIO_INTENSET_ADDRESS_Enabled
RADIO_INTENSET_ADDRESS_Msk
RADIO_INTENSET_ADDRESS_Pos
RADIO_INTENSET_ADDRESS_Set
RADIO_INTENSET_BCMATCH_Disabled
RADIO_INTENSET_BCMATCH_Enabled
RADIO_INTENSET_BCMATCH_Msk
RADIO_INTENSET_BCMATCH_Pos
RADIO_INTENSET_BCMATCH_Set
RADIO_INTENSET_CCABUSY_Disabled
RADIO_INTENSET_CCABUSY_Enabled
RADIO_INTENSET_CCABUSY_Msk
RADIO_INTENSET_CCABUSY_Pos
RADIO_INTENSET_CCABUSY_Set
RADIO_INTENSET_CCAIDLE_Disabled
RADIO_INTENSET_CCAIDLE_Enabled
RADIO_INTENSET_CCAIDLE_Msk
RADIO_INTENSET_CCAIDLE_Pos
RADIO_INTENSET_CCAIDLE_Set
RADIO_INTENSET_CCASTOPPED_Disabled
RADIO_INTENSET_CCASTOPPED_Enabled
RADIO_INTENSET_CCASTOPPED_Msk
RADIO_INTENSET_CCASTOPPED_Pos
RADIO_INTENSET_CCASTOPPED_Set
RADIO_INTENSET_CRCERROR_Disabled
RADIO_INTENSET_CRCERROR_Enabled
RADIO_INTENSET_CRCERROR_Msk
RADIO_INTENSET_CRCERROR_Pos
RADIO_INTENSET_CRCERROR_Set
RADIO_INTENSET_CRCOK_Disabled
RADIO_INTENSET_CRCOK_Enabled
RADIO_INTENSET_CRCOK_Msk
RADIO_INTENSET_CRCOK_Pos
RADIO_INTENSET_CRCOK_Set
RADIO_INTENSET_DEVMATCH_Disabled
RADIO_INTENSET_DEVMATCH_Enabled
RADIO_INTENSET_DEVMATCH_Msk
RADIO_INTENSET_DEVMATCH_Pos
RADIO_INTENSET_DEVMATCH_Set
RADIO_INTENSET_DEVMISS_Disabled
RADIO_INTENSET_DEVMISS_Enabled
RADIO_INTENSET_DEVMISS_Msk
RADIO_INTENSET_DEVMISS_Pos
RADIO_INTENSET_DEVMISS_Set
RADIO_INTENSET_DISABLED_Disabled
RADIO_INTENSET_DISABLED_Enabled
RADIO_INTENSET_DISABLED_Msk
RADIO_INTENSET_DISABLED_Pos
RADIO_INTENSET_DISABLED_Set
RADIO_INTENSET_EDEND_Disabled
RADIO_INTENSET_EDEND_Enabled
RADIO_INTENSET_EDEND_Msk
RADIO_INTENSET_EDEND_Pos
RADIO_INTENSET_EDEND_Set
RADIO_INTENSET_EDSTOPPED_Disabled
RADIO_INTENSET_EDSTOPPED_Enabled
RADIO_INTENSET_EDSTOPPED_Msk
RADIO_INTENSET_EDSTOPPED_Pos
RADIO_INTENSET_EDSTOPPED_Set
RADIO_INTENSET_END_Disabled
RADIO_INTENSET_END_Enabled
RADIO_INTENSET_END_Msk
RADIO_INTENSET_END_Pos
RADIO_INTENSET_END_Set
RADIO_INTENSET_FRAMESTART_Disabled
RADIO_INTENSET_FRAMESTART_Enabled
RADIO_INTENSET_FRAMESTART_Msk
RADIO_INTENSET_FRAMESTART_Pos
RADIO_INTENSET_FRAMESTART_Set
RADIO_INTENSET_MHRMATCH_Disabled
RADIO_INTENSET_MHRMATCH_Enabled
RADIO_INTENSET_MHRMATCH_Msk
RADIO_INTENSET_MHRMATCH_Pos
RADIO_INTENSET_MHRMATCH_Set
RADIO_INTENSET_PAYLOAD_Disabled
RADIO_INTENSET_PAYLOAD_Enabled
RADIO_INTENSET_PAYLOAD_Msk
RADIO_INTENSET_PAYLOAD_Pos
RADIO_INTENSET_PAYLOAD_Set
RADIO_INTENSET_PHYEND_Disabled
RADIO_INTENSET_PHYEND_Enabled
RADIO_INTENSET_PHYEND_Msk
RADIO_INTENSET_PHYEND_Pos
RADIO_INTENSET_PHYEND_Set
RADIO_INTENSET_RATEBOOST_Disabled
RADIO_INTENSET_RATEBOOST_Enabled
RADIO_INTENSET_RATEBOOST_Msk
RADIO_INTENSET_RATEBOOST_Pos
RADIO_INTENSET_RATEBOOST_Set
RADIO_INTENSET_READY_Disabled
RADIO_INTENSET_READY_Enabled
RADIO_INTENSET_READY_Msk
RADIO_INTENSET_READY_Pos
RADIO_INTENSET_READY_Set
RADIO_INTENSET_RSSIEND_Disabled
RADIO_INTENSET_RSSIEND_Enabled
RADIO_INTENSET_RSSIEND_Msk
RADIO_INTENSET_RSSIEND_Pos
RADIO_INTENSET_RSSIEND_Set
RADIO_INTENSET_RXREADY_Disabled
RADIO_INTENSET_RXREADY_Enabled
RADIO_INTENSET_RXREADY_Msk
RADIO_INTENSET_RXREADY_Pos
RADIO_INTENSET_RXREADY_Set
RADIO_INTENSET_TXREADY_Disabled
RADIO_INTENSET_TXREADY_Enabled
RADIO_INTENSET_TXREADY_Msk
RADIO_INTENSET_TXREADY_Pos
RADIO_INTENSET_TXREADY_Set
RADIO_MHRMATCHCONF_MHRMATCHCONF_Msk
RADIO_MHRMATCHCONF_MHRMATCHCONF_Pos
RADIO_MHRMATCHMAS_MHRMATCHMAS_Msk
RADIO_MHRMATCHMAS_MHRMATCHMAS_Pos
RADIO_MODECNF0_DTX_B0
RADIO_MODECNF0_DTX_B1
RADIO_MODECNF0_DTX_Center
RADIO_MODECNF0_DTX_Msk
RADIO_MODECNF0_DTX_Pos
RADIO_MODECNF0_RU_Default
RADIO_MODECNF0_RU_Fast
RADIO_MODECNF0_RU_Msk
RADIO_MODECNF0_RU_Pos
RADIO_MODE_MODE_Ble_1Mbit
RADIO_MODE_MODE_Ble_2Mbit
RADIO_MODE_MODE_Ble_LR125Kbit
RADIO_MODE_MODE_Ble_LR500Kbit
RADIO_MODE_MODE_Ieee802154_250Kbit
RADIO_MODE_MODE_Msk
RADIO_MODE_MODE_Nrf_1Mbit
RADIO_MODE_MODE_Nrf_2Mbit
RADIO_MODE_MODE_Pos
RADIO_PACKETPTR_PACKETPTR_Msk
RADIO_PACKETPTR_PACKETPTR_Pos
RADIO_PCNF0_CILEN_Msk
RADIO_PCNF0_CILEN_Pos
RADIO_PCNF0_CRCINC_Exclude
RADIO_PCNF0_CRCINC_Include
RADIO_PCNF0_CRCINC_Msk
RADIO_PCNF0_CRCINC_Pos
RADIO_PCNF0_LFLEN_Msk
RADIO_PCNF0_LFLEN_Pos
RADIO_PCNF0_PLEN_16bit
RADIO_PCNF0_PLEN_32bitZero
RADIO_PCNF0_PLEN_8bit
RADIO_PCNF0_PLEN_LongRange
RADIO_PCNF0_PLEN_Msk
RADIO_PCNF0_PLEN_Pos
RADIO_PCNF0_S0LEN_Msk
RADIO_PCNF0_S0LEN_Pos
RADIO_PCNF0_S1INCL_Automatic
RADIO_PCNF0_S1INCL_Include
RADIO_PCNF0_S1INCL_Msk
RADIO_PCNF0_S1INCL_Pos
RADIO_PCNF0_S1LEN_Msk
RADIO_PCNF0_S1LEN_Pos
RADIO_PCNF0_TERMLEN_Msk
RADIO_PCNF0_TERMLEN_Pos
RADIO_PCNF1_BALEN_Msk
RADIO_PCNF1_BALEN_Pos
RADIO_PCNF1_ENDIAN_Big
RADIO_PCNF1_ENDIAN_Little
RADIO_PCNF1_ENDIAN_Msk
RADIO_PCNF1_ENDIAN_Pos
RADIO_PCNF1_MAXLEN_Msk
RADIO_PCNF1_MAXLEN_Pos
RADIO_PCNF1_STATLEN_Msk
RADIO_PCNF1_STATLEN_Pos
RADIO_PCNF1_WHITEEN_Disabled
RADIO_PCNF1_WHITEEN_Enabled
RADIO_PCNF1_WHITEEN_Msk
RADIO_PCNF1_WHITEEN_Pos
RADIO_PDUSTAT_CISTAT_LR125kbit
RADIO_PDUSTAT_CISTAT_LR500kbit
RADIO_PDUSTAT_CISTAT_Msk
RADIO_PDUSTAT_CISTAT_Pos
RADIO_PDUSTAT_PDUSTAT_GreaterThan
RADIO_PDUSTAT_PDUSTAT_LessThan
RADIO_PDUSTAT_PDUSTAT_Msk
RADIO_PDUSTAT_PDUSTAT_Pos
RADIO_POWER_POWER_Disabled
RADIO_POWER_POWER_Enabled
RADIO_POWER_POWER_Msk
RADIO_POWER_POWER_Pos
RADIO_PREFIX0_AP0_Msk
RADIO_PREFIX0_AP0_Pos
RADIO_PREFIX0_AP1_Msk
RADIO_PREFIX0_AP1_Pos
RADIO_PREFIX0_AP2_Msk
RADIO_PREFIX0_AP2_Pos
RADIO_PREFIX0_AP3_Msk
RADIO_PREFIX0_AP3_Pos
RADIO_PREFIX1_AP4_Msk
RADIO_PREFIX1_AP4_Pos
RADIO_PREFIX1_AP5_Msk
RADIO_PREFIX1_AP5_Pos
RADIO_PREFIX1_AP6_Msk
RADIO_PREFIX1_AP6_Pos
RADIO_PREFIX1_AP7_Msk
RADIO_PREFIX1_AP7_Pos
RADIO_RSSISAMPLE_RSSISAMPLE_Msk
RADIO_RSSISAMPLE_RSSISAMPLE_Pos
RADIO_RXADDRESSES_ADDR0_Disabled
RADIO_RXADDRESSES_ADDR0_Enabled
RADIO_RXADDRESSES_ADDR0_Msk
RADIO_RXADDRESSES_ADDR0_Pos
RADIO_RXADDRESSES_ADDR1_Disabled
RADIO_RXADDRESSES_ADDR1_Enabled
RADIO_RXADDRESSES_ADDR1_Msk
RADIO_RXADDRESSES_ADDR1_Pos
RADIO_RXADDRESSES_ADDR2_Disabled
RADIO_RXADDRESSES_ADDR2_Enabled
RADIO_RXADDRESSES_ADDR2_Msk
RADIO_RXADDRESSES_ADDR2_Pos
RADIO_RXADDRESSES_ADDR3_Disabled
RADIO_RXADDRESSES_ADDR3_Enabled
RADIO_RXADDRESSES_ADDR3_Msk
RADIO_RXADDRESSES_ADDR3_Pos
RADIO_RXADDRESSES_ADDR4_Disabled
RADIO_RXADDRESSES_ADDR4_Enabled
RADIO_RXADDRESSES_ADDR4_Msk
RADIO_RXADDRESSES_ADDR4_Pos
RADIO_RXADDRESSES_ADDR5_Disabled
RADIO_RXADDRESSES_ADDR5_Enabled
RADIO_RXADDRESSES_ADDR5_Msk
RADIO_RXADDRESSES_ADDR5_Pos
RADIO_RXADDRESSES_ADDR6_Disabled
RADIO_RXADDRESSES_ADDR6_Enabled
RADIO_RXADDRESSES_ADDR6_Msk
RADIO_RXADDRESSES_ADDR6_Pos
RADIO_RXADDRESSES_ADDR7_Disabled
RADIO_RXADDRESSES_ADDR7_Enabled
RADIO_RXADDRESSES_ADDR7_Msk
RADIO_RXADDRESSES_ADDR7_Pos
RADIO_RXCRC_RXCRC_Msk
RADIO_RXCRC_RXCRC_Pos
RADIO_RXMATCH_RXMATCH_Msk
RADIO_RXMATCH_RXMATCH_Pos
RADIO_SFD_SFD_Msk
RADIO_SFD_SFD_Pos
RADIO_SHORTS_ADDRESS_BCSTART_Disabled
RADIO_SHORTS_ADDRESS_BCSTART_Enabled
RADIO_SHORTS_ADDRESS_BCSTART_Msk
RADIO_SHORTS_ADDRESS_BCSTART_Pos
RADIO_SHORTS_ADDRESS_RSSISTART_Disabled
RADIO_SHORTS_ADDRESS_RSSISTART_Enabled
RADIO_SHORTS_ADDRESS_RSSISTART_Msk
RADIO_SHORTS_ADDRESS_RSSISTART_Pos
RADIO_SHORTS_CCABUSY_DISABLE_Disabled
RADIO_SHORTS_CCABUSY_DISABLE_Enabled
RADIO_SHORTS_CCABUSY_DISABLE_Msk
RADIO_SHORTS_CCABUSY_DISABLE_Pos
RADIO_SHORTS_CCAIDLE_STOP_Disabled
RADIO_SHORTS_CCAIDLE_STOP_Enabled
RADIO_SHORTS_CCAIDLE_STOP_Msk
RADIO_SHORTS_CCAIDLE_STOP_Pos
RADIO_SHORTS_CCAIDLE_TXEN_Disabled
RADIO_SHORTS_CCAIDLE_TXEN_Enabled
RADIO_SHORTS_CCAIDLE_TXEN_Msk
RADIO_SHORTS_CCAIDLE_TXEN_Pos
RADIO_SHORTS_DISABLED_RSSISTOP_Disabled
RADIO_SHORTS_DISABLED_RSSISTOP_Enabled
RADIO_SHORTS_DISABLED_RSSISTOP_Msk
RADIO_SHORTS_DISABLED_RSSISTOP_Pos
RADIO_SHORTS_DISABLED_RXEN_Disabled
RADIO_SHORTS_DISABLED_RXEN_Enabled
RADIO_SHORTS_DISABLED_RXEN_Msk
RADIO_SHORTS_DISABLED_RXEN_Pos
RADIO_SHORTS_DISABLED_TXEN_Disabled
RADIO_SHORTS_DISABLED_TXEN_Enabled
RADIO_SHORTS_DISABLED_TXEN_Msk
RADIO_SHORTS_DISABLED_TXEN_Pos
RADIO_SHORTS_EDEND_DISABLE_Disabled
RADIO_SHORTS_EDEND_DISABLE_Enabled
RADIO_SHORTS_EDEND_DISABLE_Msk
RADIO_SHORTS_EDEND_DISABLE_Pos
RADIO_SHORTS_END_DISABLE_Disabled
RADIO_SHORTS_END_DISABLE_Enabled
RADIO_SHORTS_END_DISABLE_Msk
RADIO_SHORTS_END_DISABLE_Pos
RADIO_SHORTS_END_START_Disabled
RADIO_SHORTS_END_START_Enabled
RADIO_SHORTS_END_START_Msk
RADIO_SHORTS_END_START_Pos
RADIO_SHORTS_FRAMESTART_BCSTART_Disabled
RADIO_SHORTS_FRAMESTART_BCSTART_Enabled
RADIO_SHORTS_FRAMESTART_BCSTART_Msk
RADIO_SHORTS_FRAMESTART_BCSTART_Pos
RADIO_SHORTS_PHYEND_DISABLE_Disabled
RADIO_SHORTS_PHYEND_DISABLE_Enabled
RADIO_SHORTS_PHYEND_DISABLE_Msk
RADIO_SHORTS_PHYEND_DISABLE_Pos
RADIO_SHORTS_PHYEND_START_Disabled
RADIO_SHORTS_PHYEND_START_Enabled
RADIO_SHORTS_PHYEND_START_Msk
RADIO_SHORTS_PHYEND_START_Pos
RADIO_SHORTS_READY_EDSTART_Disabled
RADIO_SHORTS_READY_EDSTART_Enabled
RADIO_SHORTS_READY_EDSTART_Msk
RADIO_SHORTS_READY_EDSTART_Pos
RADIO_SHORTS_READY_START_Disabled
RADIO_SHORTS_READY_START_Enabled
RADIO_SHORTS_READY_START_Msk
RADIO_SHORTS_READY_START_Pos
RADIO_SHORTS_RXREADY_CCASTART_Disabled
RADIO_SHORTS_RXREADY_CCASTART_Enabled
RADIO_SHORTS_RXREADY_CCASTART_Msk
RADIO_SHORTS_RXREADY_CCASTART_Pos
RADIO_SHORTS_RXREADY_START_Disabled
RADIO_SHORTS_RXREADY_START_Enabled
RADIO_SHORTS_RXREADY_START_Msk
RADIO_SHORTS_RXREADY_START_Pos
RADIO_SHORTS_TXREADY_START_Disabled
RADIO_SHORTS_TXREADY_START_Enabled
RADIO_SHORTS_TXREADY_START_Msk
RADIO_SHORTS_TXREADY_START_Pos
RADIO_STATE_STATE_Disabled
RADIO_STATE_STATE_Msk
RADIO_STATE_STATE_Pos
RADIO_STATE_STATE_Rx
RADIO_STATE_STATE_RxDisable
RADIO_STATE_STATE_RxIdle
RADIO_STATE_STATE_RxRu
RADIO_STATE_STATE_Tx
RADIO_STATE_STATE_TxDisable
RADIO_STATE_STATE_TxIdle
RADIO_STATE_STATE_TxRu
RADIO_TASKS_BCSTART_TASKS_BCSTART_Msk
RADIO_TASKS_BCSTART_TASKS_BCSTART_Pos
RADIO_TASKS_BCSTART_TASKS_BCSTART_Trigger
RADIO_TASKS_BCSTOP_TASKS_BCSTOP_Msk
RADIO_TASKS_BCSTOP_TASKS_BCSTOP_Pos
RADIO_TASKS_BCSTOP_TASKS_BCSTOP_Trigger
RADIO_TASKS_CCASTART_TASKS_CCASTART_Msk
RADIO_TASKS_CCASTART_TASKS_CCASTART_Pos
RADIO_TASKS_CCASTART_TASKS_CCASTART_Trigger
RADIO_TASKS_CCASTOP_TASKS_CCASTOP_Msk
RADIO_TASKS_CCASTOP_TASKS_CCASTOP_Pos
RADIO_TASKS_CCASTOP_TASKS_CCASTOP_Trigger
RADIO_TASKS_DISABLE_TASKS_DISABLE_Msk
RADIO_TASKS_DISABLE_TASKS_DISABLE_Pos
RADIO_TASKS_DISABLE_TASKS_DISABLE_Trigger
RADIO_TASKS_EDSTART_TASKS_EDSTART_Msk
RADIO_TASKS_EDSTART_TASKS_EDSTART_Pos
RADIO_TASKS_EDSTART_TASKS_EDSTART_Trigger
RADIO_TASKS_EDSTOP_TASKS_EDSTOP_Msk
RADIO_TASKS_EDSTOP_TASKS_EDSTOP_Pos
RADIO_TASKS_EDSTOP_TASKS_EDSTOP_Trigger
RADIO_TASKS_RSSISTART_TASKS_RSSISTART_Msk
RADIO_TASKS_RSSISTART_TASKS_RSSISTART_Pos
RADIO_TASKS_RSSISTART_TASKS_RSSISTART_Trigger
RADIO_TASKS_RSSISTOP_TASKS_RSSISTOP_Msk
RADIO_TASKS_RSSISTOP_TASKS_RSSISTOP_Pos
RADIO_TASKS_RSSISTOP_TASKS_RSSISTOP_Trigger
RADIO_TASKS_RXEN_TASKS_RXEN_Msk
RADIO_TASKS_RXEN_TASKS_RXEN_Pos
RADIO_TASKS_RXEN_TASKS_RXEN_Trigger
RADIO_TASKS_START_TASKS_START_Msk
RADIO_TASKS_START_TASKS_START_Pos
RADIO_TASKS_START_TASKS_START_Trigger
RADIO_TASKS_STOP_TASKS_STOP_Msk
RADIO_TASKS_STOP_TASKS_STOP_Pos
RADIO_TASKS_STOP_TASKS_STOP_Trigger
RADIO_TASKS_TXEN_TASKS_TXEN_Msk
RADIO_TASKS_TXEN_TASKS_TXEN_Pos
RADIO_TASKS_TXEN_TASKS_TXEN_Trigger
RADIO_TIFS_TIFS_Msk
RADIO_TIFS_TIFS_Pos
RADIO_TXADDRESS_TXADDRESS_Msk
RADIO_TXADDRESS_TXADDRESS_Pos
RADIO_TXPOWER_TXPOWER_0dBm
RADIO_TXPOWER_TXPOWER_Max
RADIO_TXPOWER_TXPOWER_Msk
RADIO_TXPOWER_TXPOWER_Neg12dBm
RADIO_TXPOWER_TXPOWER_Neg16dBm
RADIO_TXPOWER_TXPOWER_Neg20dBm
RADIO_TXPOWER_TXPOWER_Neg30dBm
RADIO_TXPOWER_TXPOWER_Neg40dBm
RADIO_TXPOWER_TXPOWER_Neg4dBm
RADIO_TXPOWER_TXPOWER_Neg8dBm
RADIO_TXPOWER_TXPOWER_Pos
RADIO_TXPOWER_TXPOWER_Pos2dBm
RADIO_TXPOWER_TXPOWER_Pos3dBm
RADIO_TXPOWER_TXPOWER_Pos4dBm
RADIO_TXPOWER_TXPOWER_Pos5dBm
RADIO_TXPOWER_TXPOWER_Pos6dBm
RADIO_TXPOWER_TXPOWER_Pos7dBm
RADIO_TXPOWER_TXPOWER_Pos8dBm
RANDOM_SEED_DEFAULT
RAND_MAX
RE_DUP_MAX
RIOT_APPLICATION
RIOT_BOARD
RIOT_CPU
RIOT_PP_SUCCESSOR_0
RIOT_PP_SUCCESSOR_1
RIOT_PP_SUCCESSOR_10
RIOT_PP_SUCCESSOR_100
RIOT_PP_SUCCESSOR_1000
RIOT_PP_SUCCESSOR_1001
RIOT_PP_SUCCESSOR_1002
RIOT_PP_SUCCESSOR_1003
RIOT_PP_SUCCESSOR_1004
RIOT_PP_SUCCESSOR_1005
RIOT_PP_SUCCESSOR_1006
RIOT_PP_SUCCESSOR_1007
RIOT_PP_SUCCESSOR_1008
RIOT_PP_SUCCESSOR_1009
RIOT_PP_SUCCESSOR_101
RIOT_PP_SUCCESSOR_1010
RIOT_PP_SUCCESSOR_1011
RIOT_PP_SUCCESSOR_1012
RIOT_PP_SUCCESSOR_1013
RIOT_PP_SUCCESSOR_1014
RIOT_PP_SUCCESSOR_1015
RIOT_PP_SUCCESSOR_1016
RIOT_PP_SUCCESSOR_1017
RIOT_PP_SUCCESSOR_1018
RIOT_PP_SUCCESSOR_1019
RIOT_PP_SUCCESSOR_102
RIOT_PP_SUCCESSOR_1020
RIOT_PP_SUCCESSOR_1021
RIOT_PP_SUCCESSOR_1022
RIOT_PP_SUCCESSOR_1023
RIOT_PP_SUCCESSOR_1024
RIOT_PP_SUCCESSOR_1025
RIOT_PP_SUCCESSOR_1026
RIOT_PP_SUCCESSOR_1027
RIOT_PP_SUCCESSOR_1028
RIOT_PP_SUCCESSOR_1029
RIOT_PP_SUCCESSOR_103
RIOT_PP_SUCCESSOR_1030
RIOT_PP_SUCCESSOR_1031
RIOT_PP_SUCCESSOR_1032
RIOT_PP_SUCCESSOR_1033
RIOT_PP_SUCCESSOR_1034
RIOT_PP_SUCCESSOR_1035
RIOT_PP_SUCCESSOR_1036
RIOT_PP_SUCCESSOR_1037
RIOT_PP_SUCCESSOR_1038
RIOT_PP_SUCCESSOR_1039
RIOT_PP_SUCCESSOR_104
RIOT_PP_SUCCESSOR_1040
RIOT_PP_SUCCESSOR_1041
RIOT_PP_SUCCESSOR_1042
RIOT_PP_SUCCESSOR_1043
RIOT_PP_SUCCESSOR_1044
RIOT_PP_SUCCESSOR_1045
RIOT_PP_SUCCESSOR_1046
RIOT_PP_SUCCESSOR_1047
RIOT_PP_SUCCESSOR_1048
RIOT_PP_SUCCESSOR_1049
RIOT_PP_SUCCESSOR_105
RIOT_PP_SUCCESSOR_1050
RIOT_PP_SUCCESSOR_1051
RIOT_PP_SUCCESSOR_1052
RIOT_PP_SUCCESSOR_1053
RIOT_PP_SUCCESSOR_1054
RIOT_PP_SUCCESSOR_1055
RIOT_PP_SUCCESSOR_1056
RIOT_PP_SUCCESSOR_1057
RIOT_PP_SUCCESSOR_1058
RIOT_PP_SUCCESSOR_1059
RIOT_PP_SUCCESSOR_106
RIOT_PP_SUCCESSOR_1060
RIOT_PP_SUCCESSOR_1061
RIOT_PP_SUCCESSOR_1062
RIOT_PP_SUCCESSOR_1063
RIOT_PP_SUCCESSOR_1064
RIOT_PP_SUCCESSOR_1065
RIOT_PP_SUCCESSOR_1066
RIOT_PP_SUCCESSOR_1067
RIOT_PP_SUCCESSOR_1068
RIOT_PP_SUCCESSOR_1069
RIOT_PP_SUCCESSOR_107
RIOT_PP_SUCCESSOR_1070
RIOT_PP_SUCCESSOR_1071
RIOT_PP_SUCCESSOR_1072
RIOT_PP_SUCCESSOR_1073
RIOT_PP_SUCCESSOR_1074
RIOT_PP_SUCCESSOR_1075
RIOT_PP_SUCCESSOR_1076
RIOT_PP_SUCCESSOR_1077
RIOT_PP_SUCCESSOR_1078
RIOT_PP_SUCCESSOR_1079
RIOT_PP_SUCCESSOR_108
RIOT_PP_SUCCESSOR_1080
RIOT_PP_SUCCESSOR_1081
RIOT_PP_SUCCESSOR_1082
RIOT_PP_SUCCESSOR_1083
RIOT_PP_SUCCESSOR_1084
RIOT_PP_SUCCESSOR_1085
RIOT_PP_SUCCESSOR_1086
RIOT_PP_SUCCESSOR_1087
RIOT_PP_SUCCESSOR_1088
RIOT_PP_SUCCESSOR_1089
RIOT_PP_SUCCESSOR_109
RIOT_PP_SUCCESSOR_1090
RIOT_PP_SUCCESSOR_1091
RIOT_PP_SUCCESSOR_1092
RIOT_PP_SUCCESSOR_1093
RIOT_PP_SUCCESSOR_1094
RIOT_PP_SUCCESSOR_1095
RIOT_PP_SUCCESSOR_1096
RIOT_PP_SUCCESSOR_1097
RIOT_PP_SUCCESSOR_1098
RIOT_PP_SUCCESSOR_1099
RIOT_PP_SUCCESSOR_11
RIOT_PP_SUCCESSOR_110
RIOT_PP_SUCCESSOR_1100
RIOT_PP_SUCCESSOR_1101
RIOT_PP_SUCCESSOR_1102
RIOT_PP_SUCCESSOR_1103
RIOT_PP_SUCCESSOR_1104
RIOT_PP_SUCCESSOR_1105
RIOT_PP_SUCCESSOR_1106
RIOT_PP_SUCCESSOR_1107
RIOT_PP_SUCCESSOR_1108
RIOT_PP_SUCCESSOR_1109
RIOT_PP_SUCCESSOR_111
RIOT_PP_SUCCESSOR_1110
RIOT_PP_SUCCESSOR_1111
RIOT_PP_SUCCESSOR_1112
RIOT_PP_SUCCESSOR_1113
RIOT_PP_SUCCESSOR_1114
RIOT_PP_SUCCESSOR_1115
RIOT_PP_SUCCESSOR_1116
RIOT_PP_SUCCESSOR_1117
RIOT_PP_SUCCESSOR_1118
RIOT_PP_SUCCESSOR_1119
RIOT_PP_SUCCESSOR_112
RIOT_PP_SUCCESSOR_1120
RIOT_PP_SUCCESSOR_1121
RIOT_PP_SUCCESSOR_1122
RIOT_PP_SUCCESSOR_1123
RIOT_PP_SUCCESSOR_1124
RIOT_PP_SUCCESSOR_1125
RIOT_PP_SUCCESSOR_1126
RIOT_PP_SUCCESSOR_1127
RIOT_PP_SUCCESSOR_1128
RIOT_PP_SUCCESSOR_1129
RIOT_PP_SUCCESSOR_113
RIOT_PP_SUCCESSOR_1130
RIOT_PP_SUCCESSOR_1131
RIOT_PP_SUCCESSOR_1132
RIOT_PP_SUCCESSOR_1133
RIOT_PP_SUCCESSOR_1134
RIOT_PP_SUCCESSOR_1135
RIOT_PP_SUCCESSOR_1136
RIOT_PP_SUCCESSOR_1137
RIOT_PP_SUCCESSOR_1138
RIOT_PP_SUCCESSOR_1139
RIOT_PP_SUCCESSOR_114
RIOT_PP_SUCCESSOR_1140
RIOT_PP_SUCCESSOR_1141
RIOT_PP_SUCCESSOR_1142
RIOT_PP_SUCCESSOR_1143
RIOT_PP_SUCCESSOR_1144
RIOT_PP_SUCCESSOR_1145
RIOT_PP_SUCCESSOR_1146
RIOT_PP_SUCCESSOR_1147
RIOT_PP_SUCCESSOR_1148
RIOT_PP_SUCCESSOR_1149
RIOT_PP_SUCCESSOR_115
RIOT_PP_SUCCESSOR_1150
RIOT_PP_SUCCESSOR_1151
RIOT_PP_SUCCESSOR_1152
RIOT_PP_SUCCESSOR_1153
RIOT_PP_SUCCESSOR_1154
RIOT_PP_SUCCESSOR_1155
RIOT_PP_SUCCESSOR_1156
RIOT_PP_SUCCESSOR_1157
RIOT_PP_SUCCESSOR_1158
RIOT_PP_SUCCESSOR_1159
RIOT_PP_SUCCESSOR_116
RIOT_PP_SUCCESSOR_1160
RIOT_PP_SUCCESSOR_1161
RIOT_PP_SUCCESSOR_1162
RIOT_PP_SUCCESSOR_1163
RIOT_PP_SUCCESSOR_1164
RIOT_PP_SUCCESSOR_1165
RIOT_PP_SUCCESSOR_1166
RIOT_PP_SUCCESSOR_1167
RIOT_PP_SUCCESSOR_1168
RIOT_PP_SUCCESSOR_1169
RIOT_PP_SUCCESSOR_117
RIOT_PP_SUCCESSOR_1170
RIOT_PP_SUCCESSOR_1171
RIOT_PP_SUCCESSOR_1172
RIOT_PP_SUCCESSOR_1173
RIOT_PP_SUCCESSOR_1174
RIOT_PP_SUCCESSOR_1175
RIOT_PP_SUCCESSOR_1176
RIOT_PP_SUCCESSOR_1177
RIOT_PP_SUCCESSOR_1178
RIOT_PP_SUCCESSOR_1179
RIOT_PP_SUCCESSOR_118
RIOT_PP_SUCCESSOR_1180
RIOT_PP_SUCCESSOR_1181
RIOT_PP_SUCCESSOR_1182
RIOT_PP_SUCCESSOR_1183
RIOT_PP_SUCCESSOR_1184
RIOT_PP_SUCCESSOR_1185
RIOT_PP_SUCCESSOR_1186
RIOT_PP_SUCCESSOR_1187
RIOT_PP_SUCCESSOR_1188
RIOT_PP_SUCCESSOR_1189
RIOT_PP_SUCCESSOR_119
RIOT_PP_SUCCESSOR_1190
RIOT_PP_SUCCESSOR_1191
RIOT_PP_SUCCESSOR_1192
RIOT_PP_SUCCESSOR_1193
RIOT_PP_SUCCESSOR_1194
RIOT_PP_SUCCESSOR_1195
RIOT_PP_SUCCESSOR_1196
RIOT_PP_SUCCESSOR_1197
RIOT_PP_SUCCESSOR_1198
RIOT_PP_SUCCESSOR_1199
RIOT_PP_SUCCESSOR_12
RIOT_PP_SUCCESSOR_120
RIOT_PP_SUCCESSOR_1200
RIOT_PP_SUCCESSOR_1201
RIOT_PP_SUCCESSOR_1202
RIOT_PP_SUCCESSOR_1203
RIOT_PP_SUCCESSOR_1204
RIOT_PP_SUCCESSOR_1205
RIOT_PP_SUCCESSOR_1206
RIOT_PP_SUCCESSOR_1207
RIOT_PP_SUCCESSOR_1208
RIOT_PP_SUCCESSOR_1209
RIOT_PP_SUCCESSOR_121
RIOT_PP_SUCCESSOR_1210
RIOT_PP_SUCCESSOR_1211
RIOT_PP_SUCCESSOR_1212
RIOT_PP_SUCCESSOR_1213
RIOT_PP_SUCCESSOR_1214
RIOT_PP_SUCCESSOR_1215
RIOT_PP_SUCCESSOR_1216
RIOT_PP_SUCCESSOR_1217
RIOT_PP_SUCCESSOR_1218
RIOT_PP_SUCCESSOR_1219
RIOT_PP_SUCCESSOR_122
RIOT_PP_SUCCESSOR_1220
RIOT_PP_SUCCESSOR_1221
RIOT_PP_SUCCESSOR_1222
RIOT_PP_SUCCESSOR_1223
RIOT_PP_SUCCESSOR_1224
RIOT_PP_SUCCESSOR_1225
RIOT_PP_SUCCESSOR_1226
RIOT_PP_SUCCESSOR_1227
RIOT_PP_SUCCESSOR_1228
RIOT_PP_SUCCESSOR_1229
RIOT_PP_SUCCESSOR_123
RIOT_PP_SUCCESSOR_1230
RIOT_PP_SUCCESSOR_1231
RIOT_PP_SUCCESSOR_1232
RIOT_PP_SUCCESSOR_1233
RIOT_PP_SUCCESSOR_1234
RIOT_PP_SUCCESSOR_1235
RIOT_PP_SUCCESSOR_1236
RIOT_PP_SUCCESSOR_1237
RIOT_PP_SUCCESSOR_1238
RIOT_PP_SUCCESSOR_1239
RIOT_PP_SUCCESSOR_124
RIOT_PP_SUCCESSOR_1240
RIOT_PP_SUCCESSOR_1241
RIOT_PP_SUCCESSOR_1242
RIOT_PP_SUCCESSOR_1243
RIOT_PP_SUCCESSOR_1244
RIOT_PP_SUCCESSOR_1245
RIOT_PP_SUCCESSOR_1246
RIOT_PP_SUCCESSOR_1247
RIOT_PP_SUCCESSOR_1248
RIOT_PP_SUCCESSOR_1249
RIOT_PP_SUCCESSOR_125
RIOT_PP_SUCCESSOR_1250
RIOT_PP_SUCCESSOR_1251
RIOT_PP_SUCCESSOR_1252
RIOT_PP_SUCCESSOR_1253
RIOT_PP_SUCCESSOR_1254
RIOT_PP_SUCCESSOR_1255
RIOT_PP_SUCCESSOR_1256
RIOT_PP_SUCCESSOR_1257
RIOT_PP_SUCCESSOR_1258
RIOT_PP_SUCCESSOR_1259
RIOT_PP_SUCCESSOR_126
RIOT_PP_SUCCESSOR_1260
RIOT_PP_SUCCESSOR_1261
RIOT_PP_SUCCESSOR_1262
RIOT_PP_SUCCESSOR_1263
RIOT_PP_SUCCESSOR_1264
RIOT_PP_SUCCESSOR_1265
RIOT_PP_SUCCESSOR_1266
RIOT_PP_SUCCESSOR_1267
RIOT_PP_SUCCESSOR_1268
RIOT_PP_SUCCESSOR_1269
RIOT_PP_SUCCESSOR_127
RIOT_PP_SUCCESSOR_1270
RIOT_PP_SUCCESSOR_1271
RIOT_PP_SUCCESSOR_1272
RIOT_PP_SUCCESSOR_1273
RIOT_PP_SUCCESSOR_1274
RIOT_PP_SUCCESSOR_1275
RIOT_PP_SUCCESSOR_1276
RIOT_PP_SUCCESSOR_1277
RIOT_PP_SUCCESSOR_1278
RIOT_PP_SUCCESSOR_1279
RIOT_PP_SUCCESSOR_128
RIOT_PP_SUCCESSOR_1280
RIOT_PP_SUCCESSOR_1281
RIOT_PP_SUCCESSOR_1282
RIOT_PP_SUCCESSOR_1283
RIOT_PP_SUCCESSOR_1284
RIOT_PP_SUCCESSOR_1285
RIOT_PP_SUCCESSOR_1286
RIOT_PP_SUCCESSOR_1287
RIOT_PP_SUCCESSOR_1288
RIOT_PP_SUCCESSOR_1289
RIOT_PP_SUCCESSOR_129
RIOT_PP_SUCCESSOR_1290
RIOT_PP_SUCCESSOR_1291
RIOT_PP_SUCCESSOR_1292
RIOT_PP_SUCCESSOR_1293
RIOT_PP_SUCCESSOR_1294
RIOT_PP_SUCCESSOR_1295
RIOT_PP_SUCCESSOR_1296
RIOT_PP_SUCCESSOR_1297
RIOT_PP_SUCCESSOR_1298
RIOT_PP_SUCCESSOR_1299
RIOT_PP_SUCCESSOR_13
RIOT_PP_SUCCESSOR_130
RIOT_PP_SUCCESSOR_1300
RIOT_PP_SUCCESSOR_1301
RIOT_PP_SUCCESSOR_1302
RIOT_PP_SUCCESSOR_1303
RIOT_PP_SUCCESSOR_1304
RIOT_PP_SUCCESSOR_1305
RIOT_PP_SUCCESSOR_1306
RIOT_PP_SUCCESSOR_1307
RIOT_PP_SUCCESSOR_1308
RIOT_PP_SUCCESSOR_1309
RIOT_PP_SUCCESSOR_131
RIOT_PP_SUCCESSOR_1310
RIOT_PP_SUCCESSOR_1311
RIOT_PP_SUCCESSOR_1312
RIOT_PP_SUCCESSOR_1313
RIOT_PP_SUCCESSOR_1314
RIOT_PP_SUCCESSOR_1315
RIOT_PP_SUCCESSOR_1316
RIOT_PP_SUCCESSOR_1317
RIOT_PP_SUCCESSOR_1318
RIOT_PP_SUCCESSOR_1319
RIOT_PP_SUCCESSOR_132
RIOT_PP_SUCCESSOR_1320
RIOT_PP_SUCCESSOR_1321
RIOT_PP_SUCCESSOR_1322
RIOT_PP_SUCCESSOR_1323
RIOT_PP_SUCCESSOR_1324
RIOT_PP_SUCCESSOR_1325
RIOT_PP_SUCCESSOR_1326
RIOT_PP_SUCCESSOR_1327
RIOT_PP_SUCCESSOR_1328
RIOT_PP_SUCCESSOR_1329
RIOT_PP_SUCCESSOR_133
RIOT_PP_SUCCESSOR_1330
RIOT_PP_SUCCESSOR_1331
RIOT_PP_SUCCESSOR_1332
RIOT_PP_SUCCESSOR_1333
RIOT_PP_SUCCESSOR_1334
RIOT_PP_SUCCESSOR_1335
RIOT_PP_SUCCESSOR_1336
RIOT_PP_SUCCESSOR_1337
RIOT_PP_SUCCESSOR_1338
RIOT_PP_SUCCESSOR_1339
RIOT_PP_SUCCESSOR_134
RIOT_PP_SUCCESSOR_1340
RIOT_PP_SUCCESSOR_1341
RIOT_PP_SUCCESSOR_1342
RIOT_PP_SUCCESSOR_1343
RIOT_PP_SUCCESSOR_1344
RIOT_PP_SUCCESSOR_1345
RIOT_PP_SUCCESSOR_1346
RIOT_PP_SUCCESSOR_1347
RIOT_PP_SUCCESSOR_1348
RIOT_PP_SUCCESSOR_1349
RIOT_PP_SUCCESSOR_135
RIOT_PP_SUCCESSOR_1350
RIOT_PP_SUCCESSOR_1351
RIOT_PP_SUCCESSOR_1352
RIOT_PP_SUCCESSOR_1353
RIOT_PP_SUCCESSOR_1354
RIOT_PP_SUCCESSOR_1355
RIOT_PP_SUCCESSOR_1356
RIOT_PP_SUCCESSOR_1357
RIOT_PP_SUCCESSOR_1358
RIOT_PP_SUCCESSOR_1359
RIOT_PP_SUCCESSOR_136
RIOT_PP_SUCCESSOR_1360
RIOT_PP_SUCCESSOR_1361
RIOT_PP_SUCCESSOR_1362
RIOT_PP_SUCCESSOR_1363
RIOT_PP_SUCCESSOR_1364
RIOT_PP_SUCCESSOR_1365
RIOT_PP_SUCCESSOR_1366
RIOT_PP_SUCCESSOR_1367
RIOT_PP_SUCCESSOR_1368
RIOT_PP_SUCCESSOR_1369
RIOT_PP_SUCCESSOR_137
RIOT_PP_SUCCESSOR_1370
RIOT_PP_SUCCESSOR_1371
RIOT_PP_SUCCESSOR_1372
RIOT_PP_SUCCESSOR_1373
RIOT_PP_SUCCESSOR_1374
RIOT_PP_SUCCESSOR_1375
RIOT_PP_SUCCESSOR_1376
RIOT_PP_SUCCESSOR_1377
RIOT_PP_SUCCESSOR_1378
RIOT_PP_SUCCESSOR_1379
RIOT_PP_SUCCESSOR_138
RIOT_PP_SUCCESSOR_1380
RIOT_PP_SUCCESSOR_1381
RIOT_PP_SUCCESSOR_1382
RIOT_PP_SUCCESSOR_1383
RIOT_PP_SUCCESSOR_1384
RIOT_PP_SUCCESSOR_1385
RIOT_PP_SUCCESSOR_1386
RIOT_PP_SUCCESSOR_1387
RIOT_PP_SUCCESSOR_1388
RIOT_PP_SUCCESSOR_1389
RIOT_PP_SUCCESSOR_139
RIOT_PP_SUCCESSOR_1390
RIOT_PP_SUCCESSOR_1391
RIOT_PP_SUCCESSOR_1392
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RIOT_PP_SUCCESSOR_1903
RIOT_PP_SUCCESSOR_1904
RIOT_PP_SUCCESSOR_1905
RIOT_PP_SUCCESSOR_1906
RIOT_PP_SUCCESSOR_1907
RIOT_PP_SUCCESSOR_1908
RIOT_PP_SUCCESSOR_1909
RIOT_PP_SUCCESSOR_191
RIOT_PP_SUCCESSOR_1910
RIOT_PP_SUCCESSOR_1911
RIOT_PP_SUCCESSOR_1912
RIOT_PP_SUCCESSOR_1913
RIOT_PP_SUCCESSOR_1914
RIOT_PP_SUCCESSOR_1915
RIOT_PP_SUCCESSOR_1916
RIOT_PP_SUCCESSOR_1917
RIOT_PP_SUCCESSOR_1918
RIOT_PP_SUCCESSOR_1919
RIOT_PP_SUCCESSOR_192
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RIOT_PP_SUCCESSOR_1928
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RIOT_PP_SUCCESSOR_193
RIOT_PP_SUCCESSOR_1930
RIOT_PP_SUCCESSOR_1931
RIOT_PP_SUCCESSOR_1932
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RIOT_PP_SUCCESSOR_1934
RIOT_PP_SUCCESSOR_1935
RIOT_PP_SUCCESSOR_1936
RIOT_PP_SUCCESSOR_1937
RIOT_PP_SUCCESSOR_1938
RIOT_PP_SUCCESSOR_1939
RIOT_PP_SUCCESSOR_194
RIOT_PP_SUCCESSOR_1940
RIOT_PP_SUCCESSOR_1941
RIOT_PP_SUCCESSOR_1942
RIOT_PP_SUCCESSOR_1943
RIOT_PP_SUCCESSOR_1944
RIOT_PP_SUCCESSOR_1945
RIOT_PP_SUCCESSOR_1946
RIOT_PP_SUCCESSOR_1947
RIOT_PP_SUCCESSOR_1948
RIOT_PP_SUCCESSOR_1949
RIOT_PP_SUCCESSOR_195
RIOT_PP_SUCCESSOR_1950
RIOT_PP_SUCCESSOR_1951
RIOT_PP_SUCCESSOR_1952
RIOT_PP_SUCCESSOR_1953
RIOT_PP_SUCCESSOR_1954
RIOT_PP_SUCCESSOR_1955
RIOT_PP_SUCCESSOR_1956
RIOT_PP_SUCCESSOR_1957
RIOT_PP_SUCCESSOR_1958
RIOT_PP_SUCCESSOR_1959
RIOT_PP_SUCCESSOR_196
RIOT_PP_SUCCESSOR_1960
RIOT_PP_SUCCESSOR_1961
RIOT_PP_SUCCESSOR_1962
RIOT_PP_SUCCESSOR_1963
RIOT_PP_SUCCESSOR_1964
RIOT_PP_SUCCESSOR_1965
RIOT_PP_SUCCESSOR_1966
RIOT_PP_SUCCESSOR_1967
RIOT_PP_SUCCESSOR_1968
RIOT_PP_SUCCESSOR_1969
RIOT_PP_SUCCESSOR_197
RIOT_PP_SUCCESSOR_1970
RIOT_PP_SUCCESSOR_1971
RIOT_PP_SUCCESSOR_1972
RIOT_PP_SUCCESSOR_1973
RIOT_PP_SUCCESSOR_1974
RIOT_PP_SUCCESSOR_1975
RIOT_PP_SUCCESSOR_1976
RIOT_PP_SUCCESSOR_1977
RIOT_PP_SUCCESSOR_1978
RIOT_PP_SUCCESSOR_1979
RIOT_PP_SUCCESSOR_198
RIOT_PP_SUCCESSOR_1980
RIOT_PP_SUCCESSOR_1981
RIOT_PP_SUCCESSOR_1982
RIOT_PP_SUCCESSOR_1983
RIOT_PP_SUCCESSOR_1984
RIOT_PP_SUCCESSOR_1985
RIOT_PP_SUCCESSOR_1986
RIOT_PP_SUCCESSOR_1987
RIOT_PP_SUCCESSOR_1988
RIOT_PP_SUCCESSOR_1989
RIOT_PP_SUCCESSOR_199
RIOT_PP_SUCCESSOR_1990
RIOT_PP_SUCCESSOR_1991
RIOT_PP_SUCCESSOR_1992
RIOT_PP_SUCCESSOR_1993
RIOT_PP_SUCCESSOR_1994
RIOT_PP_SUCCESSOR_1995
RIOT_PP_SUCCESSOR_1996
RIOT_PP_SUCCESSOR_1997
RIOT_PP_SUCCESSOR_1998
RIOT_PP_SUCCESSOR_1999
RIOT_PP_SUCCESSOR_2
RIOT_PP_SUCCESSOR_20
RIOT_PP_SUCCESSOR_200
RIOT_PP_SUCCESSOR_2000
RIOT_PP_SUCCESSOR_2001
RIOT_PP_SUCCESSOR_2002
RIOT_PP_SUCCESSOR_2003
RIOT_PP_SUCCESSOR_2004
RIOT_PP_SUCCESSOR_2005
RIOT_PP_SUCCESSOR_2006
RIOT_PP_SUCCESSOR_2007
RIOT_PP_SUCCESSOR_2008
RIOT_PP_SUCCESSOR_2009
RIOT_PP_SUCCESSOR_201
RIOT_PP_SUCCESSOR_2010
RIOT_PP_SUCCESSOR_2011
RIOT_PP_SUCCESSOR_2012
RIOT_PP_SUCCESSOR_2013
RIOT_PP_SUCCESSOR_2014
RIOT_PP_SUCCESSOR_2015
RIOT_PP_SUCCESSOR_2016
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RIOT_PP_SUCCESSOR_2018
RIOT_PP_SUCCESSOR_2019
RIOT_PP_SUCCESSOR_202
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RIOT_PP_SUCCESSOR_2068
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RIOT_PP_SUCCESSOR_9418
RIOT_PP_SUCCESSOR_9419
RIOT_PP_SUCCESSOR_942
RIOT_PP_SUCCESSOR_9420
RIOT_PP_SUCCESSOR_9421
RIOT_PP_SUCCESSOR_9422
RIOT_PP_SUCCESSOR_9423
RIOT_PP_SUCCESSOR_9424
RIOT_PP_SUCCESSOR_9425
RIOT_PP_SUCCESSOR_9426
RIOT_PP_SUCCESSOR_9427
RIOT_PP_SUCCESSOR_9428
RIOT_PP_SUCCESSOR_9429
RIOT_PP_SUCCESSOR_943
RIOT_PP_SUCCESSOR_9430
RIOT_PP_SUCCESSOR_9431
RIOT_PP_SUCCESSOR_9432
RIOT_PP_SUCCESSOR_9433
RIOT_PP_SUCCESSOR_9434
RIOT_PP_SUCCESSOR_9435
RIOT_PP_SUCCESSOR_9436
RIOT_PP_SUCCESSOR_9437
RIOT_PP_SUCCESSOR_9438
RIOT_PP_SUCCESSOR_9439
RIOT_PP_SUCCESSOR_944
RIOT_PP_SUCCESSOR_9440
RIOT_PP_SUCCESSOR_9441
RIOT_PP_SUCCESSOR_9442
RIOT_PP_SUCCESSOR_9443
RIOT_PP_SUCCESSOR_9444
RIOT_PP_SUCCESSOR_9445
RIOT_PP_SUCCESSOR_9446
RIOT_PP_SUCCESSOR_9447
RIOT_PP_SUCCESSOR_9448
RIOT_PP_SUCCESSOR_9449
RIOT_PP_SUCCESSOR_945
RIOT_PP_SUCCESSOR_9450
RIOT_PP_SUCCESSOR_9451
RIOT_PP_SUCCESSOR_9452
RIOT_PP_SUCCESSOR_9453
RIOT_PP_SUCCESSOR_9454
RIOT_PP_SUCCESSOR_9455
RIOT_PP_SUCCESSOR_9456
RIOT_PP_SUCCESSOR_9457
RIOT_PP_SUCCESSOR_9458
RIOT_PP_SUCCESSOR_9459
RIOT_PP_SUCCESSOR_946
RIOT_PP_SUCCESSOR_9460
RIOT_PP_SUCCESSOR_9461
RIOT_PP_SUCCESSOR_9462
RIOT_PP_SUCCESSOR_9463
RIOT_PP_SUCCESSOR_9464
RIOT_PP_SUCCESSOR_9465
RIOT_PP_SUCCESSOR_9466
RIOT_PP_SUCCESSOR_9467
RIOT_PP_SUCCESSOR_9468
RIOT_PP_SUCCESSOR_9469
RIOT_PP_SUCCESSOR_947
RIOT_PP_SUCCESSOR_9470
RIOT_PP_SUCCESSOR_9471
RIOT_PP_SUCCESSOR_9472
RIOT_PP_SUCCESSOR_9473
RIOT_PP_SUCCESSOR_9474
RIOT_PP_SUCCESSOR_9475
RIOT_PP_SUCCESSOR_9476
RIOT_PP_SUCCESSOR_9477
RIOT_PP_SUCCESSOR_9478
RIOT_PP_SUCCESSOR_9479
RIOT_PP_SUCCESSOR_948
RIOT_PP_SUCCESSOR_9480
RIOT_PP_SUCCESSOR_9481
RIOT_PP_SUCCESSOR_9482
RIOT_PP_SUCCESSOR_9483
RIOT_PP_SUCCESSOR_9484
RIOT_PP_SUCCESSOR_9485
RIOT_PP_SUCCESSOR_9486
RIOT_PP_SUCCESSOR_9487
RIOT_PP_SUCCESSOR_9488
RIOT_PP_SUCCESSOR_9489
RIOT_PP_SUCCESSOR_949
RIOT_PP_SUCCESSOR_9490
RIOT_PP_SUCCESSOR_9491
RIOT_PP_SUCCESSOR_9492
RIOT_PP_SUCCESSOR_9493
RIOT_PP_SUCCESSOR_9494
RIOT_PP_SUCCESSOR_9495
RIOT_PP_SUCCESSOR_9496
RIOT_PP_SUCCESSOR_9497
RIOT_PP_SUCCESSOR_9498
RIOT_PP_SUCCESSOR_9499
RIOT_PP_SUCCESSOR_95
RIOT_PP_SUCCESSOR_950
RIOT_PP_SUCCESSOR_9500
RIOT_PP_SUCCESSOR_9501
RIOT_PP_SUCCESSOR_9502
RIOT_PP_SUCCESSOR_9503
RIOT_PP_SUCCESSOR_9504
RIOT_PP_SUCCESSOR_9505
RIOT_PP_SUCCESSOR_9506
RIOT_PP_SUCCESSOR_9507
RIOT_PP_SUCCESSOR_9508
RIOT_PP_SUCCESSOR_9509
RIOT_PP_SUCCESSOR_951
RIOT_PP_SUCCESSOR_9510
RIOT_PP_SUCCESSOR_9511
RIOT_PP_SUCCESSOR_9512
RIOT_PP_SUCCESSOR_9513
RIOT_PP_SUCCESSOR_9514
RIOT_PP_SUCCESSOR_9515
RIOT_PP_SUCCESSOR_9516
RIOT_PP_SUCCESSOR_9517
RIOT_PP_SUCCESSOR_9518
RIOT_PP_SUCCESSOR_9519
RIOT_PP_SUCCESSOR_952
RIOT_PP_SUCCESSOR_9520
RIOT_PP_SUCCESSOR_9521
RIOT_PP_SUCCESSOR_9522
RIOT_PP_SUCCESSOR_9523
RIOT_PP_SUCCESSOR_9524
RIOT_PP_SUCCESSOR_9525
RIOT_PP_SUCCESSOR_9526
RIOT_PP_SUCCESSOR_9527
RIOT_PP_SUCCESSOR_9528
RIOT_PP_SUCCESSOR_9529
RIOT_PP_SUCCESSOR_953
RIOT_PP_SUCCESSOR_9530
RIOT_PP_SUCCESSOR_9531
RIOT_PP_SUCCESSOR_9532
RIOT_PP_SUCCESSOR_9533
RIOT_PP_SUCCESSOR_9534
RIOT_PP_SUCCESSOR_9535
RIOT_PP_SUCCESSOR_9536
RIOT_PP_SUCCESSOR_9537
RIOT_PP_SUCCESSOR_9538
RIOT_PP_SUCCESSOR_9539
RIOT_PP_SUCCESSOR_954
RIOT_PP_SUCCESSOR_9540
RIOT_PP_SUCCESSOR_9541
RIOT_PP_SUCCESSOR_9542
RIOT_PP_SUCCESSOR_9543
RIOT_PP_SUCCESSOR_9544
RIOT_PP_SUCCESSOR_9545
RIOT_PP_SUCCESSOR_9546
RIOT_PP_SUCCESSOR_9547
RIOT_PP_SUCCESSOR_9548
RIOT_PP_SUCCESSOR_9549
RIOT_PP_SUCCESSOR_955
RIOT_PP_SUCCESSOR_9550
RIOT_PP_SUCCESSOR_9551
RIOT_PP_SUCCESSOR_9552
RIOT_PP_SUCCESSOR_9553
RIOT_PP_SUCCESSOR_9554
RIOT_PP_SUCCESSOR_9555
RIOT_PP_SUCCESSOR_9556
RIOT_PP_SUCCESSOR_9557
RIOT_PP_SUCCESSOR_9558
RIOT_PP_SUCCESSOR_9559
RIOT_PP_SUCCESSOR_956
RIOT_PP_SUCCESSOR_9560
RIOT_PP_SUCCESSOR_9561
RIOT_PP_SUCCESSOR_9562
RIOT_PP_SUCCESSOR_9563
RIOT_PP_SUCCESSOR_9564
RIOT_PP_SUCCESSOR_9565
RIOT_PP_SUCCESSOR_9566
RIOT_PP_SUCCESSOR_9567
RIOT_PP_SUCCESSOR_9568
RIOT_PP_SUCCESSOR_9569
RIOT_PP_SUCCESSOR_957
RIOT_PP_SUCCESSOR_9570
RIOT_PP_SUCCESSOR_9571
RIOT_PP_SUCCESSOR_9572
RIOT_PP_SUCCESSOR_9573
RIOT_PP_SUCCESSOR_9574
RIOT_PP_SUCCESSOR_9575
RIOT_PP_SUCCESSOR_9576
RIOT_PP_SUCCESSOR_9577
RIOT_PP_SUCCESSOR_9578
RIOT_PP_SUCCESSOR_9579
RIOT_PP_SUCCESSOR_958
RIOT_PP_SUCCESSOR_9580
RIOT_PP_SUCCESSOR_9581
RIOT_PP_SUCCESSOR_9582
RIOT_PP_SUCCESSOR_9583
RIOT_PP_SUCCESSOR_9584
RIOT_PP_SUCCESSOR_9585
RIOT_PP_SUCCESSOR_9586
RIOT_PP_SUCCESSOR_9587
RIOT_PP_SUCCESSOR_9588
RIOT_PP_SUCCESSOR_9589
RIOT_PP_SUCCESSOR_959
RIOT_PP_SUCCESSOR_9590
RIOT_PP_SUCCESSOR_9591
RIOT_PP_SUCCESSOR_9592
RIOT_PP_SUCCESSOR_9593
RIOT_PP_SUCCESSOR_9594
RIOT_PP_SUCCESSOR_9595
RIOT_PP_SUCCESSOR_9596
RIOT_PP_SUCCESSOR_9597
RIOT_PP_SUCCESSOR_9598
RIOT_PP_SUCCESSOR_9599
RIOT_PP_SUCCESSOR_96
RIOT_PP_SUCCESSOR_960
RIOT_PP_SUCCESSOR_9600
RIOT_PP_SUCCESSOR_9601
RIOT_PP_SUCCESSOR_9602
RIOT_PP_SUCCESSOR_9603
RIOT_PP_SUCCESSOR_9604
RIOT_PP_SUCCESSOR_9605
RIOT_PP_SUCCESSOR_9606
RIOT_PP_SUCCESSOR_9607
RIOT_PP_SUCCESSOR_9608
RIOT_PP_SUCCESSOR_9609
RIOT_PP_SUCCESSOR_961
RIOT_PP_SUCCESSOR_9610
RIOT_PP_SUCCESSOR_9611
RIOT_PP_SUCCESSOR_9612
RIOT_PP_SUCCESSOR_9613
RIOT_PP_SUCCESSOR_9614
RIOT_PP_SUCCESSOR_9615
RIOT_PP_SUCCESSOR_9616
RIOT_PP_SUCCESSOR_9617
RIOT_PP_SUCCESSOR_9618
RIOT_PP_SUCCESSOR_9619
RIOT_PP_SUCCESSOR_962
RIOT_PP_SUCCESSOR_9620
RIOT_PP_SUCCESSOR_9621
RIOT_PP_SUCCESSOR_9622
RIOT_PP_SUCCESSOR_9623
RIOT_PP_SUCCESSOR_9624
RIOT_PP_SUCCESSOR_9625
RIOT_PP_SUCCESSOR_9626
RIOT_PP_SUCCESSOR_9627
RIOT_PP_SUCCESSOR_9628
RIOT_PP_SUCCESSOR_9629
RIOT_PP_SUCCESSOR_963
RIOT_PP_SUCCESSOR_9630
RIOT_PP_SUCCESSOR_9631
RIOT_PP_SUCCESSOR_9632
RIOT_PP_SUCCESSOR_9633
RIOT_PP_SUCCESSOR_9634
RIOT_PP_SUCCESSOR_9635
RIOT_PP_SUCCESSOR_9636
RIOT_PP_SUCCESSOR_9637
RIOT_PP_SUCCESSOR_9638
RIOT_PP_SUCCESSOR_9639
RIOT_PP_SUCCESSOR_964
RIOT_PP_SUCCESSOR_9640
RIOT_PP_SUCCESSOR_9641
RIOT_PP_SUCCESSOR_9642
RIOT_PP_SUCCESSOR_9643
RIOT_PP_SUCCESSOR_9644
RIOT_PP_SUCCESSOR_9645
RIOT_PP_SUCCESSOR_9646
RIOT_PP_SUCCESSOR_9647
RIOT_PP_SUCCESSOR_9648
RIOT_PP_SUCCESSOR_9649
RIOT_PP_SUCCESSOR_965
RIOT_PP_SUCCESSOR_9650
RIOT_PP_SUCCESSOR_9651
RIOT_PP_SUCCESSOR_9652
RIOT_PP_SUCCESSOR_9653
RIOT_PP_SUCCESSOR_9654
RIOT_PP_SUCCESSOR_9655
RIOT_PP_SUCCESSOR_9656
RIOT_PP_SUCCESSOR_9657
RIOT_PP_SUCCESSOR_9658
RIOT_PP_SUCCESSOR_9659
RIOT_PP_SUCCESSOR_966
RIOT_PP_SUCCESSOR_9660
RIOT_PP_SUCCESSOR_9661
RIOT_PP_SUCCESSOR_9662
RIOT_PP_SUCCESSOR_9663
RIOT_PP_SUCCESSOR_9664
RIOT_PP_SUCCESSOR_9665
RIOT_PP_SUCCESSOR_9666
RIOT_PP_SUCCESSOR_9667
RIOT_PP_SUCCESSOR_9668
RIOT_PP_SUCCESSOR_9669
RIOT_PP_SUCCESSOR_967
RIOT_PP_SUCCESSOR_9670
RIOT_PP_SUCCESSOR_9671
RIOT_PP_SUCCESSOR_9672
RIOT_PP_SUCCESSOR_9673
RIOT_PP_SUCCESSOR_9674
RIOT_PP_SUCCESSOR_9675
RIOT_PP_SUCCESSOR_9676
RIOT_PP_SUCCESSOR_9677
RIOT_PP_SUCCESSOR_9678
RIOT_PP_SUCCESSOR_9679
RIOT_PP_SUCCESSOR_968
RIOT_PP_SUCCESSOR_9680
RIOT_PP_SUCCESSOR_9681
RIOT_PP_SUCCESSOR_9682
RIOT_PP_SUCCESSOR_9683
RIOT_PP_SUCCESSOR_9684
RIOT_PP_SUCCESSOR_9685
RIOT_PP_SUCCESSOR_9686
RIOT_PP_SUCCESSOR_9687
RIOT_PP_SUCCESSOR_9688
RIOT_PP_SUCCESSOR_9689
RIOT_PP_SUCCESSOR_969
RIOT_PP_SUCCESSOR_9690
RIOT_PP_SUCCESSOR_9691
RIOT_PP_SUCCESSOR_9692
RIOT_PP_SUCCESSOR_9693
RIOT_PP_SUCCESSOR_9694
RIOT_PP_SUCCESSOR_9695
RIOT_PP_SUCCESSOR_9696
RIOT_PP_SUCCESSOR_9697
RIOT_PP_SUCCESSOR_9698
RIOT_PP_SUCCESSOR_9699
RIOT_PP_SUCCESSOR_97
RIOT_PP_SUCCESSOR_970
RIOT_PP_SUCCESSOR_9700
RIOT_PP_SUCCESSOR_9701
RIOT_PP_SUCCESSOR_9702
RIOT_PP_SUCCESSOR_9703
RIOT_PP_SUCCESSOR_9704
RIOT_PP_SUCCESSOR_9705
RIOT_PP_SUCCESSOR_9706
RIOT_PP_SUCCESSOR_9707
RIOT_PP_SUCCESSOR_9708
RIOT_PP_SUCCESSOR_9709
RIOT_PP_SUCCESSOR_971
RIOT_PP_SUCCESSOR_9710
RIOT_PP_SUCCESSOR_9711
RIOT_PP_SUCCESSOR_9712
RIOT_PP_SUCCESSOR_9713
RIOT_PP_SUCCESSOR_9714
RIOT_PP_SUCCESSOR_9715
RIOT_PP_SUCCESSOR_9716
RIOT_PP_SUCCESSOR_9717
RIOT_PP_SUCCESSOR_9718
RIOT_PP_SUCCESSOR_9719
RIOT_PP_SUCCESSOR_972
RIOT_PP_SUCCESSOR_9720
RIOT_PP_SUCCESSOR_9721
RIOT_PP_SUCCESSOR_9722
RIOT_PP_SUCCESSOR_9723
RIOT_PP_SUCCESSOR_9724
RIOT_PP_SUCCESSOR_9725
RIOT_PP_SUCCESSOR_9726
RIOT_PP_SUCCESSOR_9727
RIOT_PP_SUCCESSOR_9728
RIOT_PP_SUCCESSOR_9729
RIOT_PP_SUCCESSOR_973
RIOT_PP_SUCCESSOR_9730
RIOT_PP_SUCCESSOR_9731
RIOT_PP_SUCCESSOR_9732
RIOT_PP_SUCCESSOR_9733
RIOT_PP_SUCCESSOR_9734
RIOT_PP_SUCCESSOR_9735
RIOT_PP_SUCCESSOR_9736
RIOT_PP_SUCCESSOR_9737
RIOT_PP_SUCCESSOR_9738
RIOT_PP_SUCCESSOR_9739
RIOT_PP_SUCCESSOR_974
RIOT_PP_SUCCESSOR_9740
RIOT_PP_SUCCESSOR_9741
RIOT_PP_SUCCESSOR_9742
RIOT_PP_SUCCESSOR_9743
RIOT_PP_SUCCESSOR_9744
RIOT_PP_SUCCESSOR_9745
RIOT_PP_SUCCESSOR_9746
RIOT_PP_SUCCESSOR_9747
RIOT_PP_SUCCESSOR_9748
RIOT_PP_SUCCESSOR_9749
RIOT_PP_SUCCESSOR_975
RIOT_PP_SUCCESSOR_9750
RIOT_PP_SUCCESSOR_9751
RIOT_PP_SUCCESSOR_9752
RIOT_PP_SUCCESSOR_9753
RIOT_PP_SUCCESSOR_9754
RIOT_PP_SUCCESSOR_9755
RIOT_PP_SUCCESSOR_9756
RIOT_PP_SUCCESSOR_9757
RIOT_PP_SUCCESSOR_9758
RIOT_PP_SUCCESSOR_9759
RIOT_PP_SUCCESSOR_976
RIOT_PP_SUCCESSOR_9760
RIOT_PP_SUCCESSOR_9761
RIOT_PP_SUCCESSOR_9762
RIOT_PP_SUCCESSOR_9763
RIOT_PP_SUCCESSOR_9764
RIOT_PP_SUCCESSOR_9765
RIOT_PP_SUCCESSOR_9766
RIOT_PP_SUCCESSOR_9767
RIOT_PP_SUCCESSOR_9768
RIOT_PP_SUCCESSOR_9769
RIOT_PP_SUCCESSOR_977
RIOT_PP_SUCCESSOR_9770
RIOT_PP_SUCCESSOR_9771
RIOT_PP_SUCCESSOR_9772
RIOT_PP_SUCCESSOR_9773
RIOT_PP_SUCCESSOR_9774
RIOT_PP_SUCCESSOR_9775
RIOT_PP_SUCCESSOR_9776
RIOT_PP_SUCCESSOR_9777
RIOT_PP_SUCCESSOR_9778
RIOT_PP_SUCCESSOR_9779
RIOT_PP_SUCCESSOR_978
RIOT_PP_SUCCESSOR_9780
RIOT_PP_SUCCESSOR_9781
RIOT_PP_SUCCESSOR_9782
RIOT_PP_SUCCESSOR_9783
RIOT_PP_SUCCESSOR_9784
RIOT_PP_SUCCESSOR_9785
RIOT_PP_SUCCESSOR_9786
RIOT_PP_SUCCESSOR_9787
RIOT_PP_SUCCESSOR_9788
RIOT_PP_SUCCESSOR_9789
RIOT_PP_SUCCESSOR_979
RIOT_PP_SUCCESSOR_9790
RIOT_PP_SUCCESSOR_9791
RIOT_PP_SUCCESSOR_9792
RIOT_PP_SUCCESSOR_9793
RIOT_PP_SUCCESSOR_9794
RIOT_PP_SUCCESSOR_9795
RIOT_PP_SUCCESSOR_9796
RIOT_PP_SUCCESSOR_9797
RIOT_PP_SUCCESSOR_9798
RIOT_PP_SUCCESSOR_9799
RIOT_PP_SUCCESSOR_98
RIOT_PP_SUCCESSOR_980
RIOT_PP_SUCCESSOR_9800
RIOT_PP_SUCCESSOR_9801
RIOT_PP_SUCCESSOR_9802
RIOT_PP_SUCCESSOR_9803
RIOT_PP_SUCCESSOR_9804
RIOT_PP_SUCCESSOR_9805
RIOT_PP_SUCCESSOR_9806
RIOT_PP_SUCCESSOR_9807
RIOT_PP_SUCCESSOR_9808
RIOT_PP_SUCCESSOR_9809
RIOT_PP_SUCCESSOR_981
RIOT_PP_SUCCESSOR_9810
RIOT_PP_SUCCESSOR_9811
RIOT_PP_SUCCESSOR_9812
RIOT_PP_SUCCESSOR_9813
RIOT_PP_SUCCESSOR_9814
RIOT_PP_SUCCESSOR_9815
RIOT_PP_SUCCESSOR_9816
RIOT_PP_SUCCESSOR_9817
RIOT_PP_SUCCESSOR_9818
RIOT_PP_SUCCESSOR_9819
RIOT_PP_SUCCESSOR_982
RIOT_PP_SUCCESSOR_9820
RIOT_PP_SUCCESSOR_9821
RIOT_PP_SUCCESSOR_9822
RIOT_PP_SUCCESSOR_9823
RIOT_PP_SUCCESSOR_9824
RIOT_PP_SUCCESSOR_9825
RIOT_PP_SUCCESSOR_9826
RIOT_PP_SUCCESSOR_9827
RIOT_PP_SUCCESSOR_9828
RIOT_PP_SUCCESSOR_9829
RIOT_PP_SUCCESSOR_983
RIOT_PP_SUCCESSOR_9830
RIOT_PP_SUCCESSOR_9831
RIOT_PP_SUCCESSOR_9832
RIOT_PP_SUCCESSOR_9833
RIOT_PP_SUCCESSOR_9834
RIOT_PP_SUCCESSOR_9835
RIOT_PP_SUCCESSOR_9836
RIOT_PP_SUCCESSOR_9837
RIOT_PP_SUCCESSOR_9838
RIOT_PP_SUCCESSOR_9839
RIOT_PP_SUCCESSOR_984
RIOT_PP_SUCCESSOR_9840
RIOT_PP_SUCCESSOR_9841
RIOT_PP_SUCCESSOR_9842
RIOT_PP_SUCCESSOR_9843
RIOT_PP_SUCCESSOR_9844
RIOT_PP_SUCCESSOR_9845
RIOT_PP_SUCCESSOR_9846
RIOT_PP_SUCCESSOR_9847
RIOT_PP_SUCCESSOR_9848
RIOT_PP_SUCCESSOR_9849
RIOT_PP_SUCCESSOR_985
RIOT_PP_SUCCESSOR_9850
RIOT_PP_SUCCESSOR_9851
RIOT_PP_SUCCESSOR_9852
RIOT_PP_SUCCESSOR_9853
RIOT_PP_SUCCESSOR_9854
RIOT_PP_SUCCESSOR_9855
RIOT_PP_SUCCESSOR_9856
RIOT_PP_SUCCESSOR_9857
RIOT_PP_SUCCESSOR_9858
RIOT_PP_SUCCESSOR_9859
RIOT_PP_SUCCESSOR_986
RIOT_PP_SUCCESSOR_9860
RIOT_PP_SUCCESSOR_9861
RIOT_PP_SUCCESSOR_9862
RIOT_PP_SUCCESSOR_9863
RIOT_PP_SUCCESSOR_9864
RIOT_PP_SUCCESSOR_9865
RIOT_PP_SUCCESSOR_9866
RIOT_PP_SUCCESSOR_9867
RIOT_PP_SUCCESSOR_9868
RIOT_PP_SUCCESSOR_9869
RIOT_PP_SUCCESSOR_987
RIOT_PP_SUCCESSOR_9870
RIOT_PP_SUCCESSOR_9871
RIOT_PP_SUCCESSOR_9872
RIOT_PP_SUCCESSOR_9873
RIOT_PP_SUCCESSOR_9874
RIOT_PP_SUCCESSOR_9875
RIOT_PP_SUCCESSOR_9876
RIOT_PP_SUCCESSOR_9877
RIOT_PP_SUCCESSOR_9878
RIOT_PP_SUCCESSOR_9879
RIOT_PP_SUCCESSOR_988
RIOT_PP_SUCCESSOR_9880
RIOT_PP_SUCCESSOR_9881
RIOT_PP_SUCCESSOR_9882
RIOT_PP_SUCCESSOR_9883
RIOT_PP_SUCCESSOR_9884
RIOT_PP_SUCCESSOR_9885
RIOT_PP_SUCCESSOR_9886
RIOT_PP_SUCCESSOR_9887
RIOT_PP_SUCCESSOR_9888
RIOT_PP_SUCCESSOR_9889
RIOT_PP_SUCCESSOR_989
RIOT_PP_SUCCESSOR_9890
RIOT_PP_SUCCESSOR_9891
RIOT_PP_SUCCESSOR_9892
RIOT_PP_SUCCESSOR_9893
RIOT_PP_SUCCESSOR_9894
RIOT_PP_SUCCESSOR_9895
RIOT_PP_SUCCESSOR_9896
RIOT_PP_SUCCESSOR_9897
RIOT_PP_SUCCESSOR_9898
RIOT_PP_SUCCESSOR_9899
RIOT_PP_SUCCESSOR_99
RIOT_PP_SUCCESSOR_990
RIOT_PP_SUCCESSOR_9900
RIOT_PP_SUCCESSOR_9901
RIOT_PP_SUCCESSOR_9902
RIOT_PP_SUCCESSOR_9903
RIOT_PP_SUCCESSOR_9904
RIOT_PP_SUCCESSOR_9905
RIOT_PP_SUCCESSOR_9906
RIOT_PP_SUCCESSOR_9907
RIOT_PP_SUCCESSOR_9908
RIOT_PP_SUCCESSOR_9909
RIOT_PP_SUCCESSOR_991
RIOT_PP_SUCCESSOR_9910
RIOT_PP_SUCCESSOR_9911
RIOT_PP_SUCCESSOR_9912
RIOT_PP_SUCCESSOR_9913
RIOT_PP_SUCCESSOR_9914
RIOT_PP_SUCCESSOR_9915
RIOT_PP_SUCCESSOR_9916
RIOT_PP_SUCCESSOR_9917
RIOT_PP_SUCCESSOR_9918
RIOT_PP_SUCCESSOR_9919
RIOT_PP_SUCCESSOR_992
RIOT_PP_SUCCESSOR_9920
RIOT_PP_SUCCESSOR_9921
RIOT_PP_SUCCESSOR_9922
RIOT_PP_SUCCESSOR_9923
RIOT_PP_SUCCESSOR_9924
RIOT_PP_SUCCESSOR_9925
RIOT_PP_SUCCESSOR_9926
RIOT_PP_SUCCESSOR_9927
RIOT_PP_SUCCESSOR_9928
RIOT_PP_SUCCESSOR_9929
RIOT_PP_SUCCESSOR_993
RIOT_PP_SUCCESSOR_9930
RIOT_PP_SUCCESSOR_9931
RIOT_PP_SUCCESSOR_9932
RIOT_PP_SUCCESSOR_9933
RIOT_PP_SUCCESSOR_9934
RIOT_PP_SUCCESSOR_9935
RIOT_PP_SUCCESSOR_9936
RIOT_PP_SUCCESSOR_9937
RIOT_PP_SUCCESSOR_9938
RIOT_PP_SUCCESSOR_9939
RIOT_PP_SUCCESSOR_994
RIOT_PP_SUCCESSOR_9940
RIOT_PP_SUCCESSOR_9941
RIOT_PP_SUCCESSOR_9942
RIOT_PP_SUCCESSOR_9943
RIOT_PP_SUCCESSOR_9944
RIOT_PP_SUCCESSOR_9945
RIOT_PP_SUCCESSOR_9946
RIOT_PP_SUCCESSOR_9947
RIOT_PP_SUCCESSOR_9948
RIOT_PP_SUCCESSOR_9949
RIOT_PP_SUCCESSOR_995
RIOT_PP_SUCCESSOR_9950
RIOT_PP_SUCCESSOR_9951
RIOT_PP_SUCCESSOR_9952
RIOT_PP_SUCCESSOR_9953
RIOT_PP_SUCCESSOR_9954
RIOT_PP_SUCCESSOR_9955
RIOT_PP_SUCCESSOR_9956
RIOT_PP_SUCCESSOR_9957
RIOT_PP_SUCCESSOR_9958
RIOT_PP_SUCCESSOR_9959
RIOT_PP_SUCCESSOR_996
RIOT_PP_SUCCESSOR_9960
RIOT_PP_SUCCESSOR_9961
RIOT_PP_SUCCESSOR_9962
RIOT_PP_SUCCESSOR_9963
RIOT_PP_SUCCESSOR_9964
RIOT_PP_SUCCESSOR_9965
RIOT_PP_SUCCESSOR_9966
RIOT_PP_SUCCESSOR_9967
RIOT_PP_SUCCESSOR_9968
RIOT_PP_SUCCESSOR_9969
RIOT_PP_SUCCESSOR_997
RIOT_PP_SUCCESSOR_9970
RIOT_PP_SUCCESSOR_9971
RIOT_PP_SUCCESSOR_9972
RIOT_PP_SUCCESSOR_9973
RIOT_PP_SUCCESSOR_9974
RIOT_PP_SUCCESSOR_9975
RIOT_PP_SUCCESSOR_9976
RIOT_PP_SUCCESSOR_9977
RIOT_PP_SUCCESSOR_9978
RIOT_PP_SUCCESSOR_9979
RIOT_PP_SUCCESSOR_998
RIOT_PP_SUCCESSOR_9980
RIOT_PP_SUCCESSOR_9981
RIOT_PP_SUCCESSOR_9982
RIOT_PP_SUCCESSOR_9983
RIOT_PP_SUCCESSOR_9984
RIOT_PP_SUCCESSOR_9985
RIOT_PP_SUCCESSOR_9986
RIOT_PP_SUCCESSOR_9987
RIOT_PP_SUCCESSOR_9988
RIOT_PP_SUCCESSOR_9989
RIOT_PP_SUCCESSOR_999
RIOT_PP_SUCCESSOR_9990
RIOT_PP_SUCCESSOR_9991
RIOT_PP_SUCCESSOR_9992
RIOT_PP_SUCCESSOR_9993
RIOT_PP_SUCCESSOR_9994
RIOT_PP_SUCCESSOR_9995
RIOT_PP_SUCCESSOR_9996
RIOT_PP_SUCCESSOR_9997
RIOT_PP_SUCCESSOR_9998
RIOT_PP_SUCCESSOR_9999
RIOT_PP_SUCCESSOR_MAX
RIOT_VERSION
RNG_CONFIG_DERCEN_Disabled
RNG_CONFIG_DERCEN_Enabled
RNG_CONFIG_DERCEN_Msk
RNG_CONFIG_DERCEN_Pos
RNG_COUNT
RNG_EVENTS_VALRDY_EVENTS_VALRDY_Generated
RNG_EVENTS_VALRDY_EVENTS_VALRDY_Msk
RNG_EVENTS_VALRDY_EVENTS_VALRDY_NotGenerated
RNG_EVENTS_VALRDY_EVENTS_VALRDY_Pos
RNG_INTENCLR_VALRDY_Clear
RNG_INTENCLR_VALRDY_Disabled
RNG_INTENCLR_VALRDY_Enabled
RNG_INTENCLR_VALRDY_Msk
RNG_INTENCLR_VALRDY_Pos
RNG_INTENSET_VALRDY_Disabled
RNG_INTENSET_VALRDY_Enabled
RNG_INTENSET_VALRDY_Msk
RNG_INTENSET_VALRDY_Pos
RNG_INTENSET_VALRDY_Set
RNG_SHORTS_VALRDY_STOP_Disabled
RNG_SHORTS_VALRDY_STOP_Enabled
RNG_SHORTS_VALRDY_STOP_Msk
RNG_SHORTS_VALRDY_STOP_Pos
RNG_TASKS_START_TASKS_START_Msk
RNG_TASKS_START_TASKS_START_Pos
RNG_TASKS_START_TASKS_START_Trigger
RNG_TASKS_STOP_TASKS_STOP_Msk
RNG_TASKS_STOP_TASKS_STOP_Pos
RNG_TASKS_STOP_TASKS_STOP_Trigger
RNG_VALUE_VALUE_Msk
RNG_VALUE_VALUE_Pos
RTC0_CC_NUM
RTC1_CC_NUM
RTC2_CC_NUM
RTC_CC_COMPARE_Msk
RTC_CC_COMPARE_Pos
RTC_COUNT
RTC_COUNTER_COUNTER_Msk
RTC_COUNTER_COUNTER_Pos
RTC_EVENTS_COMPARE_EVENTS_COMPARE_Generated
RTC_EVENTS_COMPARE_EVENTS_COMPARE_Msk
RTC_EVENTS_COMPARE_EVENTS_COMPARE_NotGenerated
RTC_EVENTS_COMPARE_EVENTS_COMPARE_Pos
RTC_EVENTS_OVRFLW_EVENTS_OVRFLW_Generated
RTC_EVENTS_OVRFLW_EVENTS_OVRFLW_Msk
RTC_EVENTS_OVRFLW_EVENTS_OVRFLW_NotGenerated
RTC_EVENTS_OVRFLW_EVENTS_OVRFLW_Pos
RTC_EVENTS_TICK_EVENTS_TICK_Generated
RTC_EVENTS_TICK_EVENTS_TICK_Msk
RTC_EVENTS_TICK_EVENTS_TICK_NotGenerated
RTC_EVENTS_TICK_EVENTS_TICK_Pos
RTC_EVTENCLR_COMPARE0_Clear
RTC_EVTENCLR_COMPARE0_Disabled
RTC_EVTENCLR_COMPARE0_Enabled
RTC_EVTENCLR_COMPARE0_Msk
RTC_EVTENCLR_COMPARE0_Pos
RTC_EVTENCLR_COMPARE1_Clear
RTC_EVTENCLR_COMPARE1_Disabled
RTC_EVTENCLR_COMPARE1_Enabled
RTC_EVTENCLR_COMPARE1_Msk
RTC_EVTENCLR_COMPARE1_Pos
RTC_EVTENCLR_COMPARE2_Clear
RTC_EVTENCLR_COMPARE2_Disabled
RTC_EVTENCLR_COMPARE2_Enabled
RTC_EVTENCLR_COMPARE2_Msk
RTC_EVTENCLR_COMPARE2_Pos
RTC_EVTENCLR_COMPARE3_Clear
RTC_EVTENCLR_COMPARE3_Disabled
RTC_EVTENCLR_COMPARE3_Enabled
RTC_EVTENCLR_COMPARE3_Msk
RTC_EVTENCLR_COMPARE3_Pos
RTC_EVTENCLR_OVRFLW_Clear
RTC_EVTENCLR_OVRFLW_Disabled
RTC_EVTENCLR_OVRFLW_Enabled
RTC_EVTENCLR_OVRFLW_Msk
RTC_EVTENCLR_OVRFLW_Pos
RTC_EVTENCLR_TICK_Clear
RTC_EVTENCLR_TICK_Disabled
RTC_EVTENCLR_TICK_Enabled
RTC_EVTENCLR_TICK_Msk
RTC_EVTENCLR_TICK_Pos
RTC_EVTENSET_COMPARE0_Disabled
RTC_EVTENSET_COMPARE0_Enabled
RTC_EVTENSET_COMPARE0_Msk
RTC_EVTENSET_COMPARE0_Pos
RTC_EVTENSET_COMPARE0_Set
RTC_EVTENSET_COMPARE1_Disabled
RTC_EVTENSET_COMPARE1_Enabled
RTC_EVTENSET_COMPARE1_Msk
RTC_EVTENSET_COMPARE1_Pos
RTC_EVTENSET_COMPARE1_Set
RTC_EVTENSET_COMPARE2_Disabled
RTC_EVTENSET_COMPARE2_Enabled
RTC_EVTENSET_COMPARE2_Msk
RTC_EVTENSET_COMPARE2_Pos
RTC_EVTENSET_COMPARE2_Set
RTC_EVTENSET_COMPARE3_Disabled
RTC_EVTENSET_COMPARE3_Enabled
RTC_EVTENSET_COMPARE3_Msk
RTC_EVTENSET_COMPARE3_Pos
RTC_EVTENSET_COMPARE3_Set
RTC_EVTENSET_OVRFLW_Disabled
RTC_EVTENSET_OVRFLW_Enabled
RTC_EVTENSET_OVRFLW_Msk
RTC_EVTENSET_OVRFLW_Pos
RTC_EVTENSET_OVRFLW_Set
RTC_EVTENSET_TICK_Disabled
RTC_EVTENSET_TICK_Enabled
RTC_EVTENSET_TICK_Msk
RTC_EVTENSET_TICK_Pos
RTC_EVTENSET_TICK_Set
RTC_EVTEN_COMPARE0_Disabled
RTC_EVTEN_COMPARE0_Enabled
RTC_EVTEN_COMPARE0_Msk
RTC_EVTEN_COMPARE0_Pos
RTC_EVTEN_COMPARE1_Disabled
RTC_EVTEN_COMPARE1_Enabled
RTC_EVTEN_COMPARE1_Msk
RTC_EVTEN_COMPARE1_Pos
RTC_EVTEN_COMPARE2_Disabled
RTC_EVTEN_COMPARE2_Enabled
RTC_EVTEN_COMPARE2_Msk
RTC_EVTEN_COMPARE2_Pos
RTC_EVTEN_COMPARE3_Disabled
RTC_EVTEN_COMPARE3_Enabled
RTC_EVTEN_COMPARE3_Msk
RTC_EVTEN_COMPARE3_Pos
RTC_EVTEN_OVRFLW_Disabled
RTC_EVTEN_OVRFLW_Enabled
RTC_EVTEN_OVRFLW_Msk
RTC_EVTEN_OVRFLW_Pos
RTC_EVTEN_TICK_Disabled
RTC_EVTEN_TICK_Enabled
RTC_EVTEN_TICK_Msk
RTC_EVTEN_TICK_Pos
RTC_INTENCLR_COMPARE0_Clear
RTC_INTENCLR_COMPARE0_Disabled
RTC_INTENCLR_COMPARE0_Enabled
RTC_INTENCLR_COMPARE0_Msk
RTC_INTENCLR_COMPARE0_Pos
RTC_INTENCLR_COMPARE1_Clear
RTC_INTENCLR_COMPARE1_Disabled
RTC_INTENCLR_COMPARE1_Enabled
RTC_INTENCLR_COMPARE1_Msk
RTC_INTENCLR_COMPARE1_Pos
RTC_INTENCLR_COMPARE2_Clear
RTC_INTENCLR_COMPARE2_Disabled
RTC_INTENCLR_COMPARE2_Enabled
RTC_INTENCLR_COMPARE2_Msk
RTC_INTENCLR_COMPARE2_Pos
RTC_INTENCLR_COMPARE3_Clear
RTC_INTENCLR_COMPARE3_Disabled
RTC_INTENCLR_COMPARE3_Enabled
RTC_INTENCLR_COMPARE3_Msk
RTC_INTENCLR_COMPARE3_Pos
RTC_INTENCLR_OVRFLW_Clear
RTC_INTENCLR_OVRFLW_Disabled
RTC_INTENCLR_OVRFLW_Enabled
RTC_INTENCLR_OVRFLW_Msk
RTC_INTENCLR_OVRFLW_Pos
RTC_INTENCLR_TICK_Clear
RTC_INTENCLR_TICK_Disabled
RTC_INTENCLR_TICK_Enabled
RTC_INTENCLR_TICK_Msk
RTC_INTENCLR_TICK_Pos
RTC_INTENSET_COMPARE0_Disabled
RTC_INTENSET_COMPARE0_Enabled
RTC_INTENSET_COMPARE0_Msk
RTC_INTENSET_COMPARE0_Pos
RTC_INTENSET_COMPARE0_Set
RTC_INTENSET_COMPARE1_Disabled
RTC_INTENSET_COMPARE1_Enabled
RTC_INTENSET_COMPARE1_Msk
RTC_INTENSET_COMPARE1_Pos
RTC_INTENSET_COMPARE1_Set
RTC_INTENSET_COMPARE2_Disabled
RTC_INTENSET_COMPARE2_Enabled
RTC_INTENSET_COMPARE2_Msk
RTC_INTENSET_COMPARE2_Pos
RTC_INTENSET_COMPARE2_Set
RTC_INTENSET_COMPARE3_Disabled
RTC_INTENSET_COMPARE3_Enabled
RTC_INTENSET_COMPARE3_Msk
RTC_INTENSET_COMPARE3_Pos
RTC_INTENSET_COMPARE3_Set
RTC_INTENSET_OVRFLW_Disabled
RTC_INTENSET_OVRFLW_Enabled
RTC_INTENSET_OVRFLW_Msk
RTC_INTENSET_OVRFLW_Pos
RTC_INTENSET_OVRFLW_Set
RTC_INTENSET_TICK_Disabled
RTC_INTENSET_TICK_Enabled
RTC_INTENSET_TICK_Msk
RTC_INTENSET_TICK_Pos
RTC_INTENSET_TICK_Set
RTC_PRESCALER_PRESCALER_Msk
RTC_PRESCALER_PRESCALER_Pos
RTC_TASKS_CLEAR_TASKS_CLEAR_Msk
RTC_TASKS_CLEAR_TASKS_CLEAR_Pos
RTC_TASKS_CLEAR_TASKS_CLEAR_Trigger
RTC_TASKS_START_TASKS_START_Msk
RTC_TASKS_START_TASKS_START_Pos
RTC_TASKS_START_TASKS_START_Trigger
RTC_TASKS_STOP_TASKS_STOP_Msk
RTC_TASKS_STOP_TASKS_STOP_Pos
RTC_TASKS_STOP_TASKS_STOP_Trigger
RTC_TASKS_TRIGOVRFLW_TASKS_TRIGOVRFLW_Msk
RTC_TASKS_TRIGOVRFLW_TASKS_TRIGOVRFLW_Pos
RTC_TASKS_TRIGOVRFLW_TASKS_TRIGOVRFLW_Trigger
RTT_CLOCK_FREQUENCY
RTT_DEV
RTT_MAX_FREQUENCY
RTT_MAX_VALUE
RTT_MIN_FREQUENCY
RTT_MIN_OFFSET
R_OK
SAADC_CH_CONFIG_BURST_Disabled
SAADC_CH_CONFIG_BURST_Enabled
SAADC_CH_CONFIG_BURST_Msk
SAADC_CH_CONFIG_BURST_Pos
SAADC_CH_CONFIG_GAIN_Gain1
SAADC_CH_CONFIG_GAIN_Gain1_2
SAADC_CH_CONFIG_GAIN_Gain1_3
SAADC_CH_CONFIG_GAIN_Gain1_4
SAADC_CH_CONFIG_GAIN_Gain1_5
SAADC_CH_CONFIG_GAIN_Gain1_6
SAADC_CH_CONFIG_GAIN_Gain2
SAADC_CH_CONFIG_GAIN_Gain4
SAADC_CH_CONFIG_GAIN_Msk
SAADC_CH_CONFIG_GAIN_Pos
SAADC_CH_CONFIG_MODE_Diff
SAADC_CH_CONFIG_MODE_Msk
SAADC_CH_CONFIG_MODE_Pos
SAADC_CH_CONFIG_MODE_SE
SAADC_CH_CONFIG_REFSEL_Internal
SAADC_CH_CONFIG_REFSEL_Msk
SAADC_CH_CONFIG_REFSEL_Pos
SAADC_CH_CONFIG_REFSEL_VDD1_4
SAADC_CH_CONFIG_RESN_Bypass
SAADC_CH_CONFIG_RESN_Msk
SAADC_CH_CONFIG_RESN_Pos
SAADC_CH_CONFIG_RESN_Pulldown
SAADC_CH_CONFIG_RESN_Pullup
SAADC_CH_CONFIG_RESN_VDD1_2
SAADC_CH_CONFIG_RESP_Bypass
SAADC_CH_CONFIG_RESP_Msk
SAADC_CH_CONFIG_RESP_Pos
SAADC_CH_CONFIG_RESP_Pulldown
SAADC_CH_CONFIG_RESP_Pullup
SAADC_CH_CONFIG_RESP_VDD1_2
SAADC_CH_CONFIG_TACQ_10us
SAADC_CH_CONFIG_TACQ_15us
SAADC_CH_CONFIG_TACQ_20us
SAADC_CH_CONFIG_TACQ_3us
SAADC_CH_CONFIG_TACQ_40us
SAADC_CH_CONFIG_TACQ_5us
SAADC_CH_CONFIG_TACQ_Msk
SAADC_CH_CONFIG_TACQ_Pos
SAADC_CH_LIMIT_HIGH_Msk
SAADC_CH_LIMIT_HIGH_Pos
SAADC_CH_LIMIT_LOW_Msk
SAADC_CH_LIMIT_LOW_Pos
SAADC_CH_NUM
SAADC_CH_PSELN_PSELN_AnalogInput0
SAADC_CH_PSELN_PSELN_AnalogInput1
SAADC_CH_PSELN_PSELN_AnalogInput2
SAADC_CH_PSELN_PSELN_AnalogInput3
SAADC_CH_PSELN_PSELN_AnalogInput4
SAADC_CH_PSELN_PSELN_AnalogInput5
SAADC_CH_PSELN_PSELN_AnalogInput6
SAADC_CH_PSELN_PSELN_AnalogInput7
SAADC_CH_PSELN_PSELN_Msk
SAADC_CH_PSELN_PSELN_NC
SAADC_CH_PSELN_PSELN_Pos
SAADC_CH_PSELN_PSELN_VDD
SAADC_CH_PSELN_PSELN_VDDHDIV5
SAADC_CH_PSELP_PSELP_AnalogInput0
SAADC_CH_PSELP_PSELP_AnalogInput1
SAADC_CH_PSELP_PSELP_AnalogInput2
SAADC_CH_PSELP_PSELP_AnalogInput3
SAADC_CH_PSELP_PSELP_AnalogInput4
SAADC_CH_PSELP_PSELP_AnalogInput5
SAADC_CH_PSELP_PSELP_AnalogInput6
SAADC_CH_PSELP_PSELP_AnalogInput7
SAADC_CH_PSELP_PSELP_Msk
SAADC_CH_PSELP_PSELP_NC
SAADC_CH_PSELP_PSELP_Pos
SAADC_CH_PSELP_PSELP_VDD
SAADC_CH_PSELP_PSELP_VDDHDIV5
SAADC_COUNT
SAADC_EASYDMA_MAXCNT_SIZE
SAADC_ENABLE_ENABLE_Disabled
SAADC_ENABLE_ENABLE_Enabled
SAADC_ENABLE_ENABLE_Msk
SAADC_ENABLE_ENABLE_Pos
SAADC_EVENTS_CALIBRATEDONE_EVENTS_CALIBRATEDONE_Generated
SAADC_EVENTS_CALIBRATEDONE_EVENTS_CALIBRATEDONE_Msk
SAADC_EVENTS_CALIBRATEDONE_EVENTS_CALIBRATEDONE_NotGenerated
SAADC_EVENTS_CALIBRATEDONE_EVENTS_CALIBRATEDONE_Pos
SAADC_EVENTS_CH_LIMITH_LIMITH_Generated
SAADC_EVENTS_CH_LIMITH_LIMITH_Msk
SAADC_EVENTS_CH_LIMITH_LIMITH_NotGenerated
SAADC_EVENTS_CH_LIMITH_LIMITH_Pos
SAADC_EVENTS_CH_LIMITL_LIMITL_Generated
SAADC_EVENTS_CH_LIMITL_LIMITL_Msk
SAADC_EVENTS_CH_LIMITL_LIMITL_NotGenerated
SAADC_EVENTS_CH_LIMITL_LIMITL_Pos
SAADC_EVENTS_DONE_EVENTS_DONE_Generated
SAADC_EVENTS_DONE_EVENTS_DONE_Msk
SAADC_EVENTS_DONE_EVENTS_DONE_NotGenerated
SAADC_EVENTS_DONE_EVENTS_DONE_Pos
SAADC_EVENTS_END_EVENTS_END_Generated
SAADC_EVENTS_END_EVENTS_END_Msk
SAADC_EVENTS_END_EVENTS_END_NotGenerated
SAADC_EVENTS_END_EVENTS_END_Pos
SAADC_EVENTS_RESULTDONE_EVENTS_RESULTDONE_Generated
SAADC_EVENTS_RESULTDONE_EVENTS_RESULTDONE_Msk
SAADC_EVENTS_RESULTDONE_EVENTS_RESULTDONE_NotGenerated
SAADC_EVENTS_RESULTDONE_EVENTS_RESULTDONE_Pos
SAADC_EVENTS_STARTED_EVENTS_STARTED_Generated
SAADC_EVENTS_STARTED_EVENTS_STARTED_Msk
SAADC_EVENTS_STARTED_EVENTS_STARTED_NotGenerated
SAADC_EVENTS_STARTED_EVENTS_STARTED_Pos
SAADC_EVENTS_STOPPED_EVENTS_STOPPED_Generated
SAADC_EVENTS_STOPPED_EVENTS_STOPPED_Msk
SAADC_EVENTS_STOPPED_EVENTS_STOPPED_NotGenerated
SAADC_EVENTS_STOPPED_EVENTS_STOPPED_Pos
SAADC_INTENCLR_CALIBRATEDONE_Clear
SAADC_INTENCLR_CALIBRATEDONE_Disabled
SAADC_INTENCLR_CALIBRATEDONE_Enabled
SAADC_INTENCLR_CALIBRATEDONE_Msk
SAADC_INTENCLR_CALIBRATEDONE_Pos
SAADC_INTENCLR_CH0LIMITH_Clear
SAADC_INTENCLR_CH0LIMITH_Disabled
SAADC_INTENCLR_CH0LIMITH_Enabled
SAADC_INTENCLR_CH0LIMITH_Msk
SAADC_INTENCLR_CH0LIMITH_Pos
SAADC_INTENCLR_CH0LIMITL_Clear
SAADC_INTENCLR_CH0LIMITL_Disabled
SAADC_INTENCLR_CH0LIMITL_Enabled
SAADC_INTENCLR_CH0LIMITL_Msk
SAADC_INTENCLR_CH0LIMITL_Pos
SAADC_INTENCLR_CH1LIMITH_Clear
SAADC_INTENCLR_CH1LIMITH_Disabled
SAADC_INTENCLR_CH1LIMITH_Enabled
SAADC_INTENCLR_CH1LIMITH_Msk
SAADC_INTENCLR_CH1LIMITH_Pos
SAADC_INTENCLR_CH1LIMITL_Clear
SAADC_INTENCLR_CH1LIMITL_Disabled
SAADC_INTENCLR_CH1LIMITL_Enabled
SAADC_INTENCLR_CH1LIMITL_Msk
SAADC_INTENCLR_CH1LIMITL_Pos
SAADC_INTENCLR_CH2LIMITH_Clear
SAADC_INTENCLR_CH2LIMITH_Disabled
SAADC_INTENCLR_CH2LIMITH_Enabled
SAADC_INTENCLR_CH2LIMITH_Msk
SAADC_INTENCLR_CH2LIMITH_Pos
SAADC_INTENCLR_CH2LIMITL_Clear
SAADC_INTENCLR_CH2LIMITL_Disabled
SAADC_INTENCLR_CH2LIMITL_Enabled
SAADC_INTENCLR_CH2LIMITL_Msk
SAADC_INTENCLR_CH2LIMITL_Pos
SAADC_INTENCLR_CH3LIMITH_Clear
SAADC_INTENCLR_CH3LIMITH_Disabled
SAADC_INTENCLR_CH3LIMITH_Enabled
SAADC_INTENCLR_CH3LIMITH_Msk
SAADC_INTENCLR_CH3LIMITH_Pos
SAADC_INTENCLR_CH3LIMITL_Clear
SAADC_INTENCLR_CH3LIMITL_Disabled
SAADC_INTENCLR_CH3LIMITL_Enabled
SAADC_INTENCLR_CH3LIMITL_Msk
SAADC_INTENCLR_CH3LIMITL_Pos
SAADC_INTENCLR_CH4LIMITH_Clear
SAADC_INTENCLR_CH4LIMITH_Disabled
SAADC_INTENCLR_CH4LIMITH_Enabled
SAADC_INTENCLR_CH4LIMITH_Msk
SAADC_INTENCLR_CH4LIMITH_Pos
SAADC_INTENCLR_CH4LIMITL_Clear
SAADC_INTENCLR_CH4LIMITL_Disabled
SAADC_INTENCLR_CH4LIMITL_Enabled
SAADC_INTENCLR_CH4LIMITL_Msk
SAADC_INTENCLR_CH4LIMITL_Pos
SAADC_INTENCLR_CH5LIMITH_Clear
SAADC_INTENCLR_CH5LIMITH_Disabled
SAADC_INTENCLR_CH5LIMITH_Enabled
SAADC_INTENCLR_CH5LIMITH_Msk
SAADC_INTENCLR_CH5LIMITH_Pos
SAADC_INTENCLR_CH5LIMITL_Clear
SAADC_INTENCLR_CH5LIMITL_Disabled
SAADC_INTENCLR_CH5LIMITL_Enabled
SAADC_INTENCLR_CH5LIMITL_Msk
SAADC_INTENCLR_CH5LIMITL_Pos
SAADC_INTENCLR_CH6LIMITH_Clear
SAADC_INTENCLR_CH6LIMITH_Disabled
SAADC_INTENCLR_CH6LIMITH_Enabled
SAADC_INTENCLR_CH6LIMITH_Msk
SAADC_INTENCLR_CH6LIMITH_Pos
SAADC_INTENCLR_CH6LIMITL_Clear
SAADC_INTENCLR_CH6LIMITL_Disabled
SAADC_INTENCLR_CH6LIMITL_Enabled
SAADC_INTENCLR_CH6LIMITL_Msk
SAADC_INTENCLR_CH6LIMITL_Pos
SAADC_INTENCLR_CH7LIMITH_Clear
SAADC_INTENCLR_CH7LIMITH_Disabled
SAADC_INTENCLR_CH7LIMITH_Enabled
SAADC_INTENCLR_CH7LIMITH_Msk
SAADC_INTENCLR_CH7LIMITH_Pos
SAADC_INTENCLR_CH7LIMITL_Clear
SAADC_INTENCLR_CH7LIMITL_Disabled
SAADC_INTENCLR_CH7LIMITL_Enabled
SAADC_INTENCLR_CH7LIMITL_Msk
SAADC_INTENCLR_CH7LIMITL_Pos
SAADC_INTENCLR_DONE_Clear
SAADC_INTENCLR_DONE_Disabled
SAADC_INTENCLR_DONE_Enabled
SAADC_INTENCLR_DONE_Msk
SAADC_INTENCLR_DONE_Pos
SAADC_INTENCLR_END_Clear
SAADC_INTENCLR_END_Disabled
SAADC_INTENCLR_END_Enabled
SAADC_INTENCLR_END_Msk
SAADC_INTENCLR_END_Pos
SAADC_INTENCLR_RESULTDONE_Clear
SAADC_INTENCLR_RESULTDONE_Disabled
SAADC_INTENCLR_RESULTDONE_Enabled
SAADC_INTENCLR_RESULTDONE_Msk
SAADC_INTENCLR_RESULTDONE_Pos
SAADC_INTENCLR_STARTED_Clear
SAADC_INTENCLR_STARTED_Disabled
SAADC_INTENCLR_STARTED_Enabled
SAADC_INTENCLR_STARTED_Msk
SAADC_INTENCLR_STARTED_Pos
SAADC_INTENCLR_STOPPED_Clear
SAADC_INTENCLR_STOPPED_Disabled
SAADC_INTENCLR_STOPPED_Enabled
SAADC_INTENCLR_STOPPED_Msk
SAADC_INTENCLR_STOPPED_Pos
SAADC_INTENSET_CALIBRATEDONE_Disabled
SAADC_INTENSET_CALIBRATEDONE_Enabled
SAADC_INTENSET_CALIBRATEDONE_Msk
SAADC_INTENSET_CALIBRATEDONE_Pos
SAADC_INTENSET_CALIBRATEDONE_Set
SAADC_INTENSET_CH0LIMITH_Disabled
SAADC_INTENSET_CH0LIMITH_Enabled
SAADC_INTENSET_CH0LIMITH_Msk
SAADC_INTENSET_CH0LIMITH_Pos
SAADC_INTENSET_CH0LIMITH_Set
SAADC_INTENSET_CH0LIMITL_Disabled
SAADC_INTENSET_CH0LIMITL_Enabled
SAADC_INTENSET_CH0LIMITL_Msk
SAADC_INTENSET_CH0LIMITL_Pos
SAADC_INTENSET_CH0LIMITL_Set
SAADC_INTENSET_CH1LIMITH_Disabled
SAADC_INTENSET_CH1LIMITH_Enabled
SAADC_INTENSET_CH1LIMITH_Msk
SAADC_INTENSET_CH1LIMITH_Pos
SAADC_INTENSET_CH1LIMITH_Set
SAADC_INTENSET_CH1LIMITL_Disabled
SAADC_INTENSET_CH1LIMITL_Enabled
SAADC_INTENSET_CH1LIMITL_Msk
SAADC_INTENSET_CH1LIMITL_Pos
SAADC_INTENSET_CH1LIMITL_Set
SAADC_INTENSET_CH2LIMITH_Disabled
SAADC_INTENSET_CH2LIMITH_Enabled
SAADC_INTENSET_CH2LIMITH_Msk
SAADC_INTENSET_CH2LIMITH_Pos
SAADC_INTENSET_CH2LIMITH_Set
SAADC_INTENSET_CH2LIMITL_Disabled
SAADC_INTENSET_CH2LIMITL_Enabled
SAADC_INTENSET_CH2LIMITL_Msk
SAADC_INTENSET_CH2LIMITL_Pos
SAADC_INTENSET_CH2LIMITL_Set
SAADC_INTENSET_CH3LIMITH_Disabled
SAADC_INTENSET_CH3LIMITH_Enabled
SAADC_INTENSET_CH3LIMITH_Msk
SAADC_INTENSET_CH3LIMITH_Pos
SAADC_INTENSET_CH3LIMITH_Set
SAADC_INTENSET_CH3LIMITL_Disabled
SAADC_INTENSET_CH3LIMITL_Enabled
SAADC_INTENSET_CH3LIMITL_Msk
SAADC_INTENSET_CH3LIMITL_Pos
SAADC_INTENSET_CH3LIMITL_Set
SAADC_INTENSET_CH4LIMITH_Disabled
SAADC_INTENSET_CH4LIMITH_Enabled
SAADC_INTENSET_CH4LIMITH_Msk
SAADC_INTENSET_CH4LIMITH_Pos
SAADC_INTENSET_CH4LIMITH_Set
SAADC_INTENSET_CH4LIMITL_Disabled
SAADC_INTENSET_CH4LIMITL_Enabled
SAADC_INTENSET_CH4LIMITL_Msk
SAADC_INTENSET_CH4LIMITL_Pos
SAADC_INTENSET_CH4LIMITL_Set
SAADC_INTENSET_CH5LIMITH_Disabled
SAADC_INTENSET_CH5LIMITH_Enabled
SAADC_INTENSET_CH5LIMITH_Msk
SAADC_INTENSET_CH5LIMITH_Pos
SAADC_INTENSET_CH5LIMITH_Set
SAADC_INTENSET_CH5LIMITL_Disabled
SAADC_INTENSET_CH5LIMITL_Enabled
SAADC_INTENSET_CH5LIMITL_Msk
SAADC_INTENSET_CH5LIMITL_Pos
SAADC_INTENSET_CH5LIMITL_Set
SAADC_INTENSET_CH6LIMITH_Disabled
SAADC_INTENSET_CH6LIMITH_Enabled
SAADC_INTENSET_CH6LIMITH_Msk
SAADC_INTENSET_CH6LIMITH_Pos
SAADC_INTENSET_CH6LIMITH_Set
SAADC_INTENSET_CH6LIMITL_Disabled
SAADC_INTENSET_CH6LIMITL_Enabled
SAADC_INTENSET_CH6LIMITL_Msk
SAADC_INTENSET_CH6LIMITL_Pos
SAADC_INTENSET_CH6LIMITL_Set
SAADC_INTENSET_CH7LIMITH_Disabled
SAADC_INTENSET_CH7LIMITH_Enabled
SAADC_INTENSET_CH7LIMITH_Msk
SAADC_INTENSET_CH7LIMITH_Pos
SAADC_INTENSET_CH7LIMITH_Set
SAADC_INTENSET_CH7LIMITL_Disabled
SAADC_INTENSET_CH7LIMITL_Enabled
SAADC_INTENSET_CH7LIMITL_Msk
SAADC_INTENSET_CH7LIMITL_Pos
SAADC_INTENSET_CH7LIMITL_Set
SAADC_INTENSET_DONE_Disabled
SAADC_INTENSET_DONE_Enabled
SAADC_INTENSET_DONE_Msk
SAADC_INTENSET_DONE_Pos
SAADC_INTENSET_DONE_Set
SAADC_INTENSET_END_Disabled
SAADC_INTENSET_END_Enabled
SAADC_INTENSET_END_Msk
SAADC_INTENSET_END_Pos
SAADC_INTENSET_END_Set
SAADC_INTENSET_RESULTDONE_Disabled
SAADC_INTENSET_RESULTDONE_Enabled
SAADC_INTENSET_RESULTDONE_Msk
SAADC_INTENSET_RESULTDONE_Pos
SAADC_INTENSET_RESULTDONE_Set
SAADC_INTENSET_STARTED_Disabled
SAADC_INTENSET_STARTED_Enabled
SAADC_INTENSET_STARTED_Msk
SAADC_INTENSET_STARTED_Pos
SAADC_INTENSET_STARTED_Set
SAADC_INTENSET_STOPPED_Disabled
SAADC_INTENSET_STOPPED_Enabled
SAADC_INTENSET_STOPPED_Msk
SAADC_INTENSET_STOPPED_Pos
SAADC_INTENSET_STOPPED_Set
SAADC_INTEN_CALIBRATEDONE_Disabled
SAADC_INTEN_CALIBRATEDONE_Enabled
SAADC_INTEN_CALIBRATEDONE_Msk
SAADC_INTEN_CALIBRATEDONE_Pos
SAADC_INTEN_CH0LIMITH_Disabled
SAADC_INTEN_CH0LIMITH_Enabled
SAADC_INTEN_CH0LIMITH_Msk
SAADC_INTEN_CH0LIMITH_Pos
SAADC_INTEN_CH0LIMITL_Disabled
SAADC_INTEN_CH0LIMITL_Enabled
SAADC_INTEN_CH0LIMITL_Msk
SAADC_INTEN_CH0LIMITL_Pos
SAADC_INTEN_CH1LIMITH_Disabled
SAADC_INTEN_CH1LIMITH_Enabled
SAADC_INTEN_CH1LIMITH_Msk
SAADC_INTEN_CH1LIMITH_Pos
SAADC_INTEN_CH1LIMITL_Disabled
SAADC_INTEN_CH1LIMITL_Enabled
SAADC_INTEN_CH1LIMITL_Msk
SAADC_INTEN_CH1LIMITL_Pos
SAADC_INTEN_CH2LIMITH_Disabled
SAADC_INTEN_CH2LIMITH_Enabled
SAADC_INTEN_CH2LIMITH_Msk
SAADC_INTEN_CH2LIMITH_Pos
SAADC_INTEN_CH2LIMITL_Disabled
SAADC_INTEN_CH2LIMITL_Enabled
SAADC_INTEN_CH2LIMITL_Msk
SAADC_INTEN_CH2LIMITL_Pos
SAADC_INTEN_CH3LIMITH_Disabled
SAADC_INTEN_CH3LIMITH_Enabled
SAADC_INTEN_CH3LIMITH_Msk
SAADC_INTEN_CH3LIMITH_Pos
SAADC_INTEN_CH3LIMITL_Disabled
SAADC_INTEN_CH3LIMITL_Enabled
SAADC_INTEN_CH3LIMITL_Msk
SAADC_INTEN_CH3LIMITL_Pos
SAADC_INTEN_CH4LIMITH_Disabled
SAADC_INTEN_CH4LIMITH_Enabled
SAADC_INTEN_CH4LIMITH_Msk
SAADC_INTEN_CH4LIMITH_Pos
SAADC_INTEN_CH4LIMITL_Disabled
SAADC_INTEN_CH4LIMITL_Enabled
SAADC_INTEN_CH4LIMITL_Msk
SAADC_INTEN_CH4LIMITL_Pos
SAADC_INTEN_CH5LIMITH_Disabled
SAADC_INTEN_CH5LIMITH_Enabled
SAADC_INTEN_CH5LIMITH_Msk
SAADC_INTEN_CH5LIMITH_Pos
SAADC_INTEN_CH5LIMITL_Disabled
SAADC_INTEN_CH5LIMITL_Enabled
SAADC_INTEN_CH5LIMITL_Msk
SAADC_INTEN_CH5LIMITL_Pos
SAADC_INTEN_CH6LIMITH_Disabled
SAADC_INTEN_CH6LIMITH_Enabled
SAADC_INTEN_CH6LIMITH_Msk
SAADC_INTEN_CH6LIMITH_Pos
SAADC_INTEN_CH6LIMITL_Disabled
SAADC_INTEN_CH6LIMITL_Enabled
SAADC_INTEN_CH6LIMITL_Msk
SAADC_INTEN_CH6LIMITL_Pos
SAADC_INTEN_CH7LIMITH_Disabled
SAADC_INTEN_CH7LIMITH_Enabled
SAADC_INTEN_CH7LIMITH_Msk
SAADC_INTEN_CH7LIMITH_Pos
SAADC_INTEN_CH7LIMITL_Disabled
SAADC_INTEN_CH7LIMITL_Enabled
SAADC_INTEN_CH7LIMITL_Msk
SAADC_INTEN_CH7LIMITL_Pos
SAADC_INTEN_DONE_Disabled
SAADC_INTEN_DONE_Enabled
SAADC_INTEN_DONE_Msk
SAADC_INTEN_DONE_Pos
SAADC_INTEN_END_Disabled
SAADC_INTEN_END_Enabled
SAADC_INTEN_END_Msk
SAADC_INTEN_END_Pos
SAADC_INTEN_RESULTDONE_Disabled
SAADC_INTEN_RESULTDONE_Enabled
SAADC_INTEN_RESULTDONE_Msk
SAADC_INTEN_RESULTDONE_Pos
SAADC_INTEN_STARTED_Disabled
SAADC_INTEN_STARTED_Enabled
SAADC_INTEN_STARTED_Msk
SAADC_INTEN_STARTED_Pos
SAADC_INTEN_STOPPED_Disabled
SAADC_INTEN_STOPPED_Enabled
SAADC_INTEN_STOPPED_Msk
SAADC_INTEN_STOPPED_Pos
SAADC_OVERSAMPLE_OVERSAMPLE_Bypass
SAADC_OVERSAMPLE_OVERSAMPLE_Msk
SAADC_OVERSAMPLE_OVERSAMPLE_Over128x
SAADC_OVERSAMPLE_OVERSAMPLE_Over16x
SAADC_OVERSAMPLE_OVERSAMPLE_Over256x
SAADC_OVERSAMPLE_OVERSAMPLE_Over2x
SAADC_OVERSAMPLE_OVERSAMPLE_Over32x
SAADC_OVERSAMPLE_OVERSAMPLE_Over4x
SAADC_OVERSAMPLE_OVERSAMPLE_Over64x
SAADC_OVERSAMPLE_OVERSAMPLE_Over8x
SAADC_OVERSAMPLE_OVERSAMPLE_Pos
SAADC_RESOLUTION_VAL_10bit
SAADC_RESOLUTION_VAL_12bit
SAADC_RESOLUTION_VAL_14bit
SAADC_RESOLUTION_VAL_8bit
SAADC_RESOLUTION_VAL_Msk
SAADC_RESOLUTION_VAL_Pos
SAADC_RESULT_AMOUNT_AMOUNT_Msk
SAADC_RESULT_AMOUNT_AMOUNT_Pos
SAADC_RESULT_MAXCNT_MAXCNT_Msk
SAADC_RESULT_MAXCNT_MAXCNT_Pos
SAADC_RESULT_PTR_PTR_Msk
SAADC_RESULT_PTR_PTR_Pos
SAADC_SAMPLERATE_CC_Msk
SAADC_SAMPLERATE_CC_Pos
SAADC_SAMPLERATE_MODE_Msk
SAADC_SAMPLERATE_MODE_Pos
SAADC_SAMPLERATE_MODE_Task
SAADC_SAMPLERATE_MODE_Timers
SAADC_STATUS_STATUS_Busy
SAADC_STATUS_STATUS_Msk
SAADC_STATUS_STATUS_Pos
SAADC_STATUS_STATUS_Ready
SAADC_TASKS_CALIBRATEOFFSET_TASKS_CALIBRATEOFFSET_Msk
SAADC_TASKS_CALIBRATEOFFSET_TASKS_CALIBRATEOFFSET_Pos
SAADC_TASKS_CALIBRATEOFFSET_TASKS_CALIBRATEOFFSET_Trigger
SAADC_TASKS_SAMPLE_TASKS_SAMPLE_Msk
SAADC_TASKS_SAMPLE_TASKS_SAMPLE_Pos
SAADC_TASKS_SAMPLE_TASKS_SAMPLE_Trigger
SAADC_TASKS_START_TASKS_START_Msk
SAADC_TASKS_START_TASKS_START_Pos
SAADC_TASKS_START_TASKS_START_Trigger
SAADC_TASKS_STOP_TASKS_STOP_Msk
SAADC_TASKS_STOP_TASKS_STOP_Pos
SAADC_TASKS_STOP_TASKS_STOP_Trigger
SAUL_ACT_ANY
SAUL_ACT_DIMMER
SAUL_ACT_ID_ANY
SAUL_ACT_ID_DIMMER
SAUL_ACT_ID_LED_RGB
SAUL_ACT_ID_MOTOR
SAUL_ACT_ID_SERVO
SAUL_ACT_ID_SWITCH
SAUL_ACT_LED_RGB
SAUL_ACT_MOTOR
SAUL_ACT_NUMOF
SAUL_ACT_SERVO
SAUL_ACT_SWITCH
SAUL_CAT_ACT
SAUL_CAT_MASK
SAUL_CAT_SENSE
SAUL_CAT_UNDEF
SAUL_CLASS_ANY
SAUL_ID_MASK
SAUL_SENSE_ACCEL
SAUL_SENSE_ANALOG
SAUL_SENSE_ANY
SAUL_SENSE_BTN
SAUL_SENSE_CAPACITANCE
SAUL_SENSE_CHARGE
SAUL_SENSE_CO2
SAUL_SENSE_COLOR
SAUL_SENSE_COUNT
SAUL_SENSE_CURRENT
SAUL_SENSE_DISTANCE
SAUL_SENSE_GAS
SAUL_SENSE_GYRO
SAUL_SENSE_HUM
SAUL_SENSE_ID_ACCEL
SAUL_SENSE_ID_ANALOG
SAUL_SENSE_ID_ANY
SAUL_SENSE_ID_BTN
SAUL_SENSE_ID_CAPACITANCE
SAUL_SENSE_ID_CHARGE
SAUL_SENSE_ID_CO2
SAUL_SENSE_ID_COLOR
SAUL_SENSE_ID_COUNT
SAUL_SENSE_ID_CURRENT
SAUL_SENSE_ID_DISTANCE
SAUL_SENSE_ID_GAS
SAUL_SENSE_ID_GYRO
SAUL_SENSE_ID_HUM
SAUL_SENSE_ID_LIGHT
SAUL_SENSE_ID_MAG
SAUL_SENSE_ID_OBJTEMP
SAUL_SENSE_ID_OCCUP
SAUL_SENSE_ID_PH
SAUL_SENSE_ID_PM
SAUL_SENSE_ID_POWER
SAUL_SENSE_ID_PRESS
SAUL_SENSE_ID_PROXIMITY
SAUL_SENSE_ID_RSSI
SAUL_SENSE_ID_SIZE
SAUL_SENSE_ID_TEMP
SAUL_SENSE_ID_TVOC
SAUL_SENSE_ID_UV
SAUL_SENSE_ID_VOLTAGE
SAUL_SENSE_LIGHT
SAUL_SENSE_MAG
SAUL_SENSE_NUMOF
SAUL_SENSE_OBJTEMP
SAUL_SENSE_OCCUP
SAUL_SENSE_PH
SAUL_SENSE_PM
SAUL_SENSE_POWER
SAUL_SENSE_PRESS
SAUL_SENSE_PROXIMITY
SAUL_SENSE_RSSI
SAUL_SENSE_SIZE
SAUL_SENSE_TEMP
SAUL_SENSE_TVOC
SAUL_SENSE_UV
SAUL_SENSE_VOLTAGE
SCB_AIRCR_ENDIANESS_Msk
SCB_AIRCR_ENDIANESS_Pos
SCB_AIRCR_PRIGROUP_Msk
SCB_AIRCR_PRIGROUP_Pos
SCB_AIRCR_SYSRESETREQ_Msk
SCB_AIRCR_SYSRESETREQ_Pos
SCB_AIRCR_VECTCLRACTIVE_Msk
SCB_AIRCR_VECTCLRACTIVE_Pos
SCB_AIRCR_VECTKEYSTAT_Msk
SCB_AIRCR_VECTKEYSTAT_Pos
SCB_AIRCR_VECTKEY_Msk
SCB_AIRCR_VECTKEY_Pos
SCB_AIRCR_VECTRESET_Msk
SCB_AIRCR_VECTRESET_Pos
SCB_BASE
SCB_CCR_BFHFNMIGN_Msk
SCB_CCR_BFHFNMIGN_Pos
SCB_CCR_DIV_0_TRP_Msk
SCB_CCR_DIV_0_TRP_Pos
SCB_CCR_NONBASETHRDENA_Msk
SCB_CCR_NONBASETHRDENA_Pos
SCB_CCR_STKALIGN_Msk
SCB_CCR_STKALIGN_Pos
SCB_CCR_UNALIGN_TRP_Msk
SCB_CCR_UNALIGN_TRP_Pos
SCB_CCR_USERSETMPEND_Msk
SCB_CCR_USERSETMPEND_Pos
SCB_CFSR_BFARVALID_Msk
SCB_CFSR_BFARVALID_Pos
SCB_CFSR_BUSFAULTSR_Msk
SCB_CFSR_BUSFAULTSR_Pos
SCB_CFSR_DACCVIOL_Msk
SCB_CFSR_DACCVIOL_Pos
SCB_CFSR_DIVBYZERO_Msk
SCB_CFSR_DIVBYZERO_Pos
SCB_CFSR_IACCVIOL_Msk
SCB_CFSR_IACCVIOL_Pos
SCB_CFSR_IBUSERR_Msk
SCB_CFSR_IBUSERR_Pos
SCB_CFSR_IMPRECISERR_Msk
SCB_CFSR_IMPRECISERR_Pos
SCB_CFSR_INVPC_Msk
SCB_CFSR_INVPC_Pos
SCB_CFSR_INVSTATE_Msk
SCB_CFSR_INVSTATE_Pos
SCB_CFSR_LSPERR_Msk
SCB_CFSR_LSPERR_Pos
SCB_CFSR_MEMFAULTSR_Msk
SCB_CFSR_MEMFAULTSR_Pos
SCB_CFSR_MLSPERR_Msk
SCB_CFSR_MLSPERR_Pos
SCB_CFSR_MMARVALID_Msk
SCB_CFSR_MMARVALID_Pos
SCB_CFSR_MSTKERR_Msk
SCB_CFSR_MSTKERR_Pos
SCB_CFSR_MUNSTKERR_Msk
SCB_CFSR_MUNSTKERR_Pos
SCB_CFSR_NOCP_Msk
SCB_CFSR_NOCP_Pos
SCB_CFSR_PRECISERR_Msk
SCB_CFSR_PRECISERR_Pos
SCB_CFSR_STKERR_Msk
SCB_CFSR_STKERR_Pos
SCB_CFSR_UNALIGNED_Msk
SCB_CFSR_UNALIGNED_Pos
SCB_CFSR_UNDEFINSTR_Msk
SCB_CFSR_UNDEFINSTR_Pos
SCB_CFSR_UNSTKERR_Msk
SCB_CFSR_UNSTKERR_Pos
SCB_CFSR_USGFAULTSR_Msk
SCB_CFSR_USGFAULTSR_Pos
SCB_CPUID_ARCHITECTURE_Msk
SCB_CPUID_ARCHITECTURE_Pos
SCB_CPUID_IMPLEMENTER_Msk
SCB_CPUID_IMPLEMENTER_Pos
SCB_CPUID_PARTNO_Msk
SCB_CPUID_PARTNO_Pos
SCB_CPUID_REVISION_Msk
SCB_CPUID_REVISION_Pos
SCB_CPUID_VARIANT_Msk
SCB_CPUID_VARIANT_Pos
SCB_DFSR_BKPT_Msk
SCB_DFSR_BKPT_Pos
SCB_DFSR_DWTTRAP_Msk
SCB_DFSR_DWTTRAP_Pos
SCB_DFSR_EXTERNAL_Msk
SCB_DFSR_EXTERNAL_Pos
SCB_DFSR_HALTED_Msk
SCB_DFSR_HALTED_Pos
SCB_DFSR_VCATCH_Msk
SCB_DFSR_VCATCH_Pos
SCB_HFSR_DEBUGEVT_Msk
SCB_HFSR_DEBUGEVT_Pos
SCB_HFSR_FORCED_Msk
SCB_HFSR_FORCED_Pos
SCB_HFSR_VECTTBL_Msk
SCB_HFSR_VECTTBL_Pos
SCB_ICSR_ISRPENDING_Msk
SCB_ICSR_ISRPENDING_Pos
SCB_ICSR_ISRPREEMPT_Msk
SCB_ICSR_ISRPREEMPT_Pos
SCB_ICSR_NMIPENDSET_Msk
SCB_ICSR_NMIPENDSET_Pos
SCB_ICSR_PENDSTCLR_Msk
SCB_ICSR_PENDSTCLR_Pos
SCB_ICSR_PENDSTSET_Msk
SCB_ICSR_PENDSTSET_Pos
SCB_ICSR_PENDSVCLR_Msk
SCB_ICSR_PENDSVCLR_Pos
SCB_ICSR_PENDSVSET_Msk
SCB_ICSR_PENDSVSET_Pos
SCB_ICSR_RETTOBASE_Msk
SCB_ICSR_RETTOBASE_Pos
SCB_ICSR_VECTACTIVE_Msk
SCB_ICSR_VECTACTIVE_Pos
SCB_ICSR_VECTPENDING_Msk
SCB_ICSR_VECTPENDING_Pos
SCB_SCR_SEVONPEND_Msk
SCB_SCR_SEVONPEND_Pos
SCB_SCR_SLEEPDEEP_Msk
SCB_SCR_SLEEPDEEP_Pos
SCB_SCR_SLEEPONEXIT_Msk
SCB_SCR_SLEEPONEXIT_Pos
SCB_SHCSR_BUSFAULTACT_Msk
SCB_SHCSR_BUSFAULTACT_Pos
SCB_SHCSR_BUSFAULTENA_Msk
SCB_SHCSR_BUSFAULTENA_Pos
SCB_SHCSR_BUSFAULTPENDED_Msk
SCB_SHCSR_BUSFAULTPENDED_Pos
SCB_SHCSR_MEMFAULTACT_Msk
SCB_SHCSR_MEMFAULTACT_Pos
SCB_SHCSR_MEMFAULTENA_Msk
SCB_SHCSR_MEMFAULTENA_Pos
SCB_SHCSR_MEMFAULTPENDED_Msk
SCB_SHCSR_MEMFAULTPENDED_Pos
SCB_SHCSR_MONITORACT_Msk
SCB_SHCSR_MONITORACT_Pos
SCB_SHCSR_PENDSVACT_Msk
SCB_SHCSR_PENDSVACT_Pos
SCB_SHCSR_SVCALLACT_Msk
SCB_SHCSR_SVCALLACT_Pos
SCB_SHCSR_SVCALLPENDED_Msk
SCB_SHCSR_SVCALLPENDED_Pos
SCB_SHCSR_SYSTICKACT_Msk
SCB_SHCSR_SYSTICKACT_Pos
SCB_SHCSR_USGFAULTACT_Msk
SCB_SHCSR_USGFAULTACT_Pos
SCB_SHCSR_USGFAULTENA_Msk
SCB_SHCSR_USGFAULTENA_Pos
SCB_SHCSR_USGFAULTPENDED_Msk
SCB_SHCSR_USGFAULTPENDED_Pos
SCB_VTOR_TBLOFF_Msk
SCB_VTOR_TBLOFF_Pos
SCHED_PRIO_LEVELS
SCHED_TEST_STACK
SCS_BASE
SCnSCB_ACTLR_DISDEFWBUF_Msk
SCnSCB_ACTLR_DISDEFWBUF_Pos
SCnSCB_ACTLR_DISFOLD_Msk
SCnSCB_ACTLR_DISFOLD_Pos
SCnSCB_ACTLR_DISFPCA_Msk
SCnSCB_ACTLR_DISFPCA_Pos
SCnSCB_ACTLR_DISMCYCINT_Msk
SCnSCB_ACTLR_DISMCYCINT_Pos
SCnSCB_ACTLR_DISOOFP_Msk
SCnSCB_ACTLR_DISOOFP_Pos
SCnSCB_ICTR_INTLINESNUM_Msk
SCnSCB_ICTR_INTLINESNUM_Pos
SEC_PER_DAY
SEC_PER_HOUR
SEC_PER_MIN
SEEK_CUR
SEEK_END
SEEK_SET
SHA1_BLOCK_LENGTH
SHA1_DIGEST_LENGTH
SHA224_DIGEST_LENGTH
SHA224_INTERNAL_BLOCK_SIZE
SHA256_DIGEST_LENGTH
SHA256_INTERNAL_BLOCK_SIZE
SHA3_256_DIGEST_LENGTH
SHA3_384_DIGEST_LENGTH
SHA3_512_DIGEST_LENGTH
SHA512_DIGEST_LENGTH
SHA512_INTERNAL_BLOCK_SIZE
SHELL_DEFAULT_BUFSIZE
SOCK_ADDR_ANY_NETIF
SOCK_AUX_GET_LOCAL
SOCK_AUX_GET_RSSI
SOCK_AUX_GET_TIMESTAMP
SOCK_AUX_GET_TTL
SOCK_AUX_SET_LOCAL
SOCK_FLAGS_CONNECT_REMOTE
SOCK_FLAGS_REUSE_EP
SOCK_HAS_ASYNC
SOCK_HAS_ASYNC_CTX
SOCK_HAS_IPV6
SOCK_NO_TIMEOUT
SPIFFS_VFS_DIR_BUFFER_SIZE
SPIFFS_VFS_FILE_BUFFER_SIZE
SPIM0_EASYDMA_MAXCNT_SIZE
SPIM0_FEATURE_DCX_PRESENT
SPIM0_FEATURE_HARDWARE_CSN_PRESENT
SPIM0_FEATURE_RXDELAY_PRESENT
SPIM0_MAX_DATARATE
SPIM1_EASYDMA_MAXCNT_SIZE
SPIM1_FEATURE_DCX_PRESENT
SPIM1_FEATURE_HARDWARE_CSN_PRESENT
SPIM1_FEATURE_RXDELAY_PRESENT
SPIM1_MAX_DATARATE
SPIM2_EASYDMA_MAXCNT_SIZE
SPIM2_FEATURE_DCX_PRESENT
SPIM2_FEATURE_HARDWARE_CSN_PRESENT
SPIM2_FEATURE_RXDELAY_PRESENT
SPIM2_MAX_DATARATE
SPIM3_EASYDMA_MAXCNT_SIZE
SPIM3_FEATURE_DCX_PRESENT
SPIM3_FEATURE_HARDWARE_CSN_PRESENT
SPIM3_FEATURE_RXDELAY_PRESENT
SPIM3_MAX_DATARATE
SPIM_CONFIG_CPHA_Leading
SPIM_CONFIG_CPHA_Msk
SPIM_CONFIG_CPHA_Pos
SPIM_CONFIG_CPHA_Trailing
SPIM_CONFIG_CPOL_ActiveHigh
SPIM_CONFIG_CPOL_ActiveLow
SPIM_CONFIG_CPOL_Msk
SPIM_CONFIG_CPOL_Pos
SPIM_CONFIG_ORDER_LsbFirst
SPIM_CONFIG_ORDER_MsbFirst
SPIM_CONFIG_ORDER_Msk
SPIM_CONFIG_ORDER_Pos
SPIM_COUNT
SPIM_CSNPOL_CSNPOL_HIGH
SPIM_CSNPOL_CSNPOL_LOW
SPIM_CSNPOL_CSNPOL_Msk
SPIM_CSNPOL_CSNPOL_Pos
SPIM_DCXCNT_DCXCNT_Msk
SPIM_DCXCNT_DCXCNT_Pos
SPIM_ENABLE_ENABLE_Disabled
SPIM_ENABLE_ENABLE_Enabled
SPIM_ENABLE_ENABLE_Msk
SPIM_ENABLE_ENABLE_Pos
SPIM_EVENTS_ENDRX_EVENTS_ENDRX_Generated
SPIM_EVENTS_ENDRX_EVENTS_ENDRX_Msk
SPIM_EVENTS_ENDRX_EVENTS_ENDRX_NotGenerated
SPIM_EVENTS_ENDRX_EVENTS_ENDRX_Pos
SPIM_EVENTS_ENDTX_EVENTS_ENDTX_Generated
SPIM_EVENTS_ENDTX_EVENTS_ENDTX_Msk
SPIM_EVENTS_ENDTX_EVENTS_ENDTX_NotGenerated
SPIM_EVENTS_ENDTX_EVENTS_ENDTX_Pos
SPIM_EVENTS_END_EVENTS_END_Generated
SPIM_EVENTS_END_EVENTS_END_Msk
SPIM_EVENTS_END_EVENTS_END_NotGenerated
SPIM_EVENTS_END_EVENTS_END_Pos
SPIM_EVENTS_STARTED_EVENTS_STARTED_Generated
SPIM_EVENTS_STARTED_EVENTS_STARTED_Msk
SPIM_EVENTS_STARTED_EVENTS_STARTED_NotGenerated
SPIM_EVENTS_STARTED_EVENTS_STARTED_Pos
SPIM_EVENTS_STOPPED_EVENTS_STOPPED_Generated
SPIM_EVENTS_STOPPED_EVENTS_STOPPED_Msk
SPIM_EVENTS_STOPPED_EVENTS_STOPPED_NotGenerated
SPIM_EVENTS_STOPPED_EVENTS_STOPPED_Pos
SPIM_FREQUENCY_FREQUENCY_K125
SPIM_FREQUENCY_FREQUENCY_K250
SPIM_FREQUENCY_FREQUENCY_K500
SPIM_FREQUENCY_FREQUENCY_M1
SPIM_FREQUENCY_FREQUENCY_M16
SPIM_FREQUENCY_FREQUENCY_M2
SPIM_FREQUENCY_FREQUENCY_M32
SPIM_FREQUENCY_FREQUENCY_M4
SPIM_FREQUENCY_FREQUENCY_M8
SPIM_FREQUENCY_FREQUENCY_Msk
SPIM_FREQUENCY_FREQUENCY_Pos
SPIM_IFTIMING_CSNDUR_CSNDUR_Msk
SPIM_IFTIMING_CSNDUR_CSNDUR_Pos
SPIM_IFTIMING_RXDELAY_RXDELAY_Msk
SPIM_IFTIMING_RXDELAY_RXDELAY_Pos
SPIM_INTENCLR_ENDRX_Clear
SPIM_INTENCLR_ENDRX_Disabled
SPIM_INTENCLR_ENDRX_Enabled
SPIM_INTENCLR_ENDRX_Msk
SPIM_INTENCLR_ENDRX_Pos
SPIM_INTENCLR_ENDTX_Clear
SPIM_INTENCLR_ENDTX_Disabled
SPIM_INTENCLR_ENDTX_Enabled
SPIM_INTENCLR_ENDTX_Msk
SPIM_INTENCLR_ENDTX_Pos
SPIM_INTENCLR_END_Clear
SPIM_INTENCLR_END_Disabled
SPIM_INTENCLR_END_Enabled
SPIM_INTENCLR_END_Msk
SPIM_INTENCLR_END_Pos
SPIM_INTENCLR_STARTED_Clear
SPIM_INTENCLR_STARTED_Disabled
SPIM_INTENCLR_STARTED_Enabled
SPIM_INTENCLR_STARTED_Msk
SPIM_INTENCLR_STARTED_Pos
SPIM_INTENCLR_STOPPED_Clear
SPIM_INTENCLR_STOPPED_Disabled
SPIM_INTENCLR_STOPPED_Enabled
SPIM_INTENCLR_STOPPED_Msk
SPIM_INTENCLR_STOPPED_Pos
SPIM_INTENSET_ENDRX_Disabled
SPIM_INTENSET_ENDRX_Enabled
SPIM_INTENSET_ENDRX_Msk
SPIM_INTENSET_ENDRX_Pos
SPIM_INTENSET_ENDRX_Set
SPIM_INTENSET_ENDTX_Disabled
SPIM_INTENSET_ENDTX_Enabled
SPIM_INTENSET_ENDTX_Msk
SPIM_INTENSET_ENDTX_Pos
SPIM_INTENSET_ENDTX_Set
SPIM_INTENSET_END_Disabled
SPIM_INTENSET_END_Enabled
SPIM_INTENSET_END_Msk
SPIM_INTENSET_END_Pos
SPIM_INTENSET_END_Set
SPIM_INTENSET_STARTED_Disabled
SPIM_INTENSET_STARTED_Enabled
SPIM_INTENSET_STARTED_Msk
SPIM_INTENSET_STARTED_Pos
SPIM_INTENSET_STARTED_Set
SPIM_INTENSET_STOPPED_Disabled
SPIM_INTENSET_STOPPED_Enabled
SPIM_INTENSET_STOPPED_Msk
SPIM_INTENSET_STOPPED_Pos
SPIM_INTENSET_STOPPED_Set
SPIM_ORC_ORC_Msk
SPIM_ORC_ORC_Pos
SPIM_PSELDCX_CONNECT_Connected
SPIM_PSELDCX_CONNECT_Disconnected
SPIM_PSELDCX_CONNECT_Msk
SPIM_PSELDCX_CONNECT_Pos
SPIM_PSELDCX_PIN_Msk
SPIM_PSELDCX_PIN_Pos
SPIM_PSELDCX_PORT_Msk
SPIM_PSELDCX_PORT_Pos
SPIM_PSEL_CSN_CONNECT_Connected
SPIM_PSEL_CSN_CONNECT_Disconnected
SPIM_PSEL_CSN_CONNECT_Msk
SPIM_PSEL_CSN_CONNECT_Pos
SPIM_PSEL_CSN_PIN_Msk
SPIM_PSEL_CSN_PIN_Pos
SPIM_PSEL_CSN_PORT_Msk
SPIM_PSEL_CSN_PORT_Pos
SPIM_PSEL_MISO_CONNECT_Connected
SPIM_PSEL_MISO_CONNECT_Disconnected
SPIM_PSEL_MISO_CONNECT_Msk
SPIM_PSEL_MISO_CONNECT_Pos
SPIM_PSEL_MISO_PIN_Msk
SPIM_PSEL_MISO_PIN_Pos
SPIM_PSEL_MISO_PORT_Msk
SPIM_PSEL_MISO_PORT_Pos
SPIM_PSEL_MOSI_CONNECT_Connected
SPIM_PSEL_MOSI_CONNECT_Disconnected
SPIM_PSEL_MOSI_CONNECT_Msk
SPIM_PSEL_MOSI_CONNECT_Pos
SPIM_PSEL_MOSI_PIN_Msk
SPIM_PSEL_MOSI_PIN_Pos
SPIM_PSEL_MOSI_PORT_Msk
SPIM_PSEL_MOSI_PORT_Pos
SPIM_PSEL_SCK_CONNECT_Connected
SPIM_PSEL_SCK_CONNECT_Disconnected
SPIM_PSEL_SCK_CONNECT_Msk
SPIM_PSEL_SCK_CONNECT_Pos
SPIM_PSEL_SCK_PIN_Msk
SPIM_PSEL_SCK_PIN_Pos
SPIM_PSEL_SCK_PORT_Msk
SPIM_PSEL_SCK_PORT_Pos
SPIM_RXD_AMOUNT_AMOUNT_Msk
SPIM_RXD_AMOUNT_AMOUNT_Pos
SPIM_RXD_LIST_LIST_ArrayList
SPIM_RXD_LIST_LIST_Disabled
SPIM_RXD_LIST_LIST_Msk
SPIM_RXD_LIST_LIST_Pos
SPIM_RXD_MAXCNT_MAXCNT_Msk
SPIM_RXD_MAXCNT_MAXCNT_Pos
SPIM_RXD_PTR_PTR_Msk
SPIM_RXD_PTR_PTR_Pos
SPIM_SHORTS_END_START_Disabled
SPIM_SHORTS_END_START_Enabled
SPIM_SHORTS_END_START_Msk
SPIM_SHORTS_END_START_Pos
SPIM_STALLSTAT_RX_Msk
SPIM_STALLSTAT_RX_NOSTALL
SPIM_STALLSTAT_RX_Pos
SPIM_STALLSTAT_RX_STALL
SPIM_STALLSTAT_TX_Msk
SPIM_STALLSTAT_TX_NOSTALL
SPIM_STALLSTAT_TX_Pos
SPIM_STALLSTAT_TX_STALL
SPIM_TASKS_RESUME_TASKS_RESUME_Msk
SPIM_TASKS_RESUME_TASKS_RESUME_Pos
SPIM_TASKS_RESUME_TASKS_RESUME_Trigger
SPIM_TASKS_START_TASKS_START_Msk
SPIM_TASKS_START_TASKS_START_Pos
SPIM_TASKS_START_TASKS_START_Trigger
SPIM_TASKS_STOP_TASKS_STOP_Msk
SPIM_TASKS_STOP_TASKS_STOP_Pos
SPIM_TASKS_STOP_TASKS_STOP_Trigger
SPIM_TASKS_SUSPEND_TASKS_SUSPEND_Msk
SPIM_TASKS_SUSPEND_TASKS_SUSPEND_Pos
SPIM_TASKS_SUSPEND_TASKS_SUSPEND_Trigger
SPIM_TXD_AMOUNT_AMOUNT_Msk
SPIM_TXD_AMOUNT_AMOUNT_Pos
SPIM_TXD_LIST_LIST_ArrayList
SPIM_TXD_LIST_LIST_Disabled
SPIM_TXD_LIST_LIST_Msk
SPIM_TXD_LIST_LIST_Pos
SPIM_TXD_MAXCNT_MAXCNT_Msk
SPIM_TXD_MAXCNT_MAXCNT_Pos
SPIM_TXD_PTR_PTR_Msk
SPIM_TXD_PTR_PTR_Pos
SPIS0_EASYDMA_MAXCNT_SIZE
SPIS1_EASYDMA_MAXCNT_SIZE
SPIS2_EASYDMA_MAXCNT_SIZE
SPIS_CONFIG_CPHA_Leading
SPIS_CONFIG_CPHA_Msk
SPIS_CONFIG_CPHA_Pos
SPIS_CONFIG_CPHA_Trailing
SPIS_CONFIG_CPOL_ActiveHigh
SPIS_CONFIG_CPOL_ActiveLow
SPIS_CONFIG_CPOL_Msk
SPIS_CONFIG_CPOL_Pos
SPIS_CONFIG_ORDER_LsbFirst
SPIS_CONFIG_ORDER_MsbFirst
SPIS_CONFIG_ORDER_Msk
SPIS_CONFIG_ORDER_Pos
SPIS_COUNT
SPIS_DEF_DEF_Msk
SPIS_DEF_DEF_Pos
SPIS_ENABLE_ENABLE_Disabled
SPIS_ENABLE_ENABLE_Enabled
SPIS_ENABLE_ENABLE_Msk
SPIS_ENABLE_ENABLE_Pos
SPIS_EVENTS_ACQUIRED_EVENTS_ACQUIRED_Generated
SPIS_EVENTS_ACQUIRED_EVENTS_ACQUIRED_Msk
SPIS_EVENTS_ACQUIRED_EVENTS_ACQUIRED_NotGenerated
SPIS_EVENTS_ACQUIRED_EVENTS_ACQUIRED_Pos
SPIS_EVENTS_ENDRX_EVENTS_ENDRX_Generated
SPIS_EVENTS_ENDRX_EVENTS_ENDRX_Msk
SPIS_EVENTS_ENDRX_EVENTS_ENDRX_NotGenerated
SPIS_EVENTS_ENDRX_EVENTS_ENDRX_Pos
SPIS_EVENTS_END_EVENTS_END_Generated
SPIS_EVENTS_END_EVENTS_END_Msk
SPIS_EVENTS_END_EVENTS_END_NotGenerated
SPIS_EVENTS_END_EVENTS_END_Pos
SPIS_INTENCLR_ACQUIRED_Clear
SPIS_INTENCLR_ACQUIRED_Disabled
SPIS_INTENCLR_ACQUIRED_Enabled
SPIS_INTENCLR_ACQUIRED_Msk
SPIS_INTENCLR_ACQUIRED_Pos
SPIS_INTENCLR_ENDRX_Clear
SPIS_INTENCLR_ENDRX_Disabled
SPIS_INTENCLR_ENDRX_Enabled
SPIS_INTENCLR_ENDRX_Msk
SPIS_INTENCLR_ENDRX_Pos
SPIS_INTENCLR_END_Clear
SPIS_INTENCLR_END_Disabled
SPIS_INTENCLR_END_Enabled
SPIS_INTENCLR_END_Msk
SPIS_INTENCLR_END_Pos
SPIS_INTENSET_ACQUIRED_Disabled
SPIS_INTENSET_ACQUIRED_Enabled
SPIS_INTENSET_ACQUIRED_Msk
SPIS_INTENSET_ACQUIRED_Pos
SPIS_INTENSET_ACQUIRED_Set
SPIS_INTENSET_ENDRX_Disabled
SPIS_INTENSET_ENDRX_Enabled
SPIS_INTENSET_ENDRX_Msk
SPIS_INTENSET_ENDRX_Pos
SPIS_INTENSET_ENDRX_Set
SPIS_INTENSET_END_Disabled
SPIS_INTENSET_END_Enabled
SPIS_INTENSET_END_Msk
SPIS_INTENSET_END_Pos
SPIS_INTENSET_END_Set
SPIS_ORC_ORC_Msk
SPIS_ORC_ORC_Pos
SPIS_PSEL_CSN_CONNECT_Connected
SPIS_PSEL_CSN_CONNECT_Disconnected
SPIS_PSEL_CSN_CONNECT_Msk
SPIS_PSEL_CSN_CONNECT_Pos
SPIS_PSEL_CSN_PIN_Msk
SPIS_PSEL_CSN_PIN_Pos
SPIS_PSEL_CSN_PORT_Msk
SPIS_PSEL_CSN_PORT_Pos
SPIS_PSEL_MISO_CONNECT_Connected
SPIS_PSEL_MISO_CONNECT_Disconnected
SPIS_PSEL_MISO_CONNECT_Msk
SPIS_PSEL_MISO_CONNECT_Pos
SPIS_PSEL_MISO_PIN_Msk
SPIS_PSEL_MISO_PIN_Pos
SPIS_PSEL_MISO_PORT_Msk
SPIS_PSEL_MISO_PORT_Pos
SPIS_PSEL_MOSI_CONNECT_Connected
SPIS_PSEL_MOSI_CONNECT_Disconnected
SPIS_PSEL_MOSI_CONNECT_Msk
SPIS_PSEL_MOSI_CONNECT_Pos
SPIS_PSEL_MOSI_PIN_Msk
SPIS_PSEL_MOSI_PIN_Pos
SPIS_PSEL_MOSI_PORT_Msk
SPIS_PSEL_MOSI_PORT_Pos
SPIS_PSEL_SCK_CONNECT_Connected
SPIS_PSEL_SCK_CONNECT_Disconnected
SPIS_PSEL_SCK_CONNECT_Msk
SPIS_PSEL_SCK_CONNECT_Pos
SPIS_PSEL_SCK_PIN_Msk
SPIS_PSEL_SCK_PIN_Pos
SPIS_PSEL_SCK_PORT_Msk
SPIS_PSEL_SCK_PORT_Pos
SPIS_RXD_AMOUNT_AMOUNT_Msk
SPIS_RXD_AMOUNT_AMOUNT_Pos
SPIS_RXD_LIST_LIST_ArrayList
SPIS_RXD_LIST_LIST_Disabled
SPIS_RXD_LIST_LIST_Msk
SPIS_RXD_LIST_LIST_Pos
SPIS_RXD_MAXCNT_MAXCNT_Msk
SPIS_RXD_MAXCNT_MAXCNT_Pos
SPIS_RXD_PTR_PTR_Msk
SPIS_RXD_PTR_PTR_Pos
SPIS_SEMSTAT_SEMSTAT_CPU
SPIS_SEMSTAT_SEMSTAT_CPUPending
SPIS_SEMSTAT_SEMSTAT_Free
SPIS_SEMSTAT_SEMSTAT_Msk
SPIS_SEMSTAT_SEMSTAT_Pos
SPIS_SEMSTAT_SEMSTAT_SPIS
SPIS_SHORTS_END_ACQUIRE_Disabled
SPIS_SHORTS_END_ACQUIRE_Enabled
SPIS_SHORTS_END_ACQUIRE_Msk
SPIS_SHORTS_END_ACQUIRE_Pos
SPIS_STATUS_OVERFLOW_Clear
SPIS_STATUS_OVERFLOW_Msk
SPIS_STATUS_OVERFLOW_NotPresent
SPIS_STATUS_OVERFLOW_Pos
SPIS_STATUS_OVERFLOW_Present
SPIS_STATUS_OVERREAD_Clear
SPIS_STATUS_OVERREAD_Msk
SPIS_STATUS_OVERREAD_NotPresent
SPIS_STATUS_OVERREAD_Pos
SPIS_STATUS_OVERREAD_Present
SPIS_TASKS_ACQUIRE_TASKS_ACQUIRE_Msk
SPIS_TASKS_ACQUIRE_TASKS_ACQUIRE_Pos
SPIS_TASKS_ACQUIRE_TASKS_ACQUIRE_Trigger
SPIS_TASKS_RELEASE_TASKS_RELEASE_Msk
SPIS_TASKS_RELEASE_TASKS_RELEASE_Pos
SPIS_TASKS_RELEASE_TASKS_RELEASE_Trigger
SPIS_TXD_AMOUNT_AMOUNT_Msk
SPIS_TXD_AMOUNT_AMOUNT_Pos
SPIS_TXD_LIST_LIST_ArrayList
SPIS_TXD_LIST_LIST_Disabled
SPIS_TXD_LIST_LIST_Msk
SPIS_TXD_LIST_LIST_Pos
SPIS_TXD_MAXCNT_MAXCNT_Msk
SPIS_TXD_MAXCNT_MAXCNT_Pos
SPIS_TXD_PTR_PTR_Msk
SPIS_TXD_PTR_PTR_Pos
SPI_CONFIG_CPHA_Leading
SPI_CONFIG_CPHA_Msk
SPI_CONFIG_CPHA_Pos
SPI_CONFIG_CPHA_Trailing
SPI_CONFIG_CPOL_ActiveHigh
SPI_CONFIG_CPOL_ActiveLow
SPI_CONFIG_CPOL_Msk
SPI_CONFIG_CPOL_Pos
SPI_CONFIG_ORDER_LsbFirst
SPI_CONFIG_ORDER_MsbFirst
SPI_CONFIG_ORDER_Msk
SPI_CONFIG_ORDER_Pos
SPI_COUNT
SPI_ENABLE_ENABLE_Disabled
SPI_ENABLE_ENABLE_Enabled
SPI_ENABLE_ENABLE_Msk
SPI_ENABLE_ENABLE_Pos
SPI_EVENTS_READY_EVENTS_READY_Generated
SPI_EVENTS_READY_EVENTS_READY_Msk
SPI_EVENTS_READY_EVENTS_READY_NotGenerated
SPI_EVENTS_READY_EVENTS_READY_Pos
SPI_FREQUENCY_FREQUENCY_K125
SPI_FREQUENCY_FREQUENCY_K250
SPI_FREQUENCY_FREQUENCY_K500
SPI_FREQUENCY_FREQUENCY_M1
SPI_FREQUENCY_FREQUENCY_M2
SPI_FREQUENCY_FREQUENCY_M4
SPI_FREQUENCY_FREQUENCY_M8
SPI_FREQUENCY_FREQUENCY_Msk
SPI_FREQUENCY_FREQUENCY_Pos
SPI_INTENCLR_READY_Clear
SPI_INTENCLR_READY_Disabled
SPI_INTENCLR_READY_Enabled
SPI_INTENCLR_READY_Msk
SPI_INTENCLR_READY_Pos
SPI_INTENSET_READY_Disabled
SPI_INTENSET_READY_Enabled
SPI_INTENSET_READY_Msk
SPI_INTENSET_READY_Pos
SPI_INTENSET_READY_Set
SPI_NOCLK
SPI_NOCS
SPI_NODEV
SPI_NOMODE
SPI_OK
SPI_PSEL_MISO_CONNECT_Connected
SPI_PSEL_MISO_CONNECT_Disconnected
SPI_PSEL_MISO_CONNECT_Msk
SPI_PSEL_MISO_CONNECT_Pos
SPI_PSEL_MISO_PIN_Msk
SPI_PSEL_MISO_PIN_Pos
SPI_PSEL_MISO_PORT_Msk
SPI_PSEL_MISO_PORT_Pos
SPI_PSEL_MOSI_CONNECT_Connected
SPI_PSEL_MOSI_CONNECT_Disconnected
SPI_PSEL_MOSI_CONNECT_Msk
SPI_PSEL_MOSI_CONNECT_Pos
SPI_PSEL_MOSI_PIN_Msk
SPI_PSEL_MOSI_PIN_Pos
SPI_PSEL_MOSI_PORT_Msk
SPI_PSEL_MOSI_PORT_Pos
SPI_PSEL_SCK_CONNECT_Connected
SPI_PSEL_SCK_CONNECT_Disconnected
SPI_PSEL_SCK_CONNECT_Msk
SPI_PSEL_SCK_CONNECT_Pos
SPI_PSEL_SCK_PIN_Msk
SPI_PSEL_SCK_PIN_Pos
SPI_PSEL_SCK_PORT_Msk
SPI_PSEL_SCK_PORT_Pos
SPI_RXD_RXD_Msk
SPI_RXD_RXD_Pos
SPI_TXD_TXD_Msk
SPI_TXD_TXD_Pos
STACK_CANARY_WORD
STDERR_FILENO
STDIN_FILENO
STDIO_ESP32_SERIAL_JTAG
STDIO_ETHOS
STDIO_NIMBLE
STDIO_NULL
STDIO_RTT
STDIO_RX_BUFSIZE
STDIO_SEMIHOSTING
STDIO_SLIP
STDIO_TELNET
STDIO_TINYUSB_CDC_ACM
STDIO_UART
STDIO_UDP
STDIO_USBUS_CDC_ACM
STDOUT_FILENO
ST_NOSUID
ST_RDONLY
SUIT_CLASS_ID
SUIT_COMPONENT_DIGEST
SUIT_COMPONENT_IDENTIFIER
SUIT_COMPONENT_SIZE
SUIT_COMPONENT_STATE_FETCHED
SUIT_COMPONENT_STATE_FETCH_FAILED
SUIT_COMPONENT_STATE_FINALIZED
SUIT_COMPONENT_STATE_INSTALLED
SUIT_COMPONENT_STATE_VERIFIED
SUIT_COND_BEST_BEFORE
SUIT_COND_CLASS_ID
SUIT_COND_DEV_ID
SUIT_COND_VENDOR_ID
SUIT_COSE_BUF_SIZE
SUIT_STATE_COSE_AUTHENTICATED
SUIT_STATE_FULLY_AUTHENTICATED
SUIT_STATE_HAVE_COMPONENTS
SUIT_VENDOR_DOMAIN
SUIT_VERSION
SWI_COUNT
SYSTICK_COUNT
S_BLKSIZE
S_IFBLK
S_IFCHR
S_IFDIR
S_IFIFO
S_IFLNK
S_IFMT
S_IFREG
S_IFSOCK
S_IRGRP
S_IROTH
S_IRUSR
S_ISGID
S_ISUID
S_ISVTX
S_IWGRP
S_IWOTH
S_IWUSR
S_IXGRP
S_IXOTH
S_IXUSR
SysTick_BASE
SysTick_CALIB_NOREF_Msk
SysTick_CALIB_NOREF_Pos
SysTick_CALIB_SKEW_Msk
SysTick_CALIB_SKEW_Pos
SysTick_CALIB_TENMS_Msk
SysTick_CALIB_TENMS_Pos
SysTick_CTRL_CLKSOURCE_Msk
SysTick_CTRL_CLKSOURCE_Pos
SysTick_CTRL_COUNTFLAG_Msk
SysTick_CTRL_COUNTFLAG_Pos
SysTick_CTRL_ENABLE_Msk
SysTick_CTRL_ENABLE_Pos
SysTick_CTRL_TICKINT_Msk
SysTick_CTRL_TICKINT_Pos
SysTick_LOAD_RELOAD_Msk
SysTick_LOAD_RELOAD_Pos
SysTick_VAL_CURRENT_Msk
SysTick_VAL_CURRENT_Pos
TEMP_A0_A0_Msk
TEMP_A0_A0_Pos
TEMP_A1_A1_Msk
TEMP_A1_A1_Pos
TEMP_A2_A2_Msk
TEMP_A2_A2_Pos
TEMP_A3_A3_Msk
TEMP_A3_A3_Pos
TEMP_A4_A4_Msk
TEMP_A4_A4_Pos
TEMP_A5_A5_Msk
TEMP_A5_A5_Pos
TEMP_B0_B0_Msk
TEMP_B0_B0_Pos
TEMP_B1_B1_Msk
TEMP_B1_B1_Pos
TEMP_B2_B2_Msk
TEMP_B2_B2_Pos
TEMP_B3_B3_Msk
TEMP_B3_B3_Pos
TEMP_B4_B4_Msk
TEMP_B4_B4_Pos
TEMP_B5_B5_Msk
TEMP_B5_B5_Pos
TEMP_COUNT
TEMP_EVENTS_DATARDY_EVENTS_DATARDY_Generated
TEMP_EVENTS_DATARDY_EVENTS_DATARDY_Msk
TEMP_EVENTS_DATARDY_EVENTS_DATARDY_NotGenerated
TEMP_EVENTS_DATARDY_EVENTS_DATARDY_Pos
TEMP_INTENCLR_DATARDY_Clear
TEMP_INTENCLR_DATARDY_Disabled
TEMP_INTENCLR_DATARDY_Enabled
TEMP_INTENCLR_DATARDY_Msk
TEMP_INTENCLR_DATARDY_Pos
TEMP_INTENSET_DATARDY_Disabled
TEMP_INTENSET_DATARDY_Enabled
TEMP_INTENSET_DATARDY_Msk
TEMP_INTENSET_DATARDY_Pos
TEMP_INTENSET_DATARDY_Set
TEMP_T0_T0_Msk
TEMP_T0_T0_Pos
TEMP_T1_T1_Msk
TEMP_T1_T1_Pos
TEMP_T2_T2_Msk
TEMP_T2_T2_Pos
TEMP_T3_T3_Msk
TEMP_T3_T3_Pos
TEMP_T4_T4_Msk
TEMP_T4_T4_Pos
TEMP_TASKS_START_TASKS_START_Msk
TEMP_TASKS_START_TASKS_START_Pos
TEMP_TASKS_START_TASKS_START_Trigger
TEMP_TASKS_STOP_TASKS_STOP_Msk
TEMP_TASKS_STOP_TASKS_STOP_Pos
TEMP_TASKS_STOP_TASKS_STOP_Trigger
TEMP_TEMP_TEMP_Msk
TEMP_TEMP_TEMP_Pos
THREAD_AUTO_FREE
THREAD_CREATE_NO_STACKTEST
THREAD_CREATE_SLEEPING
THREAD_CREATE_STACKTEST
THREAD_CREATE_WOUT_YIELD
THREAD_EXTRA_STACKSIZE_PRINTF
THREAD_FLAG_EVENT
THREAD_FLAG_MSG_WAITING
THREAD_FLAG_PREDEFINED_MASK
THREAD_FLAG_TIMEOUT
THREAD_PRIORITY_IDLE
THREAD_PRIORITY_MAIN
THREAD_PRIORITY_MIN
THREAD_STACKSIZE_DEFAULT
THREAD_STACKSIZE_IDLE
THREAD_STACKSIZE_MAIN
THREAD_STACKSIZE_MEDIUM
THREAD_STACKSIZE_SMALL
THREAD_STACKSIZE_TINY
TIMER0_CC_NUM
TIMER0_MAX_SIZE
TIMER1_CC_NUM
TIMER1_MAX_SIZE
TIMER2_CC_NUM
TIMER2_MAX_SIZE
TIMER3_CC_NUM
TIMER3_MAX_SIZE
TIMER4_CC_NUM
TIMER4_MAX_SIZE
TIMER_0_MAX_VALUE
TIMER_1_MAX_VALUE
TIMER_2_MAX_VALUE
TIMER_3_MAX_VALUE
TIMER_ABSTIME
TIMER_BITMODE_BITMODE_08Bit
TIMER_BITMODE_BITMODE_16Bit
TIMER_BITMODE_BITMODE_24Bit
TIMER_BITMODE_BITMODE_32Bit
TIMER_BITMODE_BITMODE_Msk
TIMER_BITMODE_BITMODE_Pos
TIMER_CC_CC_Msk
TIMER_CC_CC_Pos
TIMER_CHANNEL_NUMOF
TIMER_COUNT
TIMER_EVENTS_COMPARE_EVENTS_COMPARE_Generated
TIMER_EVENTS_COMPARE_EVENTS_COMPARE_Msk
TIMER_EVENTS_COMPARE_EVENTS_COMPARE_NotGenerated
TIMER_EVENTS_COMPARE_EVENTS_COMPARE_Pos
TIMER_INTENCLR_COMPARE0_Clear
TIMER_INTENCLR_COMPARE0_Disabled
TIMER_INTENCLR_COMPARE0_Enabled
TIMER_INTENCLR_COMPARE0_Msk
TIMER_INTENCLR_COMPARE0_Pos
TIMER_INTENCLR_COMPARE1_Clear
TIMER_INTENCLR_COMPARE1_Disabled
TIMER_INTENCLR_COMPARE1_Enabled
TIMER_INTENCLR_COMPARE1_Msk
TIMER_INTENCLR_COMPARE1_Pos
TIMER_INTENCLR_COMPARE2_Clear
TIMER_INTENCLR_COMPARE2_Disabled
TIMER_INTENCLR_COMPARE2_Enabled
TIMER_INTENCLR_COMPARE2_Msk
TIMER_INTENCLR_COMPARE2_Pos
TIMER_INTENCLR_COMPARE3_Clear
TIMER_INTENCLR_COMPARE3_Disabled
TIMER_INTENCLR_COMPARE3_Enabled
TIMER_INTENCLR_COMPARE3_Msk
TIMER_INTENCLR_COMPARE3_Pos
TIMER_INTENCLR_COMPARE4_Clear
TIMER_INTENCLR_COMPARE4_Disabled
TIMER_INTENCLR_COMPARE4_Enabled
TIMER_INTENCLR_COMPARE4_Msk
TIMER_INTENCLR_COMPARE4_Pos
TIMER_INTENCLR_COMPARE5_Clear
TIMER_INTENCLR_COMPARE5_Disabled
TIMER_INTENCLR_COMPARE5_Enabled
TIMER_INTENCLR_COMPARE5_Msk
TIMER_INTENCLR_COMPARE5_Pos
TIMER_INTENSET_COMPARE0_Disabled
TIMER_INTENSET_COMPARE0_Enabled
TIMER_INTENSET_COMPARE0_Msk
TIMER_INTENSET_COMPARE0_Pos
TIMER_INTENSET_COMPARE0_Set
TIMER_INTENSET_COMPARE1_Disabled
TIMER_INTENSET_COMPARE1_Enabled
TIMER_INTENSET_COMPARE1_Msk
TIMER_INTENSET_COMPARE1_Pos
TIMER_INTENSET_COMPARE1_Set
TIMER_INTENSET_COMPARE2_Disabled
TIMER_INTENSET_COMPARE2_Enabled
TIMER_INTENSET_COMPARE2_Msk
TIMER_INTENSET_COMPARE2_Pos
TIMER_INTENSET_COMPARE2_Set
TIMER_INTENSET_COMPARE3_Disabled
TIMER_INTENSET_COMPARE3_Enabled
TIMER_INTENSET_COMPARE3_Msk
TIMER_INTENSET_COMPARE3_Pos
TIMER_INTENSET_COMPARE3_Set
TIMER_INTENSET_COMPARE4_Disabled
TIMER_INTENSET_COMPARE4_Enabled
TIMER_INTENSET_COMPARE4_Msk
TIMER_INTENSET_COMPARE4_Pos
TIMER_INTENSET_COMPARE4_Set
TIMER_INTENSET_COMPARE5_Disabled
TIMER_INTENSET_COMPARE5_Enabled
TIMER_INTENSET_COMPARE5_Msk
TIMER_INTENSET_COMPARE5_Pos
TIMER_INTENSET_COMPARE5_Set
TIMER_MODE_MODE_Counter
TIMER_MODE_MODE_LowPowerCounter
TIMER_MODE_MODE_Msk
TIMER_MODE_MODE_Pos
TIMER_MODE_MODE_Timer
TIMER_PRESCALER_PRESCALER_Msk
TIMER_PRESCALER_PRESCALER_Pos
TIMER_SHORTS_COMPARE0_CLEAR_Disabled
TIMER_SHORTS_COMPARE0_CLEAR_Enabled
TIMER_SHORTS_COMPARE0_CLEAR_Msk
TIMER_SHORTS_COMPARE0_CLEAR_Pos
TIMER_SHORTS_COMPARE0_STOP_Disabled
TIMER_SHORTS_COMPARE0_STOP_Enabled
TIMER_SHORTS_COMPARE0_STOP_Msk
TIMER_SHORTS_COMPARE0_STOP_Pos
TIMER_SHORTS_COMPARE1_CLEAR_Disabled
TIMER_SHORTS_COMPARE1_CLEAR_Enabled
TIMER_SHORTS_COMPARE1_CLEAR_Msk
TIMER_SHORTS_COMPARE1_CLEAR_Pos
TIMER_SHORTS_COMPARE1_STOP_Disabled
TIMER_SHORTS_COMPARE1_STOP_Enabled
TIMER_SHORTS_COMPARE1_STOP_Msk
TIMER_SHORTS_COMPARE1_STOP_Pos
TIMER_SHORTS_COMPARE2_CLEAR_Disabled
TIMER_SHORTS_COMPARE2_CLEAR_Enabled
TIMER_SHORTS_COMPARE2_CLEAR_Msk
TIMER_SHORTS_COMPARE2_CLEAR_Pos
TIMER_SHORTS_COMPARE2_STOP_Disabled
TIMER_SHORTS_COMPARE2_STOP_Enabled
TIMER_SHORTS_COMPARE2_STOP_Msk
TIMER_SHORTS_COMPARE2_STOP_Pos
TIMER_SHORTS_COMPARE3_CLEAR_Disabled
TIMER_SHORTS_COMPARE3_CLEAR_Enabled
TIMER_SHORTS_COMPARE3_CLEAR_Msk
TIMER_SHORTS_COMPARE3_CLEAR_Pos
TIMER_SHORTS_COMPARE3_STOP_Disabled
TIMER_SHORTS_COMPARE3_STOP_Enabled
TIMER_SHORTS_COMPARE3_STOP_Msk
TIMER_SHORTS_COMPARE3_STOP_Pos
TIMER_SHORTS_COMPARE4_CLEAR_Disabled
TIMER_SHORTS_COMPARE4_CLEAR_Enabled
TIMER_SHORTS_COMPARE4_CLEAR_Msk
TIMER_SHORTS_COMPARE4_CLEAR_Pos
TIMER_SHORTS_COMPARE4_STOP_Disabled
TIMER_SHORTS_COMPARE4_STOP_Enabled
TIMER_SHORTS_COMPARE4_STOP_Msk
TIMER_SHORTS_COMPARE4_STOP_Pos
TIMER_SHORTS_COMPARE5_CLEAR_Disabled
TIMER_SHORTS_COMPARE5_CLEAR_Enabled
TIMER_SHORTS_COMPARE5_CLEAR_Msk
TIMER_SHORTS_COMPARE5_CLEAR_Pos
TIMER_SHORTS_COMPARE5_STOP_Disabled
TIMER_SHORTS_COMPARE5_STOP_Enabled
TIMER_SHORTS_COMPARE5_STOP_Msk
TIMER_SHORTS_COMPARE5_STOP_Pos
TIMER_TASKS_CAPTURE_TASKS_CAPTURE_Msk
TIMER_TASKS_CAPTURE_TASKS_CAPTURE_Pos
TIMER_TASKS_CAPTURE_TASKS_CAPTURE_Trigger
TIMER_TASKS_CLEAR_TASKS_CLEAR_Msk
TIMER_TASKS_CLEAR_TASKS_CLEAR_Pos
TIMER_TASKS_CLEAR_TASKS_CLEAR_Trigger
TIMER_TASKS_COUNT_TASKS_COUNT_Msk
TIMER_TASKS_COUNT_TASKS_COUNT_Pos
TIMER_TASKS_COUNT_TASKS_COUNT_Trigger
TIMER_TASKS_SHUTDOWN_TASKS_SHUTDOWN_Msk
TIMER_TASKS_SHUTDOWN_TASKS_SHUTDOWN_Pos
TIMER_TASKS_SHUTDOWN_TASKS_SHUTDOWN_Trigger
TIMER_TASKS_START_TASKS_START_Msk
TIMER_TASKS_START_TASKS_START_Pos
TIMER_TASKS_START_TASKS_START_Trigger
TIMER_TASKS_STOP_TASKS_STOP_Msk
TIMER_TASKS_STOP_TASKS_STOP_Pos
TIMER_TASKS_STOP_TASKS_STOP_Trigger
TIMEX_MAX_STR_LEN
TIM_FLAG_RESET_ON_MATCH
TIM_FLAG_RESET_ON_SET
TIM_FLAG_SET_STOPPED
TMP_MAX
TPI_ACPR_PRESCALER_Msk
TPI_ACPR_PRESCALER_Pos
TPI_BASE
TPI_DEVID_AsynClkIn_Msk
TPI_DEVID_AsynClkIn_Pos
TPI_DEVID_MANCVALID_Msk
TPI_DEVID_MANCVALID_Pos
TPI_DEVID_MinBufSz_Msk
TPI_DEVID_MinBufSz_Pos
TPI_DEVID_NRZVALID_Msk
TPI_DEVID_NRZVALID_Pos
TPI_DEVID_NrTraceInput_Msk
TPI_DEVID_NrTraceInput_Pos
TPI_DEVID_PTINVALID_Msk
TPI_DEVID_PTINVALID_Pos
TPI_DEVTYPE_MajorType_Msk
TPI_DEVTYPE_MajorType_Pos
TPI_DEVTYPE_SubType_Msk
TPI_DEVTYPE_SubType_Pos
TPI_FFCR_EnFCont_Msk
TPI_FFCR_EnFCont_Pos
TPI_FFCR_TrigIn_Msk
TPI_FFCR_TrigIn_Pos
TPI_FFSR_FlInProg_Msk
TPI_FFSR_FlInProg_Pos
TPI_FFSR_FtNonStop_Msk
TPI_FFSR_FtNonStop_Pos
TPI_FFSR_FtStopped_Msk
TPI_FFSR_FtStopped_Pos
TPI_FFSR_TCPresent_Msk
TPI_FFSR_TCPresent_Pos
TPI_FIFO0_ETM0_Msk
TPI_FIFO0_ETM0_Pos
TPI_FIFO0_ETM1_Msk
TPI_FIFO0_ETM1_Pos
TPI_FIFO0_ETM2_Msk
TPI_FIFO0_ETM2_Pos
TPI_FIFO0_ETM_ATVALID_Msk
TPI_FIFO0_ETM_ATVALID_Pos
TPI_FIFO0_ETM_bytecount_Msk
TPI_FIFO0_ETM_bytecount_Pos
TPI_FIFO0_ITM_ATVALID_Msk
TPI_FIFO0_ITM_ATVALID_Pos
TPI_FIFO0_ITM_bytecount_Msk
TPI_FIFO0_ITM_bytecount_Pos
TPI_FIFO1_ETM_ATVALID_Msk
TPI_FIFO1_ETM_ATVALID_Pos
TPI_FIFO1_ETM_bytecount_Msk
TPI_FIFO1_ETM_bytecount_Pos
TPI_FIFO1_ITM0_Msk
TPI_FIFO1_ITM0_Pos
TPI_FIFO1_ITM1_Msk
TPI_FIFO1_ITM1_Pos
TPI_FIFO1_ITM2_Msk
TPI_FIFO1_ITM2_Pos
TPI_FIFO1_ITM_ATVALID_Msk
TPI_FIFO1_ITM_ATVALID_Pos
TPI_FIFO1_ITM_bytecount_Msk
TPI_FIFO1_ITM_bytecount_Pos
TPI_ITATBCTR0_ATREADY1_Msk
TPI_ITATBCTR0_ATREADY1_Pos
TPI_ITATBCTR0_ATREADY2_Msk
TPI_ITATBCTR0_ATREADY2_Pos
TPI_ITATBCTR2_ATREADY1_Msk
TPI_ITATBCTR2_ATREADY1_Pos
TPI_ITATBCTR2_ATREADY2_Msk
TPI_ITATBCTR2_ATREADY2_Pos
TPI_ITCTRL_Mode_Msk
TPI_ITCTRL_Mode_Pos
TPI_SPPR_TXMODE_Msk
TPI_SPPR_TXMODE_Pos
TPI_TRIGGER_TRIGGER_Msk
TPI_TRIGGER_TRIGGER_Pos
TWIM0_EASYDMA_MAXCNT_SIZE
TWIM1_EASYDMA_MAXCNT_SIZE
TWIM_ADDRESS_ADDRESS_Msk
TWIM_ADDRESS_ADDRESS_Pos
TWIM_COUNT
TWIM_ENABLE_ENABLE_Disabled
TWIM_ENABLE_ENABLE_Enabled
TWIM_ENABLE_ENABLE_Msk
TWIM_ENABLE_ENABLE_Pos
TWIM_ERRORSRC_ANACK_Msk
TWIM_ERRORSRC_ANACK_NotReceived
TWIM_ERRORSRC_ANACK_Pos
TWIM_ERRORSRC_ANACK_Received
TWIM_ERRORSRC_DNACK_Msk
TWIM_ERRORSRC_DNACK_NotReceived
TWIM_ERRORSRC_DNACK_Pos
TWIM_ERRORSRC_DNACK_Received
TWIM_ERRORSRC_OVERRUN_Msk
TWIM_ERRORSRC_OVERRUN_NotReceived
TWIM_ERRORSRC_OVERRUN_Pos
TWIM_ERRORSRC_OVERRUN_Received
TWIM_EVENTS_ERROR_EVENTS_ERROR_Generated
TWIM_EVENTS_ERROR_EVENTS_ERROR_Msk
TWIM_EVENTS_ERROR_EVENTS_ERROR_NotGenerated
TWIM_EVENTS_ERROR_EVENTS_ERROR_Pos
TWIM_EVENTS_LASTRX_EVENTS_LASTRX_Generated
TWIM_EVENTS_LASTRX_EVENTS_LASTRX_Msk
TWIM_EVENTS_LASTRX_EVENTS_LASTRX_NotGenerated
TWIM_EVENTS_LASTRX_EVENTS_LASTRX_Pos
TWIM_EVENTS_LASTTX_EVENTS_LASTTX_Generated
TWIM_EVENTS_LASTTX_EVENTS_LASTTX_Msk
TWIM_EVENTS_LASTTX_EVENTS_LASTTX_NotGenerated
TWIM_EVENTS_LASTTX_EVENTS_LASTTX_Pos
TWIM_EVENTS_RXSTARTED_EVENTS_RXSTARTED_Generated
TWIM_EVENTS_RXSTARTED_EVENTS_RXSTARTED_Msk
TWIM_EVENTS_RXSTARTED_EVENTS_RXSTARTED_NotGenerated
TWIM_EVENTS_RXSTARTED_EVENTS_RXSTARTED_Pos
TWIM_EVENTS_STOPPED_EVENTS_STOPPED_Generated
TWIM_EVENTS_STOPPED_EVENTS_STOPPED_Msk
TWIM_EVENTS_STOPPED_EVENTS_STOPPED_NotGenerated
TWIM_EVENTS_STOPPED_EVENTS_STOPPED_Pos
TWIM_EVENTS_SUSPENDED_EVENTS_SUSPENDED_Generated
TWIM_EVENTS_SUSPENDED_EVENTS_SUSPENDED_Msk
TWIM_EVENTS_SUSPENDED_EVENTS_SUSPENDED_NotGenerated
TWIM_EVENTS_SUSPENDED_EVENTS_SUSPENDED_Pos
TWIM_EVENTS_TXSTARTED_EVENTS_TXSTARTED_Generated
TWIM_EVENTS_TXSTARTED_EVENTS_TXSTARTED_Msk
TWIM_EVENTS_TXSTARTED_EVENTS_TXSTARTED_NotGenerated
TWIM_EVENTS_TXSTARTED_EVENTS_TXSTARTED_Pos
TWIM_FREQUENCY_FREQUENCY_K100
TWIM_FREQUENCY_FREQUENCY_K250
TWIM_FREQUENCY_FREQUENCY_K400
TWIM_FREQUENCY_FREQUENCY_Msk
TWIM_FREQUENCY_FREQUENCY_Pos
TWIM_INTENCLR_ERROR_Clear
TWIM_INTENCLR_ERROR_Disabled
TWIM_INTENCLR_ERROR_Enabled
TWIM_INTENCLR_ERROR_Msk
TWIM_INTENCLR_ERROR_Pos
TWIM_INTENCLR_LASTRX_Clear
TWIM_INTENCLR_LASTRX_Disabled
TWIM_INTENCLR_LASTRX_Enabled
TWIM_INTENCLR_LASTRX_Msk
TWIM_INTENCLR_LASTRX_Pos
TWIM_INTENCLR_LASTTX_Clear
TWIM_INTENCLR_LASTTX_Disabled
TWIM_INTENCLR_LASTTX_Enabled
TWIM_INTENCLR_LASTTX_Msk
TWIM_INTENCLR_LASTTX_Pos
TWIM_INTENCLR_RXSTARTED_Clear
TWIM_INTENCLR_RXSTARTED_Disabled
TWIM_INTENCLR_RXSTARTED_Enabled
TWIM_INTENCLR_RXSTARTED_Msk
TWIM_INTENCLR_RXSTARTED_Pos
TWIM_INTENCLR_STOPPED_Clear
TWIM_INTENCLR_STOPPED_Disabled
TWIM_INTENCLR_STOPPED_Enabled
TWIM_INTENCLR_STOPPED_Msk
TWIM_INTENCLR_STOPPED_Pos
TWIM_INTENCLR_SUSPENDED_Clear
TWIM_INTENCLR_SUSPENDED_Disabled
TWIM_INTENCLR_SUSPENDED_Enabled
TWIM_INTENCLR_SUSPENDED_Msk
TWIM_INTENCLR_SUSPENDED_Pos
TWIM_INTENCLR_TXSTARTED_Clear
TWIM_INTENCLR_TXSTARTED_Disabled
TWIM_INTENCLR_TXSTARTED_Enabled
TWIM_INTENCLR_TXSTARTED_Msk
TWIM_INTENCLR_TXSTARTED_Pos
TWIM_INTENSET_ERROR_Disabled
TWIM_INTENSET_ERROR_Enabled
TWIM_INTENSET_ERROR_Msk
TWIM_INTENSET_ERROR_Pos
TWIM_INTENSET_ERROR_Set
TWIM_INTENSET_LASTRX_Disabled
TWIM_INTENSET_LASTRX_Enabled
TWIM_INTENSET_LASTRX_Msk
TWIM_INTENSET_LASTRX_Pos
TWIM_INTENSET_LASTRX_Set
TWIM_INTENSET_LASTTX_Disabled
TWIM_INTENSET_LASTTX_Enabled
TWIM_INTENSET_LASTTX_Msk
TWIM_INTENSET_LASTTX_Pos
TWIM_INTENSET_LASTTX_Set
TWIM_INTENSET_RXSTARTED_Disabled
TWIM_INTENSET_RXSTARTED_Enabled
TWIM_INTENSET_RXSTARTED_Msk
TWIM_INTENSET_RXSTARTED_Pos
TWIM_INTENSET_RXSTARTED_Set
TWIM_INTENSET_STOPPED_Disabled
TWIM_INTENSET_STOPPED_Enabled
TWIM_INTENSET_STOPPED_Msk
TWIM_INTENSET_STOPPED_Pos
TWIM_INTENSET_STOPPED_Set
TWIM_INTENSET_SUSPENDED_Disabled
TWIM_INTENSET_SUSPENDED_Enabled
TWIM_INTENSET_SUSPENDED_Msk
TWIM_INTENSET_SUSPENDED_Pos
TWIM_INTENSET_SUSPENDED_Set
TWIM_INTENSET_TXSTARTED_Disabled
TWIM_INTENSET_TXSTARTED_Enabled
TWIM_INTENSET_TXSTARTED_Msk
TWIM_INTENSET_TXSTARTED_Pos
TWIM_INTENSET_TXSTARTED_Set
TWIM_INTEN_ERROR_Disabled
TWIM_INTEN_ERROR_Enabled
TWIM_INTEN_ERROR_Msk
TWIM_INTEN_ERROR_Pos
TWIM_INTEN_LASTRX_Disabled
TWIM_INTEN_LASTRX_Enabled
TWIM_INTEN_LASTRX_Msk
TWIM_INTEN_LASTRX_Pos
TWIM_INTEN_LASTTX_Disabled
TWIM_INTEN_LASTTX_Enabled
TWIM_INTEN_LASTTX_Msk
TWIM_INTEN_LASTTX_Pos
TWIM_INTEN_RXSTARTED_Disabled
TWIM_INTEN_RXSTARTED_Enabled
TWIM_INTEN_RXSTARTED_Msk
TWIM_INTEN_RXSTARTED_Pos
TWIM_INTEN_STOPPED_Disabled
TWIM_INTEN_STOPPED_Enabled
TWIM_INTEN_STOPPED_Msk
TWIM_INTEN_STOPPED_Pos
TWIM_INTEN_SUSPENDED_Disabled
TWIM_INTEN_SUSPENDED_Enabled
TWIM_INTEN_SUSPENDED_Msk
TWIM_INTEN_SUSPENDED_Pos
TWIM_INTEN_TXSTARTED_Disabled
TWIM_INTEN_TXSTARTED_Enabled
TWIM_INTEN_TXSTARTED_Msk
TWIM_INTEN_TXSTARTED_Pos
TWIM_PSEL_SCL_CONNECT_Connected
TWIM_PSEL_SCL_CONNECT_Disconnected
TWIM_PSEL_SCL_CONNECT_Msk
TWIM_PSEL_SCL_CONNECT_Pos
TWIM_PSEL_SCL_PIN_Msk
TWIM_PSEL_SCL_PIN_Pos
TWIM_PSEL_SCL_PORT_Msk
TWIM_PSEL_SCL_PORT_Pos
TWIM_PSEL_SDA_CONNECT_Connected
TWIM_PSEL_SDA_CONNECT_Disconnected
TWIM_PSEL_SDA_CONNECT_Msk
TWIM_PSEL_SDA_CONNECT_Pos
TWIM_PSEL_SDA_PIN_Msk
TWIM_PSEL_SDA_PIN_Pos
TWIM_PSEL_SDA_PORT_Msk
TWIM_PSEL_SDA_PORT_Pos
TWIM_RXD_AMOUNT_AMOUNT_Msk
TWIM_RXD_AMOUNT_AMOUNT_Pos
TWIM_RXD_LIST_LIST_ArrayList
TWIM_RXD_LIST_LIST_Disabled
TWIM_RXD_LIST_LIST_Msk
TWIM_RXD_LIST_LIST_Pos
TWIM_RXD_MAXCNT_MAXCNT_Msk
TWIM_RXD_MAXCNT_MAXCNT_Pos
TWIM_RXD_PTR_PTR_Msk
TWIM_RXD_PTR_PTR_Pos
TWIM_SHORTS_LASTRX_STARTTX_Disabled
TWIM_SHORTS_LASTRX_STARTTX_Enabled
TWIM_SHORTS_LASTRX_STARTTX_Msk
TWIM_SHORTS_LASTRX_STARTTX_Pos
TWIM_SHORTS_LASTRX_STOP_Disabled
TWIM_SHORTS_LASTRX_STOP_Enabled
TWIM_SHORTS_LASTRX_STOP_Msk
TWIM_SHORTS_LASTRX_STOP_Pos
TWIM_SHORTS_LASTRX_SUSPEND_Disabled
TWIM_SHORTS_LASTRX_SUSPEND_Enabled
TWIM_SHORTS_LASTRX_SUSPEND_Msk
TWIM_SHORTS_LASTRX_SUSPEND_Pos
TWIM_SHORTS_LASTTX_STARTRX_Disabled
TWIM_SHORTS_LASTTX_STARTRX_Enabled
TWIM_SHORTS_LASTTX_STARTRX_Msk
TWIM_SHORTS_LASTTX_STARTRX_Pos
TWIM_SHORTS_LASTTX_STOP_Disabled
TWIM_SHORTS_LASTTX_STOP_Enabled
TWIM_SHORTS_LASTTX_STOP_Msk
TWIM_SHORTS_LASTTX_STOP_Pos
TWIM_SHORTS_LASTTX_SUSPEND_Disabled
TWIM_SHORTS_LASTTX_SUSPEND_Enabled
TWIM_SHORTS_LASTTX_SUSPEND_Msk
TWIM_SHORTS_LASTTX_SUSPEND_Pos
TWIM_TASKS_RESUME_TASKS_RESUME_Msk
TWIM_TASKS_RESUME_TASKS_RESUME_Pos
TWIM_TASKS_RESUME_TASKS_RESUME_Trigger
TWIM_TASKS_STARTRX_TASKS_STARTRX_Msk
TWIM_TASKS_STARTRX_TASKS_STARTRX_Pos
TWIM_TASKS_STARTRX_TASKS_STARTRX_Trigger
TWIM_TASKS_STARTTX_TASKS_STARTTX_Msk
TWIM_TASKS_STARTTX_TASKS_STARTTX_Pos
TWIM_TASKS_STARTTX_TASKS_STARTTX_Trigger
TWIM_TASKS_STOP_TASKS_STOP_Msk
TWIM_TASKS_STOP_TASKS_STOP_Pos
TWIM_TASKS_STOP_TASKS_STOP_Trigger
TWIM_TASKS_SUSPEND_TASKS_SUSPEND_Msk
TWIM_TASKS_SUSPEND_TASKS_SUSPEND_Pos
TWIM_TASKS_SUSPEND_TASKS_SUSPEND_Trigger
TWIM_TXD_AMOUNT_AMOUNT_Msk
TWIM_TXD_AMOUNT_AMOUNT_Pos
TWIM_TXD_LIST_LIST_ArrayList
TWIM_TXD_LIST_LIST_Disabled
TWIM_TXD_LIST_LIST_Msk
TWIM_TXD_LIST_LIST_Pos
TWIM_TXD_MAXCNT_MAXCNT_Msk
TWIM_TXD_MAXCNT_MAXCNT_Pos
TWIM_TXD_PTR_PTR_Msk
TWIM_TXD_PTR_PTR_Pos
TWIS0_EASYDMA_MAXCNT_SIZE
TWIS1_EASYDMA_MAXCNT_SIZE
TWIS_ADDRESS_ADDRESS_Msk
TWIS_ADDRESS_ADDRESS_Pos
TWIS_CONFIG_ADDRESS0_Disabled
TWIS_CONFIG_ADDRESS0_Enabled
TWIS_CONFIG_ADDRESS0_Msk
TWIS_CONFIG_ADDRESS0_Pos
TWIS_CONFIG_ADDRESS1_Disabled
TWIS_CONFIG_ADDRESS1_Enabled
TWIS_CONFIG_ADDRESS1_Msk
TWIS_CONFIG_ADDRESS1_Pos
TWIS_COUNT
TWIS_ENABLE_ENABLE_Disabled
TWIS_ENABLE_ENABLE_Enabled
TWIS_ENABLE_ENABLE_Msk
TWIS_ENABLE_ENABLE_Pos
TWIS_ERRORSRC_DNACK_Msk
TWIS_ERRORSRC_DNACK_NotReceived
TWIS_ERRORSRC_DNACK_Pos
TWIS_ERRORSRC_DNACK_Received
TWIS_ERRORSRC_OVERFLOW_Detected
TWIS_ERRORSRC_OVERFLOW_Msk
TWIS_ERRORSRC_OVERFLOW_NotDetected
TWIS_ERRORSRC_OVERFLOW_Pos
TWIS_ERRORSRC_OVERREAD_Detected
TWIS_ERRORSRC_OVERREAD_Msk
TWIS_ERRORSRC_OVERREAD_NotDetected
TWIS_ERRORSRC_OVERREAD_Pos
TWIS_EVENTS_ERROR_EVENTS_ERROR_Generated
TWIS_EVENTS_ERROR_EVENTS_ERROR_Msk
TWIS_EVENTS_ERROR_EVENTS_ERROR_NotGenerated
TWIS_EVENTS_ERROR_EVENTS_ERROR_Pos
TWIS_EVENTS_READ_EVENTS_READ_Generated
TWIS_EVENTS_READ_EVENTS_READ_Msk
TWIS_EVENTS_READ_EVENTS_READ_NotGenerated
TWIS_EVENTS_READ_EVENTS_READ_Pos
TWIS_EVENTS_RXSTARTED_EVENTS_RXSTARTED_Generated
TWIS_EVENTS_RXSTARTED_EVENTS_RXSTARTED_Msk
TWIS_EVENTS_RXSTARTED_EVENTS_RXSTARTED_NotGenerated
TWIS_EVENTS_RXSTARTED_EVENTS_RXSTARTED_Pos
TWIS_EVENTS_STOPPED_EVENTS_STOPPED_Generated
TWIS_EVENTS_STOPPED_EVENTS_STOPPED_Msk
TWIS_EVENTS_STOPPED_EVENTS_STOPPED_NotGenerated
TWIS_EVENTS_STOPPED_EVENTS_STOPPED_Pos
TWIS_EVENTS_TXSTARTED_EVENTS_TXSTARTED_Generated
TWIS_EVENTS_TXSTARTED_EVENTS_TXSTARTED_Msk
TWIS_EVENTS_TXSTARTED_EVENTS_TXSTARTED_NotGenerated
TWIS_EVENTS_TXSTARTED_EVENTS_TXSTARTED_Pos
TWIS_EVENTS_WRITE_EVENTS_WRITE_Generated
TWIS_EVENTS_WRITE_EVENTS_WRITE_Msk
TWIS_EVENTS_WRITE_EVENTS_WRITE_NotGenerated
TWIS_EVENTS_WRITE_EVENTS_WRITE_Pos
TWIS_INTENCLR_ERROR_Clear
TWIS_INTENCLR_ERROR_Disabled
TWIS_INTENCLR_ERROR_Enabled
TWIS_INTENCLR_ERROR_Msk
TWIS_INTENCLR_ERROR_Pos
TWIS_INTENCLR_READ_Clear
TWIS_INTENCLR_READ_Disabled
TWIS_INTENCLR_READ_Enabled
TWIS_INTENCLR_READ_Msk
TWIS_INTENCLR_READ_Pos
TWIS_INTENCLR_RXSTARTED_Clear
TWIS_INTENCLR_RXSTARTED_Disabled
TWIS_INTENCLR_RXSTARTED_Enabled
TWIS_INTENCLR_RXSTARTED_Msk
TWIS_INTENCLR_RXSTARTED_Pos
TWIS_INTENCLR_STOPPED_Clear
TWIS_INTENCLR_STOPPED_Disabled
TWIS_INTENCLR_STOPPED_Enabled
TWIS_INTENCLR_STOPPED_Msk
TWIS_INTENCLR_STOPPED_Pos
TWIS_INTENCLR_TXSTARTED_Clear
TWIS_INTENCLR_TXSTARTED_Disabled
TWIS_INTENCLR_TXSTARTED_Enabled
TWIS_INTENCLR_TXSTARTED_Msk
TWIS_INTENCLR_TXSTARTED_Pos
TWIS_INTENCLR_WRITE_Clear
TWIS_INTENCLR_WRITE_Disabled
TWIS_INTENCLR_WRITE_Enabled
TWIS_INTENCLR_WRITE_Msk
TWIS_INTENCLR_WRITE_Pos
TWIS_INTENSET_ERROR_Disabled
TWIS_INTENSET_ERROR_Enabled
TWIS_INTENSET_ERROR_Msk
TWIS_INTENSET_ERROR_Pos
TWIS_INTENSET_ERROR_Set
TWIS_INTENSET_READ_Disabled
TWIS_INTENSET_READ_Enabled
TWIS_INTENSET_READ_Msk
TWIS_INTENSET_READ_Pos
TWIS_INTENSET_READ_Set
TWIS_INTENSET_RXSTARTED_Disabled
TWIS_INTENSET_RXSTARTED_Enabled
TWIS_INTENSET_RXSTARTED_Msk
TWIS_INTENSET_RXSTARTED_Pos
TWIS_INTENSET_RXSTARTED_Set
TWIS_INTENSET_STOPPED_Disabled
TWIS_INTENSET_STOPPED_Enabled
TWIS_INTENSET_STOPPED_Msk
TWIS_INTENSET_STOPPED_Pos
TWIS_INTENSET_STOPPED_Set
TWIS_INTENSET_TXSTARTED_Disabled
TWIS_INTENSET_TXSTARTED_Enabled
TWIS_INTENSET_TXSTARTED_Msk
TWIS_INTENSET_TXSTARTED_Pos
TWIS_INTENSET_TXSTARTED_Set
TWIS_INTENSET_WRITE_Disabled
TWIS_INTENSET_WRITE_Enabled
TWIS_INTENSET_WRITE_Msk
TWIS_INTENSET_WRITE_Pos
TWIS_INTENSET_WRITE_Set
TWIS_INTEN_ERROR_Disabled
TWIS_INTEN_ERROR_Enabled
TWIS_INTEN_ERROR_Msk
TWIS_INTEN_ERROR_Pos
TWIS_INTEN_READ_Disabled
TWIS_INTEN_READ_Enabled
TWIS_INTEN_READ_Msk
TWIS_INTEN_READ_Pos
TWIS_INTEN_RXSTARTED_Disabled
TWIS_INTEN_RXSTARTED_Enabled
TWIS_INTEN_RXSTARTED_Msk
TWIS_INTEN_RXSTARTED_Pos
TWIS_INTEN_STOPPED_Disabled
TWIS_INTEN_STOPPED_Enabled
TWIS_INTEN_STOPPED_Msk
TWIS_INTEN_STOPPED_Pos
TWIS_INTEN_TXSTARTED_Disabled
TWIS_INTEN_TXSTARTED_Enabled
TWIS_INTEN_TXSTARTED_Msk
TWIS_INTEN_TXSTARTED_Pos
TWIS_INTEN_WRITE_Disabled
TWIS_INTEN_WRITE_Enabled
TWIS_INTEN_WRITE_Msk
TWIS_INTEN_WRITE_Pos
TWIS_MATCH_MATCH_Msk
TWIS_MATCH_MATCH_Pos
TWIS_ORC_ORC_Msk
TWIS_ORC_ORC_Pos
TWIS_PSEL_SCL_CONNECT_Connected
TWIS_PSEL_SCL_CONNECT_Disconnected
TWIS_PSEL_SCL_CONNECT_Msk
TWIS_PSEL_SCL_CONNECT_Pos
TWIS_PSEL_SCL_PIN_Msk
TWIS_PSEL_SCL_PIN_Pos
TWIS_PSEL_SCL_PORT_Msk
TWIS_PSEL_SCL_PORT_Pos
TWIS_PSEL_SDA_CONNECT_Connected
TWIS_PSEL_SDA_CONNECT_Disconnected
TWIS_PSEL_SDA_CONNECT_Msk
TWIS_PSEL_SDA_CONNECT_Pos
TWIS_PSEL_SDA_PIN_Msk
TWIS_PSEL_SDA_PIN_Pos
TWIS_PSEL_SDA_PORT_Msk
TWIS_PSEL_SDA_PORT_Pos
TWIS_RXD_AMOUNT_AMOUNT_Msk
TWIS_RXD_AMOUNT_AMOUNT_Pos
TWIS_RXD_LIST_LIST_ArrayList
TWIS_RXD_LIST_LIST_Disabled
TWIS_RXD_LIST_LIST_Msk
TWIS_RXD_LIST_LIST_Pos
TWIS_RXD_MAXCNT_MAXCNT_Msk
TWIS_RXD_MAXCNT_MAXCNT_Pos
TWIS_RXD_PTR_PTR_Msk
TWIS_RXD_PTR_PTR_Pos
TWIS_SHORTS_READ_SUSPEND_Disabled
TWIS_SHORTS_READ_SUSPEND_Enabled
TWIS_SHORTS_READ_SUSPEND_Msk
TWIS_SHORTS_READ_SUSPEND_Pos
TWIS_SHORTS_WRITE_SUSPEND_Disabled
TWIS_SHORTS_WRITE_SUSPEND_Enabled
TWIS_SHORTS_WRITE_SUSPEND_Msk
TWIS_SHORTS_WRITE_SUSPEND_Pos
TWIS_TASKS_PREPARERX_TASKS_PREPARERX_Msk
TWIS_TASKS_PREPARERX_TASKS_PREPARERX_Pos
TWIS_TASKS_PREPARERX_TASKS_PREPARERX_Trigger
TWIS_TASKS_PREPARETX_TASKS_PREPARETX_Msk
TWIS_TASKS_PREPARETX_TASKS_PREPARETX_Pos
TWIS_TASKS_PREPARETX_TASKS_PREPARETX_Trigger
TWIS_TASKS_RESUME_TASKS_RESUME_Msk
TWIS_TASKS_RESUME_TASKS_RESUME_Pos
TWIS_TASKS_RESUME_TASKS_RESUME_Trigger
TWIS_TASKS_STOP_TASKS_STOP_Msk
TWIS_TASKS_STOP_TASKS_STOP_Pos
TWIS_TASKS_STOP_TASKS_STOP_Trigger
TWIS_TASKS_SUSPEND_TASKS_SUSPEND_Msk
TWIS_TASKS_SUSPEND_TASKS_SUSPEND_Pos
TWIS_TASKS_SUSPEND_TASKS_SUSPEND_Trigger
TWIS_TXD_AMOUNT_AMOUNT_Msk
TWIS_TXD_AMOUNT_AMOUNT_Pos
TWIS_TXD_LIST_LIST_ArrayList
TWIS_TXD_LIST_LIST_Disabled
TWIS_TXD_LIST_LIST_Msk
TWIS_TXD_LIST_LIST_Pos
TWIS_TXD_MAXCNT_MAXCNT_Msk
TWIS_TXD_MAXCNT_MAXCNT_Pos
TWIS_TXD_PTR_PTR_Msk
TWIS_TXD_PTR_PTR_Pos
TWI_ADDRESS_ADDRESS_Msk
TWI_ADDRESS_ADDRESS_Pos
TWI_COUNT
TWI_ENABLE_ENABLE_Disabled
TWI_ENABLE_ENABLE_Enabled
TWI_ENABLE_ENABLE_Msk
TWI_ENABLE_ENABLE_Pos
TWI_ERRORSRC_ANACK_Msk
TWI_ERRORSRC_ANACK_NotPresent
TWI_ERRORSRC_ANACK_Pos
TWI_ERRORSRC_ANACK_Present
TWI_ERRORSRC_DNACK_Msk
TWI_ERRORSRC_DNACK_NotPresent
TWI_ERRORSRC_DNACK_Pos
TWI_ERRORSRC_DNACK_Present
TWI_ERRORSRC_OVERRUN_Msk
TWI_ERRORSRC_OVERRUN_NotPresent
TWI_ERRORSRC_OVERRUN_Pos
TWI_ERRORSRC_OVERRUN_Present
TWI_EVENTS_BB_EVENTS_BB_Generated
TWI_EVENTS_BB_EVENTS_BB_Msk
TWI_EVENTS_BB_EVENTS_BB_NotGenerated
TWI_EVENTS_BB_EVENTS_BB_Pos
TWI_EVENTS_ERROR_EVENTS_ERROR_Generated
TWI_EVENTS_ERROR_EVENTS_ERROR_Msk
TWI_EVENTS_ERROR_EVENTS_ERROR_NotGenerated
TWI_EVENTS_ERROR_EVENTS_ERROR_Pos
TWI_EVENTS_RXDREADY_EVENTS_RXDREADY_Generated
TWI_EVENTS_RXDREADY_EVENTS_RXDREADY_Msk
TWI_EVENTS_RXDREADY_EVENTS_RXDREADY_NotGenerated
TWI_EVENTS_RXDREADY_EVENTS_RXDREADY_Pos
TWI_EVENTS_STOPPED_EVENTS_STOPPED_Generated
TWI_EVENTS_STOPPED_EVENTS_STOPPED_Msk
TWI_EVENTS_STOPPED_EVENTS_STOPPED_NotGenerated
TWI_EVENTS_STOPPED_EVENTS_STOPPED_Pos
TWI_EVENTS_SUSPENDED_EVENTS_SUSPENDED_Generated
TWI_EVENTS_SUSPENDED_EVENTS_SUSPENDED_Msk
TWI_EVENTS_SUSPENDED_EVENTS_SUSPENDED_NotGenerated
TWI_EVENTS_SUSPENDED_EVENTS_SUSPENDED_Pos
TWI_EVENTS_TXDSENT_EVENTS_TXDSENT_Generated
TWI_EVENTS_TXDSENT_EVENTS_TXDSENT_Msk
TWI_EVENTS_TXDSENT_EVENTS_TXDSENT_NotGenerated
TWI_EVENTS_TXDSENT_EVENTS_TXDSENT_Pos
TWI_FREQUENCY_FREQUENCY_K100
TWI_FREQUENCY_FREQUENCY_K250
TWI_FREQUENCY_FREQUENCY_K400
TWI_FREQUENCY_FREQUENCY_Msk
TWI_FREQUENCY_FREQUENCY_Pos
TWI_INTENCLR_BB_Clear
TWI_INTENCLR_BB_Disabled
TWI_INTENCLR_BB_Enabled
TWI_INTENCLR_BB_Msk
TWI_INTENCLR_BB_Pos
TWI_INTENCLR_ERROR_Clear
TWI_INTENCLR_ERROR_Disabled
TWI_INTENCLR_ERROR_Enabled
TWI_INTENCLR_ERROR_Msk
TWI_INTENCLR_ERROR_Pos
TWI_INTENCLR_RXDREADY_Clear
TWI_INTENCLR_RXDREADY_Disabled
TWI_INTENCLR_RXDREADY_Enabled
TWI_INTENCLR_RXDREADY_Msk
TWI_INTENCLR_RXDREADY_Pos
TWI_INTENCLR_STOPPED_Clear
TWI_INTENCLR_STOPPED_Disabled
TWI_INTENCLR_STOPPED_Enabled
TWI_INTENCLR_STOPPED_Msk
TWI_INTENCLR_STOPPED_Pos
TWI_INTENCLR_SUSPENDED_Clear
TWI_INTENCLR_SUSPENDED_Disabled
TWI_INTENCLR_SUSPENDED_Enabled
TWI_INTENCLR_SUSPENDED_Msk
TWI_INTENCLR_SUSPENDED_Pos
TWI_INTENCLR_TXDSENT_Clear
TWI_INTENCLR_TXDSENT_Disabled
TWI_INTENCLR_TXDSENT_Enabled
TWI_INTENCLR_TXDSENT_Msk
TWI_INTENCLR_TXDSENT_Pos
TWI_INTENSET_BB_Disabled
TWI_INTENSET_BB_Enabled
TWI_INTENSET_BB_Msk
TWI_INTENSET_BB_Pos
TWI_INTENSET_BB_Set
TWI_INTENSET_ERROR_Disabled
TWI_INTENSET_ERROR_Enabled
TWI_INTENSET_ERROR_Msk
TWI_INTENSET_ERROR_Pos
TWI_INTENSET_ERROR_Set
TWI_INTENSET_RXDREADY_Disabled
TWI_INTENSET_RXDREADY_Enabled
TWI_INTENSET_RXDREADY_Msk
TWI_INTENSET_RXDREADY_Pos
TWI_INTENSET_RXDREADY_Set
TWI_INTENSET_STOPPED_Disabled
TWI_INTENSET_STOPPED_Enabled
TWI_INTENSET_STOPPED_Msk
TWI_INTENSET_STOPPED_Pos
TWI_INTENSET_STOPPED_Set
TWI_INTENSET_SUSPENDED_Disabled
TWI_INTENSET_SUSPENDED_Enabled
TWI_INTENSET_SUSPENDED_Msk
TWI_INTENSET_SUSPENDED_Pos
TWI_INTENSET_SUSPENDED_Set
TWI_INTENSET_TXDSENT_Disabled
TWI_INTENSET_TXDSENT_Enabled
TWI_INTENSET_TXDSENT_Msk
TWI_INTENSET_TXDSENT_Pos
TWI_INTENSET_TXDSENT_Set
TWI_PSEL_SCL_CONNECT_Connected
TWI_PSEL_SCL_CONNECT_Disconnected
TWI_PSEL_SCL_CONNECT_Msk
TWI_PSEL_SCL_CONNECT_Pos
TWI_PSEL_SCL_PIN_Msk
TWI_PSEL_SCL_PIN_Pos
TWI_PSEL_SCL_PORT_Msk
TWI_PSEL_SCL_PORT_Pos
TWI_PSEL_SDA_CONNECT_Connected
TWI_PSEL_SDA_CONNECT_Disconnected
TWI_PSEL_SDA_CONNECT_Msk
TWI_PSEL_SDA_CONNECT_Pos
TWI_PSEL_SDA_PIN_Msk
TWI_PSEL_SDA_PIN_Pos
TWI_PSEL_SDA_PORT_Msk
TWI_PSEL_SDA_PORT_Pos
TWI_RXD_RXD_Msk
TWI_RXD_RXD_Pos
TWI_SHORTS_BB_STOP_Disabled
TWI_SHORTS_BB_STOP_Enabled
TWI_SHORTS_BB_STOP_Msk
TWI_SHORTS_BB_STOP_Pos
TWI_SHORTS_BB_SUSPEND_Disabled
TWI_SHORTS_BB_SUSPEND_Enabled
TWI_SHORTS_BB_SUSPEND_Msk
TWI_SHORTS_BB_SUSPEND_Pos
TWI_TASKS_RESUME_TASKS_RESUME_Msk
TWI_TASKS_RESUME_TASKS_RESUME_Pos
TWI_TASKS_RESUME_TASKS_RESUME_Trigger
TWI_TASKS_STARTRX_TASKS_STARTRX_Msk
TWI_TASKS_STARTRX_TASKS_STARTRX_Pos
TWI_TASKS_STARTRX_TASKS_STARTRX_Trigger
TWI_TASKS_STARTTX_TASKS_STARTTX_Msk
TWI_TASKS_STARTTX_TASKS_STARTTX_Pos
TWI_TASKS_STARTTX_TASKS_STARTTX_Trigger
TWI_TASKS_STOP_TASKS_STOP_Msk
TWI_TASKS_STOP_TASKS_STOP_Pos
TWI_TASKS_STOP_TASKS_STOP_Trigger
TWI_TASKS_SUSPEND_TASKS_SUSPEND_Msk
TWI_TASKS_SUSPEND_TASKS_SUSPEND_Pos
TWI_TASKS_SUSPEND_TASKS_SUSPEND_Trigger
TWI_TXD_TXD_Msk
TWI_TXD_TXD_Pos
UARTE0_EASYDMA_MAXCNT_SIZE
UARTE1_EASYDMA_MAXCNT_SIZE
UARTE_BAUDRATE_BAUDRATE_Baud115200
UARTE_BAUDRATE_BAUDRATE_Baud1200
UARTE_BAUDRATE_BAUDRATE_Baud14400
UARTE_BAUDRATE_BAUDRATE_Baud19200
UARTE_BAUDRATE_BAUDRATE_Baud1M
UARTE_BAUDRATE_BAUDRATE_Baud230400
UARTE_BAUDRATE_BAUDRATE_Baud2400
UARTE_BAUDRATE_BAUDRATE_Baud250000
UARTE_BAUDRATE_BAUDRATE_Baud28800
UARTE_BAUDRATE_BAUDRATE_Baud31250
UARTE_BAUDRATE_BAUDRATE_Baud38400
UARTE_BAUDRATE_BAUDRATE_Baud460800
UARTE_BAUDRATE_BAUDRATE_Baud4800
UARTE_BAUDRATE_BAUDRATE_Baud56000
UARTE_BAUDRATE_BAUDRATE_Baud57600
UARTE_BAUDRATE_BAUDRATE_Baud76800
UARTE_BAUDRATE_BAUDRATE_Baud921600
UARTE_BAUDRATE_BAUDRATE_Baud9600
UARTE_BAUDRATE_BAUDRATE_Msk
UARTE_BAUDRATE_BAUDRATE_Pos
UARTE_CONFIG_HWFC_Disabled
UARTE_CONFIG_HWFC_Enabled
UARTE_CONFIG_HWFC_Msk
UARTE_CONFIG_HWFC_Pos
UARTE_CONFIG_PARITY_Excluded
UARTE_CONFIG_PARITY_Included
UARTE_CONFIG_PARITY_Msk
UARTE_CONFIG_PARITY_Pos
UARTE_CONFIG_STOP_Msk
UARTE_CONFIG_STOP_One
UARTE_CONFIG_STOP_Pos
UARTE_CONFIG_STOP_Two
UARTE_COUNT
UARTE_ENABLE_ENABLE_Disabled
UARTE_ENABLE_ENABLE_Enabled
UARTE_ENABLE_ENABLE_Msk
UARTE_ENABLE_ENABLE_Pos
UARTE_ERRORSRC_BREAK_Msk
UARTE_ERRORSRC_BREAK_NotPresent
UARTE_ERRORSRC_BREAK_Pos
UARTE_ERRORSRC_BREAK_Present
UARTE_ERRORSRC_FRAMING_Msk
UARTE_ERRORSRC_FRAMING_NotPresent
UARTE_ERRORSRC_FRAMING_Pos
UARTE_ERRORSRC_FRAMING_Present
UARTE_ERRORSRC_OVERRUN_Msk
UARTE_ERRORSRC_OVERRUN_NotPresent
UARTE_ERRORSRC_OVERRUN_Pos
UARTE_ERRORSRC_OVERRUN_Present
UARTE_ERRORSRC_PARITY_Msk
UARTE_ERRORSRC_PARITY_NotPresent
UARTE_ERRORSRC_PARITY_Pos
UARTE_ERRORSRC_PARITY_Present
UARTE_EVENTS_CTS_EVENTS_CTS_Generated
UARTE_EVENTS_CTS_EVENTS_CTS_Msk
UARTE_EVENTS_CTS_EVENTS_CTS_NotGenerated
UARTE_EVENTS_CTS_EVENTS_CTS_Pos
UARTE_EVENTS_ENDRX_EVENTS_ENDRX_Generated
UARTE_EVENTS_ENDRX_EVENTS_ENDRX_Msk
UARTE_EVENTS_ENDRX_EVENTS_ENDRX_NotGenerated
UARTE_EVENTS_ENDRX_EVENTS_ENDRX_Pos
UARTE_EVENTS_ENDTX_EVENTS_ENDTX_Generated
UARTE_EVENTS_ENDTX_EVENTS_ENDTX_Msk
UARTE_EVENTS_ENDTX_EVENTS_ENDTX_NotGenerated
UARTE_EVENTS_ENDTX_EVENTS_ENDTX_Pos
UARTE_EVENTS_ERROR_EVENTS_ERROR_Generated
UARTE_EVENTS_ERROR_EVENTS_ERROR_Msk
UARTE_EVENTS_ERROR_EVENTS_ERROR_NotGenerated
UARTE_EVENTS_ERROR_EVENTS_ERROR_Pos
UARTE_EVENTS_NCTS_EVENTS_NCTS_Generated
UARTE_EVENTS_NCTS_EVENTS_NCTS_Msk
UARTE_EVENTS_NCTS_EVENTS_NCTS_NotGenerated
UARTE_EVENTS_NCTS_EVENTS_NCTS_Pos
UARTE_EVENTS_RXDRDY_EVENTS_RXDRDY_Generated
UARTE_EVENTS_RXDRDY_EVENTS_RXDRDY_Msk
UARTE_EVENTS_RXDRDY_EVENTS_RXDRDY_NotGenerated
UARTE_EVENTS_RXDRDY_EVENTS_RXDRDY_Pos
UARTE_EVENTS_RXSTARTED_EVENTS_RXSTARTED_Generated
UARTE_EVENTS_RXSTARTED_EVENTS_RXSTARTED_Msk
UARTE_EVENTS_RXSTARTED_EVENTS_RXSTARTED_NotGenerated
UARTE_EVENTS_RXSTARTED_EVENTS_RXSTARTED_Pos
UARTE_EVENTS_RXTO_EVENTS_RXTO_Generated
UARTE_EVENTS_RXTO_EVENTS_RXTO_Msk
UARTE_EVENTS_RXTO_EVENTS_RXTO_NotGenerated
UARTE_EVENTS_RXTO_EVENTS_RXTO_Pos
UARTE_EVENTS_TXDRDY_EVENTS_TXDRDY_Generated
UARTE_EVENTS_TXDRDY_EVENTS_TXDRDY_Msk
UARTE_EVENTS_TXDRDY_EVENTS_TXDRDY_NotGenerated
UARTE_EVENTS_TXDRDY_EVENTS_TXDRDY_Pos
UARTE_EVENTS_TXSTARTED_EVENTS_TXSTARTED_Generated
UARTE_EVENTS_TXSTARTED_EVENTS_TXSTARTED_Msk
UARTE_EVENTS_TXSTARTED_EVENTS_TXSTARTED_NotGenerated
UARTE_EVENTS_TXSTARTED_EVENTS_TXSTARTED_Pos
UARTE_EVENTS_TXSTOPPED_EVENTS_TXSTOPPED_Generated
UARTE_EVENTS_TXSTOPPED_EVENTS_TXSTOPPED_Msk
UARTE_EVENTS_TXSTOPPED_EVENTS_TXSTOPPED_NotGenerated
UARTE_EVENTS_TXSTOPPED_EVENTS_TXSTOPPED_Pos
UARTE_INTENCLR_CTS_Clear
UARTE_INTENCLR_CTS_Disabled
UARTE_INTENCLR_CTS_Enabled
UARTE_INTENCLR_CTS_Msk
UARTE_INTENCLR_CTS_Pos
UARTE_INTENCLR_ENDRX_Clear
UARTE_INTENCLR_ENDRX_Disabled
UARTE_INTENCLR_ENDRX_Enabled
UARTE_INTENCLR_ENDRX_Msk
UARTE_INTENCLR_ENDRX_Pos
UARTE_INTENCLR_ENDTX_Clear
UARTE_INTENCLR_ENDTX_Disabled
UARTE_INTENCLR_ENDTX_Enabled
UARTE_INTENCLR_ENDTX_Msk
UARTE_INTENCLR_ENDTX_Pos
UARTE_INTENCLR_ERROR_Clear
UARTE_INTENCLR_ERROR_Disabled
UARTE_INTENCLR_ERROR_Enabled
UARTE_INTENCLR_ERROR_Msk
UARTE_INTENCLR_ERROR_Pos
UARTE_INTENCLR_NCTS_Clear
UARTE_INTENCLR_NCTS_Disabled
UARTE_INTENCLR_NCTS_Enabled
UARTE_INTENCLR_NCTS_Msk
UARTE_INTENCLR_NCTS_Pos
UARTE_INTENCLR_RXDRDY_Clear
UARTE_INTENCLR_RXDRDY_Disabled
UARTE_INTENCLR_RXDRDY_Enabled
UARTE_INTENCLR_RXDRDY_Msk
UARTE_INTENCLR_RXDRDY_Pos
UARTE_INTENCLR_RXSTARTED_Clear
UARTE_INTENCLR_RXSTARTED_Disabled
UARTE_INTENCLR_RXSTARTED_Enabled
UARTE_INTENCLR_RXSTARTED_Msk
UARTE_INTENCLR_RXSTARTED_Pos
UARTE_INTENCLR_RXTO_Clear
UARTE_INTENCLR_RXTO_Disabled
UARTE_INTENCLR_RXTO_Enabled
UARTE_INTENCLR_RXTO_Msk
UARTE_INTENCLR_RXTO_Pos
UARTE_INTENCLR_TXDRDY_Clear
UARTE_INTENCLR_TXDRDY_Disabled
UARTE_INTENCLR_TXDRDY_Enabled
UARTE_INTENCLR_TXDRDY_Msk
UARTE_INTENCLR_TXDRDY_Pos
UARTE_INTENCLR_TXSTARTED_Clear
UARTE_INTENCLR_TXSTARTED_Disabled
UARTE_INTENCLR_TXSTARTED_Enabled
UARTE_INTENCLR_TXSTARTED_Msk
UARTE_INTENCLR_TXSTARTED_Pos
UARTE_INTENCLR_TXSTOPPED_Clear
UARTE_INTENCLR_TXSTOPPED_Disabled
UARTE_INTENCLR_TXSTOPPED_Enabled
UARTE_INTENCLR_TXSTOPPED_Msk
UARTE_INTENCLR_TXSTOPPED_Pos
UARTE_INTENSET_CTS_Disabled
UARTE_INTENSET_CTS_Enabled
UARTE_INTENSET_CTS_Msk
UARTE_INTENSET_CTS_Pos
UARTE_INTENSET_CTS_Set
UARTE_INTENSET_ENDRX_Disabled
UARTE_INTENSET_ENDRX_Enabled
UARTE_INTENSET_ENDRX_Msk
UARTE_INTENSET_ENDRX_Pos
UARTE_INTENSET_ENDRX_Set
UARTE_INTENSET_ENDTX_Disabled
UARTE_INTENSET_ENDTX_Enabled
UARTE_INTENSET_ENDTX_Msk
UARTE_INTENSET_ENDTX_Pos
UARTE_INTENSET_ENDTX_Set
UARTE_INTENSET_ERROR_Disabled
UARTE_INTENSET_ERROR_Enabled
UARTE_INTENSET_ERROR_Msk
UARTE_INTENSET_ERROR_Pos
UARTE_INTENSET_ERROR_Set
UARTE_INTENSET_NCTS_Disabled
UARTE_INTENSET_NCTS_Enabled
UARTE_INTENSET_NCTS_Msk
UARTE_INTENSET_NCTS_Pos
UARTE_INTENSET_NCTS_Set
UARTE_INTENSET_RXDRDY_Disabled
UARTE_INTENSET_RXDRDY_Enabled
UARTE_INTENSET_RXDRDY_Msk
UARTE_INTENSET_RXDRDY_Pos
UARTE_INTENSET_RXDRDY_Set
UARTE_INTENSET_RXSTARTED_Disabled
UARTE_INTENSET_RXSTARTED_Enabled
UARTE_INTENSET_RXSTARTED_Msk
UARTE_INTENSET_RXSTARTED_Pos
UARTE_INTENSET_RXSTARTED_Set
UARTE_INTENSET_RXTO_Disabled
UARTE_INTENSET_RXTO_Enabled
UARTE_INTENSET_RXTO_Msk
UARTE_INTENSET_RXTO_Pos
UARTE_INTENSET_RXTO_Set
UARTE_INTENSET_TXDRDY_Disabled
UARTE_INTENSET_TXDRDY_Enabled
UARTE_INTENSET_TXDRDY_Msk
UARTE_INTENSET_TXDRDY_Pos
UARTE_INTENSET_TXDRDY_Set
UARTE_INTENSET_TXSTARTED_Disabled
UARTE_INTENSET_TXSTARTED_Enabled
UARTE_INTENSET_TXSTARTED_Msk
UARTE_INTENSET_TXSTARTED_Pos
UARTE_INTENSET_TXSTARTED_Set
UARTE_INTENSET_TXSTOPPED_Disabled
UARTE_INTENSET_TXSTOPPED_Enabled
UARTE_INTENSET_TXSTOPPED_Msk
UARTE_INTENSET_TXSTOPPED_Pos
UARTE_INTENSET_TXSTOPPED_Set
UARTE_INTEN_CTS_Disabled
UARTE_INTEN_CTS_Enabled
UARTE_INTEN_CTS_Msk
UARTE_INTEN_CTS_Pos
UARTE_INTEN_ENDRX_Disabled
UARTE_INTEN_ENDRX_Enabled
UARTE_INTEN_ENDRX_Msk
UARTE_INTEN_ENDRX_Pos
UARTE_INTEN_ENDTX_Disabled
UARTE_INTEN_ENDTX_Enabled
UARTE_INTEN_ENDTX_Msk
UARTE_INTEN_ENDTX_Pos
UARTE_INTEN_ERROR_Disabled
UARTE_INTEN_ERROR_Enabled
UARTE_INTEN_ERROR_Msk
UARTE_INTEN_ERROR_Pos
UARTE_INTEN_NCTS_Disabled
UARTE_INTEN_NCTS_Enabled
UARTE_INTEN_NCTS_Msk
UARTE_INTEN_NCTS_Pos
UARTE_INTEN_RXDRDY_Disabled
UARTE_INTEN_RXDRDY_Enabled
UARTE_INTEN_RXDRDY_Msk
UARTE_INTEN_RXDRDY_Pos
UARTE_INTEN_RXSTARTED_Disabled
UARTE_INTEN_RXSTARTED_Enabled
UARTE_INTEN_RXSTARTED_Msk
UARTE_INTEN_RXSTARTED_Pos
UARTE_INTEN_RXTO_Disabled
UARTE_INTEN_RXTO_Enabled
UARTE_INTEN_RXTO_Msk
UARTE_INTEN_RXTO_Pos
UARTE_INTEN_TXDRDY_Disabled
UARTE_INTEN_TXDRDY_Enabled
UARTE_INTEN_TXDRDY_Msk
UARTE_INTEN_TXDRDY_Pos
UARTE_INTEN_TXSTARTED_Disabled
UARTE_INTEN_TXSTARTED_Enabled
UARTE_INTEN_TXSTARTED_Msk
UARTE_INTEN_TXSTARTED_Pos
UARTE_INTEN_TXSTOPPED_Disabled
UARTE_INTEN_TXSTOPPED_Enabled
UARTE_INTEN_TXSTOPPED_Msk
UARTE_INTEN_TXSTOPPED_Pos
UARTE_PSEL_CTS_CONNECT_Connected
UARTE_PSEL_CTS_CONNECT_Disconnected
UARTE_PSEL_CTS_CONNECT_Msk
UARTE_PSEL_CTS_CONNECT_Pos
UARTE_PSEL_CTS_PIN_Msk
UARTE_PSEL_CTS_PIN_Pos
UARTE_PSEL_CTS_PORT_Msk
UARTE_PSEL_CTS_PORT_Pos
UARTE_PSEL_RTS_CONNECT_Connected
UARTE_PSEL_RTS_CONNECT_Disconnected
UARTE_PSEL_RTS_CONNECT_Msk
UARTE_PSEL_RTS_CONNECT_Pos
UARTE_PSEL_RTS_PIN_Msk
UARTE_PSEL_RTS_PIN_Pos
UARTE_PSEL_RTS_PORT_Msk
UARTE_PSEL_RTS_PORT_Pos
UARTE_PSEL_RXD_CONNECT_Connected
UARTE_PSEL_RXD_CONNECT_Disconnected
UARTE_PSEL_RXD_CONNECT_Msk
UARTE_PSEL_RXD_CONNECT_Pos
UARTE_PSEL_RXD_PIN_Msk
UARTE_PSEL_RXD_PIN_Pos
UARTE_PSEL_RXD_PORT_Msk
UARTE_PSEL_RXD_PORT_Pos
UARTE_PSEL_TXD_CONNECT_Connected
UARTE_PSEL_TXD_CONNECT_Disconnected
UARTE_PSEL_TXD_CONNECT_Msk
UARTE_PSEL_TXD_CONNECT_Pos
UARTE_PSEL_TXD_PIN_Msk
UARTE_PSEL_TXD_PIN_Pos
UARTE_PSEL_TXD_PORT_Msk
UARTE_PSEL_TXD_PORT_Pos
UARTE_RXD_AMOUNT_AMOUNT_Msk
UARTE_RXD_AMOUNT_AMOUNT_Pos
UARTE_RXD_MAXCNT_MAXCNT_Msk
UARTE_RXD_MAXCNT_MAXCNT_Pos
UARTE_RXD_PTR_PTR_Msk
UARTE_RXD_PTR_PTR_Pos
UARTE_SHORTS_ENDRX_STARTRX_Disabled
UARTE_SHORTS_ENDRX_STARTRX_Enabled
UARTE_SHORTS_ENDRX_STARTRX_Msk
UARTE_SHORTS_ENDRX_STARTRX_Pos
UARTE_SHORTS_ENDRX_STOPRX_Disabled
UARTE_SHORTS_ENDRX_STOPRX_Enabled
UARTE_SHORTS_ENDRX_STOPRX_Msk
UARTE_SHORTS_ENDRX_STOPRX_Pos
UARTE_TASKS_FLUSHRX_TASKS_FLUSHRX_Msk
UARTE_TASKS_FLUSHRX_TASKS_FLUSHRX_Pos
UARTE_TASKS_FLUSHRX_TASKS_FLUSHRX_Trigger
UARTE_TASKS_STARTRX_TASKS_STARTRX_Msk
UARTE_TASKS_STARTRX_TASKS_STARTRX_Pos
UARTE_TASKS_STARTRX_TASKS_STARTRX_Trigger
UARTE_TASKS_STARTTX_TASKS_STARTTX_Msk
UARTE_TASKS_STARTTX_TASKS_STARTTX_Pos
UARTE_TASKS_STARTTX_TASKS_STARTTX_Trigger
UARTE_TASKS_STOPRX_TASKS_STOPRX_Msk
UARTE_TASKS_STOPRX_TASKS_STOPRX_Pos
UARTE_TASKS_STOPRX_TASKS_STOPRX_Trigger
UARTE_TASKS_STOPTX_TASKS_STOPTX_Msk
UARTE_TASKS_STOPTX_TASKS_STOPTX_Pos
UARTE_TASKS_STOPTX_TASKS_STOPTX_Trigger
UARTE_TXD_AMOUNT_AMOUNT_Msk
UARTE_TXD_AMOUNT_AMOUNT_Pos
UARTE_TXD_MAXCNT_MAXCNT_Msk
UARTE_TXD_MAXCNT_MAXCNT_Pos
UARTE_TXD_PTR_PTR_Msk
UARTE_TXD_PTR_PTR_Pos
UART_BAUDRATE_BAUDRATE_Baud115200
UART_BAUDRATE_BAUDRATE_Baud1200
UART_BAUDRATE_BAUDRATE_Baud14400
UART_BAUDRATE_BAUDRATE_Baud19200
UART_BAUDRATE_BAUDRATE_Baud1M
UART_BAUDRATE_BAUDRATE_Baud230400
UART_BAUDRATE_BAUDRATE_Baud2400
UART_BAUDRATE_BAUDRATE_Baud250000
UART_BAUDRATE_BAUDRATE_Baud28800
UART_BAUDRATE_BAUDRATE_Baud31250
UART_BAUDRATE_BAUDRATE_Baud38400
UART_BAUDRATE_BAUDRATE_Baud460800
UART_BAUDRATE_BAUDRATE_Baud4800
UART_BAUDRATE_BAUDRATE_Baud56000
UART_BAUDRATE_BAUDRATE_Baud57600
UART_BAUDRATE_BAUDRATE_Baud76800
UART_BAUDRATE_BAUDRATE_Baud921600
UART_BAUDRATE_BAUDRATE_Baud9600
UART_BAUDRATE_BAUDRATE_Msk
UART_BAUDRATE_BAUDRATE_Pos
UART_CONFIG_HWFC_Disabled
UART_CONFIG_HWFC_Enabled
UART_CONFIG_HWFC_Msk
UART_CONFIG_HWFC_Pos
UART_CONFIG_PARITY_Excluded
UART_CONFIG_PARITY_Included
UART_CONFIG_PARITY_Msk
UART_CONFIG_PARITY_Pos
UART_CONFIG_STOP_Msk
UART_CONFIG_STOP_One
UART_CONFIG_STOP_Pos
UART_CONFIG_STOP_Two
UART_COUNT
UART_ENABLE_ENABLE_Disabled
UART_ENABLE_ENABLE_Enabled
UART_ENABLE_ENABLE_Msk
UART_ENABLE_ENABLE_Pos
UART_ERRORSRC_BREAK_Msk
UART_ERRORSRC_BREAK_NotPresent
UART_ERRORSRC_BREAK_Pos
UART_ERRORSRC_BREAK_Present
UART_ERRORSRC_FRAMING_Msk
UART_ERRORSRC_FRAMING_NotPresent
UART_ERRORSRC_FRAMING_Pos
UART_ERRORSRC_FRAMING_Present
UART_ERRORSRC_OVERRUN_Msk
UART_ERRORSRC_OVERRUN_NotPresent
UART_ERRORSRC_OVERRUN_Pos
UART_ERRORSRC_OVERRUN_Present
UART_ERRORSRC_PARITY_Msk
UART_ERRORSRC_PARITY_NotPresent
UART_ERRORSRC_PARITY_Pos
UART_ERRORSRC_PARITY_Present
UART_EVENTS_CTS_EVENTS_CTS_Generated
UART_EVENTS_CTS_EVENTS_CTS_Msk
UART_EVENTS_CTS_EVENTS_CTS_NotGenerated
UART_EVENTS_CTS_EVENTS_CTS_Pos
UART_EVENTS_ERROR_EVENTS_ERROR_Generated
UART_EVENTS_ERROR_EVENTS_ERROR_Msk
UART_EVENTS_ERROR_EVENTS_ERROR_NotGenerated
UART_EVENTS_ERROR_EVENTS_ERROR_Pos
UART_EVENTS_NCTS_EVENTS_NCTS_Generated
UART_EVENTS_NCTS_EVENTS_NCTS_Msk
UART_EVENTS_NCTS_EVENTS_NCTS_NotGenerated
UART_EVENTS_NCTS_EVENTS_NCTS_Pos
UART_EVENTS_RXDRDY_EVENTS_RXDRDY_Generated
UART_EVENTS_RXDRDY_EVENTS_RXDRDY_Msk
UART_EVENTS_RXDRDY_EVENTS_RXDRDY_NotGenerated
UART_EVENTS_RXDRDY_EVENTS_RXDRDY_Pos
UART_EVENTS_RXTO_EVENTS_RXTO_Generated
UART_EVENTS_RXTO_EVENTS_RXTO_Msk
UART_EVENTS_RXTO_EVENTS_RXTO_NotGenerated
UART_EVENTS_RXTO_EVENTS_RXTO_Pos
UART_EVENTS_TXDRDY_EVENTS_TXDRDY_Generated
UART_EVENTS_TXDRDY_EVENTS_TXDRDY_Msk
UART_EVENTS_TXDRDY_EVENTS_TXDRDY_NotGenerated
UART_EVENTS_TXDRDY_EVENTS_TXDRDY_Pos
UART_INTENCLR_CTS_Clear
UART_INTENCLR_CTS_Disabled
UART_INTENCLR_CTS_Enabled
UART_INTENCLR_CTS_Msk
UART_INTENCLR_CTS_Pos
UART_INTENCLR_ERROR_Clear
UART_INTENCLR_ERROR_Disabled
UART_INTENCLR_ERROR_Enabled
UART_INTENCLR_ERROR_Msk
UART_INTENCLR_ERROR_Pos
UART_INTENCLR_NCTS_Clear
UART_INTENCLR_NCTS_Disabled
UART_INTENCLR_NCTS_Enabled
UART_INTENCLR_NCTS_Msk
UART_INTENCLR_NCTS_Pos
UART_INTENCLR_RXDRDY_Clear
UART_INTENCLR_RXDRDY_Disabled
UART_INTENCLR_RXDRDY_Enabled
UART_INTENCLR_RXDRDY_Msk
UART_INTENCLR_RXDRDY_Pos
UART_INTENCLR_RXTO_Clear
UART_INTENCLR_RXTO_Disabled
UART_INTENCLR_RXTO_Enabled
UART_INTENCLR_RXTO_Msk
UART_INTENCLR_RXTO_Pos
UART_INTENCLR_TXDRDY_Clear
UART_INTENCLR_TXDRDY_Disabled
UART_INTENCLR_TXDRDY_Enabled
UART_INTENCLR_TXDRDY_Msk
UART_INTENCLR_TXDRDY_Pos
UART_INTENSET_CTS_Disabled
UART_INTENSET_CTS_Enabled
UART_INTENSET_CTS_Msk
UART_INTENSET_CTS_Pos
UART_INTENSET_CTS_Set
UART_INTENSET_ERROR_Disabled
UART_INTENSET_ERROR_Enabled
UART_INTENSET_ERROR_Msk
UART_INTENSET_ERROR_Pos
UART_INTENSET_ERROR_Set
UART_INTENSET_NCTS_Disabled
UART_INTENSET_NCTS_Enabled
UART_INTENSET_NCTS_Msk
UART_INTENSET_NCTS_Pos
UART_INTENSET_NCTS_Set
UART_INTENSET_RXDRDY_Disabled
UART_INTENSET_RXDRDY_Enabled
UART_INTENSET_RXDRDY_Msk
UART_INTENSET_RXDRDY_Pos
UART_INTENSET_RXDRDY_Set
UART_INTENSET_RXTO_Disabled
UART_INTENSET_RXTO_Enabled
UART_INTENSET_RXTO_Msk
UART_INTENSET_RXTO_Pos
UART_INTENSET_RXTO_Set
UART_INTENSET_TXDRDY_Disabled
UART_INTENSET_TXDRDY_Enabled
UART_INTENSET_TXDRDY_Msk
UART_INTENSET_TXDRDY_Pos
UART_INTENSET_TXDRDY_Set
UART_INTERR
UART_NOBAUD
UART_NODEV
UART_NOMODE
UART_OK
UART_PSEL_CTS_CONNECT_Connected
UART_PSEL_CTS_CONNECT_Disconnected
UART_PSEL_CTS_CONNECT_Msk
UART_PSEL_CTS_CONNECT_Pos
UART_PSEL_CTS_PIN_Msk
UART_PSEL_CTS_PIN_Pos
UART_PSEL_CTS_PORT_Msk
UART_PSEL_CTS_PORT_Pos
UART_PSEL_RTS_CONNECT_Connected
UART_PSEL_RTS_CONNECT_Disconnected
UART_PSEL_RTS_CONNECT_Msk
UART_PSEL_RTS_CONNECT_Pos
UART_PSEL_RTS_PIN_Msk
UART_PSEL_RTS_PIN_Pos
UART_PSEL_RTS_PORT_Msk
UART_PSEL_RTS_PORT_Pos
UART_PSEL_RXD_CONNECT_Connected
UART_PSEL_RXD_CONNECT_Disconnected
UART_PSEL_RXD_CONNECT_Msk
UART_PSEL_RXD_CONNECT_Pos
UART_PSEL_RXD_PIN_Msk
UART_PSEL_RXD_PIN_Pos
UART_PSEL_RXD_PORT_Msk
UART_PSEL_RXD_PORT_Pos
UART_PSEL_TXD_CONNECT_Connected
UART_PSEL_TXD_CONNECT_Disconnected
UART_PSEL_TXD_CONNECT_Msk
UART_PSEL_TXD_CONNECT_Pos
UART_PSEL_TXD_PIN_Msk
UART_PSEL_TXD_PIN_Pos
UART_PSEL_TXD_PORT_Msk
UART_PSEL_TXD_PORT_Pos
UART_RXD_RXD_Msk
UART_RXD_RXD_Pos
UART_SHORTS_CTS_STARTRX_Disabled
UART_SHORTS_CTS_STARTRX_Enabled
UART_SHORTS_CTS_STARTRX_Msk
UART_SHORTS_CTS_STARTRX_Pos
UART_SHORTS_NCTS_STOPRX_Disabled
UART_SHORTS_NCTS_STOPRX_Enabled
UART_SHORTS_NCTS_STOPRX_Msk
UART_SHORTS_NCTS_STOPRX_Pos
UART_TASKS_STARTRX_TASKS_STARTRX_Msk
UART_TASKS_STARTRX_TASKS_STARTRX_Pos
UART_TASKS_STARTRX_TASKS_STARTRX_Trigger
UART_TASKS_STARTTX_TASKS_STARTTX_Msk
UART_TASKS_STARTTX_TASKS_STARTTX_Pos
UART_TASKS_STARTTX_TASKS_STARTTX_Trigger
UART_TASKS_STOPRX_TASKS_STOPRX_Msk
UART_TASKS_STOPRX_TASKS_STOPRX_Pos
UART_TASKS_STOPRX_TASKS_STOPRX_Trigger
UART_TASKS_STOPTX_TASKS_STOPTX_Msk
UART_TASKS_STOPTX_TASKS_STOPTX_Pos
UART_TASKS_STOPTX_TASKS_STOPTX_Trigger
UART_TASKS_SUSPEND_TASKS_SUSPEND_Msk
UART_TASKS_SUSPEND_TASKS_SUSPEND_Pos
UART_TASKS_SUSPEND_TASKS_SUSPEND_Trigger
UART_TXBUF_SIZE
UART_TXD_TXD_Msk
UART_TXD_TXD_Pos
UICR_APPROTECT_PALL_Disabled
UICR_APPROTECT_PALL_Enabled
UICR_APPROTECT_PALL_Msk
UICR_APPROTECT_PALL_Pos
UICR_CUSTOMER_CUSTOMER_Msk
UICR_CUSTOMER_CUSTOMER_Pos
UICR_DEBUGCTRL_CPUFPBEN_Disabled
UICR_DEBUGCTRL_CPUFPBEN_Enabled
UICR_DEBUGCTRL_CPUFPBEN_Msk
UICR_DEBUGCTRL_CPUFPBEN_Pos
UICR_DEBUGCTRL_CPUNIDEN_Disabled
UICR_DEBUGCTRL_CPUNIDEN_Enabled
UICR_DEBUGCTRL_CPUNIDEN_Msk
UICR_DEBUGCTRL_CPUNIDEN_Pos
UICR_NFCPINS_PROTECT_Disabled
UICR_NFCPINS_PROTECT_Msk
UICR_NFCPINS_PROTECT_NFC
UICR_NFCPINS_PROTECT_Pos
UICR_NRFFW_NRFFW_Msk
UICR_NRFFW_NRFFW_Pos
UICR_NRFHW_NRFHW_Msk
UICR_NRFHW_NRFHW_Pos
UICR_PSELRESET_CONNECT_Connected
UICR_PSELRESET_CONNECT_Disconnected
UICR_PSELRESET_CONNECT_Msk
UICR_PSELRESET_CONNECT_Pos
UICR_PSELRESET_PIN_Msk
UICR_PSELRESET_PIN_Pos
UICR_PSELRESET_PORT_Msk
UICR_PSELRESET_PORT_Pos
UICR_REGOUT0_VOUT_1V8
UICR_REGOUT0_VOUT_2V1
UICR_REGOUT0_VOUT_2V4
UICR_REGOUT0_VOUT_2V7
UICR_REGOUT0_VOUT_3V0
UICR_REGOUT0_VOUT_3V3
UICR_REGOUT0_VOUT_DEFAULT
UICR_REGOUT0_VOUT_Msk
UICR_REGOUT0_VOUT_Pos
UINT16_MAX
UINT32_MAX
UNIT_A
UNIT_BAR
UNIT_BOOL
UNIT_CD
UNIT_COULOMB
UNIT_CPM3
UNIT_CTS
UNIT_DATE
UNIT_DBM
UNIT_DPS
UNIT_F
UNIT_G
UNIT_GAUSS
UNIT_GPM3
UNIT_GR
UNIT_GRAM
UNIT_GS
UNIT_G_FORCE
UNIT_LUX
UNIT_M
UNIT_M2
UNIT_M3
UNIT_NONE
UNIT_OHM
UNIT_PA
UNIT_PERCENT
UNIT_PERMILL
UNIT_PH
UNIT_PPB
UNIT_PPM
UNIT_T
UNIT_TEMP_C
UNIT_TEMP_F
UNIT_TEMP_K
UNIT_TIME
UNIT_UNDEF
UNIT_V
UNIT_W
USBDEV_CPU_DMA_ALIGNMENT
USBD_BMREQUESTTYPE_DIRECTION_DeviceToHost
USBD_BMREQUESTTYPE_DIRECTION_HostToDevice
USBD_BMREQUESTTYPE_DIRECTION_Msk
USBD_BMREQUESTTYPE_DIRECTION_Pos
USBD_BMREQUESTTYPE_RECIPIENT_Device
USBD_BMREQUESTTYPE_RECIPIENT_Endpoint
USBD_BMREQUESTTYPE_RECIPIENT_Interface
USBD_BMREQUESTTYPE_RECIPIENT_Msk
USBD_BMREQUESTTYPE_RECIPIENT_Other
USBD_BMREQUESTTYPE_RECIPIENT_Pos
USBD_BMREQUESTTYPE_TYPE_Class
USBD_BMREQUESTTYPE_TYPE_Msk
USBD_BMREQUESTTYPE_TYPE_Pos
USBD_BMREQUESTTYPE_TYPE_Standard
USBD_BMREQUESTTYPE_TYPE_Vendor
USBD_BREQUEST_BREQUEST_Msk
USBD_BREQUEST_BREQUEST_Pos
USBD_BREQUEST_BREQUEST_STD_CLEAR_FEATURE
USBD_BREQUEST_BREQUEST_STD_GET_CONFIGURATION
USBD_BREQUEST_BREQUEST_STD_GET_DESCRIPTOR
USBD_BREQUEST_BREQUEST_STD_GET_INTERFACE
USBD_BREQUEST_BREQUEST_STD_GET_STATUS
USBD_BREQUEST_BREQUEST_STD_SET_ADDRESS
USBD_BREQUEST_BREQUEST_STD_SET_CONFIGURATION
USBD_BREQUEST_BREQUEST_STD_SET_DESCRIPTOR
USBD_BREQUEST_BREQUEST_STD_SET_FEATURE
USBD_BREQUEST_BREQUEST_STD_SET_INTERFACE
USBD_BREQUEST_BREQUEST_STD_SYNCH_FRAME
USBD_COUNT
USBD_DPDMVALUE_STATE_J
USBD_DPDMVALUE_STATE_K
USBD_DPDMVALUE_STATE_Msk
USBD_DPDMVALUE_STATE_Pos
USBD_DPDMVALUE_STATE_Resume
USBD_DTOGGLE_EP_Msk
USBD_DTOGGLE_EP_Pos
USBD_DTOGGLE_IO_In
USBD_DTOGGLE_IO_Msk
USBD_DTOGGLE_IO_Out
USBD_DTOGGLE_IO_Pos
USBD_DTOGGLE_VALUE_Data0
USBD_DTOGGLE_VALUE_Data1
USBD_DTOGGLE_VALUE_Msk
USBD_DTOGGLE_VALUE_Nop
USBD_DTOGGLE_VALUE_Pos
USBD_EASYDMA_MAXCNT_SIZE
USBD_ENABLE_ENABLE_Disabled
USBD_ENABLE_ENABLE_Enabled
USBD_ENABLE_ENABLE_Msk
USBD_ENABLE_ENABLE_Pos
USBD_EPDATASTATUS_EPIN1_DataDone
USBD_EPDATASTATUS_EPIN1_Msk
USBD_EPDATASTATUS_EPIN1_NotDone
USBD_EPDATASTATUS_EPIN1_Pos
USBD_EPDATASTATUS_EPIN2_DataDone
USBD_EPDATASTATUS_EPIN2_Msk
USBD_EPDATASTATUS_EPIN2_NotDone
USBD_EPDATASTATUS_EPIN2_Pos
USBD_EPDATASTATUS_EPIN3_DataDone
USBD_EPDATASTATUS_EPIN3_Msk
USBD_EPDATASTATUS_EPIN3_NotDone
USBD_EPDATASTATUS_EPIN3_Pos
USBD_EPDATASTATUS_EPIN4_DataDone
USBD_EPDATASTATUS_EPIN4_Msk
USBD_EPDATASTATUS_EPIN4_NotDone
USBD_EPDATASTATUS_EPIN4_Pos
USBD_EPDATASTATUS_EPIN5_DataDone
USBD_EPDATASTATUS_EPIN5_Msk
USBD_EPDATASTATUS_EPIN5_NotDone
USBD_EPDATASTATUS_EPIN5_Pos
USBD_EPDATASTATUS_EPIN6_DataDone
USBD_EPDATASTATUS_EPIN6_Msk
USBD_EPDATASTATUS_EPIN6_NotDone
USBD_EPDATASTATUS_EPIN6_Pos
USBD_EPDATASTATUS_EPIN7_DataDone
USBD_EPDATASTATUS_EPIN7_Msk
USBD_EPDATASTATUS_EPIN7_NotDone
USBD_EPDATASTATUS_EPIN7_Pos
USBD_EPDATASTATUS_EPOUT1_Msk
USBD_EPDATASTATUS_EPOUT1_NotStarted
USBD_EPDATASTATUS_EPOUT1_Pos
USBD_EPDATASTATUS_EPOUT1_Started
USBD_EPDATASTATUS_EPOUT2_Msk
USBD_EPDATASTATUS_EPOUT2_NotStarted
USBD_EPDATASTATUS_EPOUT2_Pos
USBD_EPDATASTATUS_EPOUT2_Started
USBD_EPDATASTATUS_EPOUT3_Msk
USBD_EPDATASTATUS_EPOUT3_NotStarted
USBD_EPDATASTATUS_EPOUT3_Pos
USBD_EPDATASTATUS_EPOUT3_Started
USBD_EPDATASTATUS_EPOUT4_Msk
USBD_EPDATASTATUS_EPOUT4_NotStarted
USBD_EPDATASTATUS_EPOUT4_Pos
USBD_EPDATASTATUS_EPOUT4_Started
USBD_EPDATASTATUS_EPOUT5_Msk
USBD_EPDATASTATUS_EPOUT5_NotStarted
USBD_EPDATASTATUS_EPOUT5_Pos
USBD_EPDATASTATUS_EPOUT5_Started
USBD_EPDATASTATUS_EPOUT6_Msk
USBD_EPDATASTATUS_EPOUT6_NotStarted
USBD_EPDATASTATUS_EPOUT6_Pos
USBD_EPDATASTATUS_EPOUT6_Started
USBD_EPDATASTATUS_EPOUT7_Msk
USBD_EPDATASTATUS_EPOUT7_NotStarted
USBD_EPDATASTATUS_EPOUT7_Pos
USBD_EPDATASTATUS_EPOUT7_Started
USBD_EPINEN_IN0_Disable
USBD_EPINEN_IN0_Enable
USBD_EPINEN_IN0_Msk
USBD_EPINEN_IN0_Pos
USBD_EPINEN_IN1_Disable
USBD_EPINEN_IN1_Enable
USBD_EPINEN_IN1_Msk
USBD_EPINEN_IN1_Pos
USBD_EPINEN_IN2_Disable
USBD_EPINEN_IN2_Enable
USBD_EPINEN_IN2_Msk
USBD_EPINEN_IN2_Pos
USBD_EPINEN_IN3_Disable
USBD_EPINEN_IN3_Enable
USBD_EPINEN_IN3_Msk
USBD_EPINEN_IN3_Pos
USBD_EPINEN_IN4_Disable
USBD_EPINEN_IN4_Enable
USBD_EPINEN_IN4_Msk
USBD_EPINEN_IN4_Pos
USBD_EPINEN_IN5_Disable
USBD_EPINEN_IN5_Enable
USBD_EPINEN_IN5_Msk
USBD_EPINEN_IN5_Pos
USBD_EPINEN_IN6_Disable
USBD_EPINEN_IN6_Enable
USBD_EPINEN_IN6_Msk
USBD_EPINEN_IN6_Pos
USBD_EPINEN_IN7_Disable
USBD_EPINEN_IN7_Enable
USBD_EPINEN_IN7_Msk
USBD_EPINEN_IN7_Pos
USBD_EPINEN_ISOIN_Disable
USBD_EPINEN_ISOIN_Enable
USBD_EPINEN_ISOIN_Msk
USBD_EPINEN_ISOIN_Pos
USBD_EPIN_AMOUNT_AMOUNT_Msk
USBD_EPIN_AMOUNT_AMOUNT_Pos
USBD_EPIN_MAXCNT_MAXCNT_Msk
USBD_EPIN_MAXCNT_MAXCNT_Pos
USBD_EPIN_PTR_PTR_Msk
USBD_EPIN_PTR_PTR_Pos
USBD_EPOUTEN_ISOOUT_Disable
USBD_EPOUTEN_ISOOUT_Enable
USBD_EPOUTEN_ISOOUT_Msk
USBD_EPOUTEN_ISOOUT_Pos
USBD_EPOUTEN_OUT0_Disable
USBD_EPOUTEN_OUT0_Enable
USBD_EPOUTEN_OUT0_Msk
USBD_EPOUTEN_OUT0_Pos
USBD_EPOUTEN_OUT1_Disable
USBD_EPOUTEN_OUT1_Enable
USBD_EPOUTEN_OUT1_Msk
USBD_EPOUTEN_OUT1_Pos
USBD_EPOUTEN_OUT2_Disable
USBD_EPOUTEN_OUT2_Enable
USBD_EPOUTEN_OUT2_Msk
USBD_EPOUTEN_OUT2_Pos
USBD_EPOUTEN_OUT3_Disable
USBD_EPOUTEN_OUT3_Enable
USBD_EPOUTEN_OUT3_Msk
USBD_EPOUTEN_OUT3_Pos
USBD_EPOUTEN_OUT4_Disable
USBD_EPOUTEN_OUT4_Enable
USBD_EPOUTEN_OUT4_Msk
USBD_EPOUTEN_OUT4_Pos
USBD_EPOUTEN_OUT5_Disable
USBD_EPOUTEN_OUT5_Enable
USBD_EPOUTEN_OUT5_Msk
USBD_EPOUTEN_OUT5_Pos
USBD_EPOUTEN_OUT6_Disable
USBD_EPOUTEN_OUT6_Enable
USBD_EPOUTEN_OUT6_Msk
USBD_EPOUTEN_OUT6_Pos
USBD_EPOUTEN_OUT7_Disable
USBD_EPOUTEN_OUT7_Enable
USBD_EPOUTEN_OUT7_Msk
USBD_EPOUTEN_OUT7_Pos
USBD_EPOUT_AMOUNT_AMOUNT_Msk
USBD_EPOUT_AMOUNT_AMOUNT_Pos
USBD_EPOUT_MAXCNT_MAXCNT_Msk
USBD_EPOUT_MAXCNT_MAXCNT_Pos
USBD_EPOUT_PTR_PTR_Msk
USBD_EPOUT_PTR_PTR_Pos
USBD_EPSTALL_EP_Msk
USBD_EPSTALL_EP_Pos
USBD_EPSTALL_IO_In
USBD_EPSTALL_IO_Msk
USBD_EPSTALL_IO_Out
USBD_EPSTALL_IO_Pos
USBD_EPSTALL_STALL_Msk
USBD_EPSTALL_STALL_Pos
USBD_EPSTALL_STALL_Stall
USBD_EPSTALL_STALL_UnStall
USBD_EPSTATUS_EPIN0_DataDone
USBD_EPSTATUS_EPIN0_Msk
USBD_EPSTATUS_EPIN0_NoData
USBD_EPSTATUS_EPIN0_Pos
USBD_EPSTATUS_EPIN1_DataDone
USBD_EPSTATUS_EPIN1_Msk
USBD_EPSTATUS_EPIN1_NoData
USBD_EPSTATUS_EPIN1_Pos
USBD_EPSTATUS_EPIN2_DataDone
USBD_EPSTATUS_EPIN2_Msk
USBD_EPSTATUS_EPIN2_NoData
USBD_EPSTATUS_EPIN2_Pos
USBD_EPSTATUS_EPIN3_DataDone
USBD_EPSTATUS_EPIN3_Msk
USBD_EPSTATUS_EPIN3_NoData
USBD_EPSTATUS_EPIN3_Pos
USBD_EPSTATUS_EPIN4_DataDone
USBD_EPSTATUS_EPIN4_Msk
USBD_EPSTATUS_EPIN4_NoData
USBD_EPSTATUS_EPIN4_Pos
USBD_EPSTATUS_EPIN5_DataDone
USBD_EPSTATUS_EPIN5_Msk
USBD_EPSTATUS_EPIN5_NoData
USBD_EPSTATUS_EPIN5_Pos
USBD_EPSTATUS_EPIN6_DataDone
USBD_EPSTATUS_EPIN6_Msk
USBD_EPSTATUS_EPIN6_NoData
USBD_EPSTATUS_EPIN6_Pos
USBD_EPSTATUS_EPIN7_DataDone
USBD_EPSTATUS_EPIN7_Msk
USBD_EPSTATUS_EPIN7_NoData
USBD_EPSTATUS_EPIN7_Pos
USBD_EPSTATUS_EPIN8_DataDone
USBD_EPSTATUS_EPIN8_Msk
USBD_EPSTATUS_EPIN8_NoData
USBD_EPSTATUS_EPIN8_Pos
USBD_EPSTATUS_EPOUT0_DataDone
USBD_EPSTATUS_EPOUT0_Msk
USBD_EPSTATUS_EPOUT0_NoData
USBD_EPSTATUS_EPOUT0_Pos
USBD_EPSTATUS_EPOUT1_DataDone
USBD_EPSTATUS_EPOUT1_Msk
USBD_EPSTATUS_EPOUT1_NoData
USBD_EPSTATUS_EPOUT1_Pos
USBD_EPSTATUS_EPOUT2_DataDone
USBD_EPSTATUS_EPOUT2_Msk
USBD_EPSTATUS_EPOUT2_NoData
USBD_EPSTATUS_EPOUT2_Pos
USBD_EPSTATUS_EPOUT3_DataDone
USBD_EPSTATUS_EPOUT3_Msk
USBD_EPSTATUS_EPOUT3_NoData
USBD_EPSTATUS_EPOUT3_Pos
USBD_EPSTATUS_EPOUT4_DataDone
USBD_EPSTATUS_EPOUT4_Msk
USBD_EPSTATUS_EPOUT4_NoData
USBD_EPSTATUS_EPOUT4_Pos
USBD_EPSTATUS_EPOUT5_DataDone
USBD_EPSTATUS_EPOUT5_Msk
USBD_EPSTATUS_EPOUT5_NoData
USBD_EPSTATUS_EPOUT5_Pos
USBD_EPSTATUS_EPOUT6_DataDone
USBD_EPSTATUS_EPOUT6_Msk
USBD_EPSTATUS_EPOUT6_NoData
USBD_EPSTATUS_EPOUT6_Pos
USBD_EPSTATUS_EPOUT7_DataDone
USBD_EPSTATUS_EPOUT7_Msk
USBD_EPSTATUS_EPOUT7_NoData
USBD_EPSTATUS_EPOUT7_Pos
USBD_EPSTATUS_EPOUT8_DataDone
USBD_EPSTATUS_EPOUT8_Msk
USBD_EPSTATUS_EPOUT8_NoData
USBD_EPSTATUS_EPOUT8_Pos
USBD_EVENTCAUSE_ISOOUTCRC_Detected
USBD_EVENTCAUSE_ISOOUTCRC_Msk
USBD_EVENTCAUSE_ISOOUTCRC_NotDetected
USBD_EVENTCAUSE_ISOOUTCRC_Pos
USBD_EVENTCAUSE_READY_Msk
USBD_EVENTCAUSE_READY_NotDetected
USBD_EVENTCAUSE_READY_Pos
USBD_EVENTCAUSE_READY_Ready
USBD_EVENTCAUSE_RESUME_Detected
USBD_EVENTCAUSE_RESUME_Msk
USBD_EVENTCAUSE_RESUME_NotDetected
USBD_EVENTCAUSE_RESUME_Pos
USBD_EVENTCAUSE_SUSPEND_Detected
USBD_EVENTCAUSE_SUSPEND_Msk
USBD_EVENTCAUSE_SUSPEND_NotDetected
USBD_EVENTCAUSE_SUSPEND_Pos
USBD_EVENTCAUSE_USBWUALLOWED_Allowed
USBD_EVENTCAUSE_USBWUALLOWED_Msk
USBD_EVENTCAUSE_USBWUALLOWED_NotAllowed
USBD_EVENTCAUSE_USBWUALLOWED_Pos
USBD_EVENTS_ENDEPIN_EVENTS_ENDEPIN_Generated
USBD_EVENTS_ENDEPIN_EVENTS_ENDEPIN_Msk
USBD_EVENTS_ENDEPIN_EVENTS_ENDEPIN_NotGenerated
USBD_EVENTS_ENDEPIN_EVENTS_ENDEPIN_Pos
USBD_EVENTS_ENDEPOUT_EVENTS_ENDEPOUT_Generated
USBD_EVENTS_ENDEPOUT_EVENTS_ENDEPOUT_Msk
USBD_EVENTS_ENDEPOUT_EVENTS_ENDEPOUT_NotGenerated
USBD_EVENTS_ENDEPOUT_EVENTS_ENDEPOUT_Pos
USBD_EVENTS_ENDISOIN_EVENTS_ENDISOIN_Generated
USBD_EVENTS_ENDISOIN_EVENTS_ENDISOIN_Msk
USBD_EVENTS_ENDISOIN_EVENTS_ENDISOIN_NotGenerated
USBD_EVENTS_ENDISOIN_EVENTS_ENDISOIN_Pos
USBD_EVENTS_ENDISOOUT_EVENTS_ENDISOOUT_Generated
USBD_EVENTS_ENDISOOUT_EVENTS_ENDISOOUT_Msk
USBD_EVENTS_ENDISOOUT_EVENTS_ENDISOOUT_NotGenerated
USBD_EVENTS_ENDISOOUT_EVENTS_ENDISOOUT_Pos
USBD_EVENTS_EP0DATADONE_EVENTS_EP0DATADONE_Generated
USBD_EVENTS_EP0DATADONE_EVENTS_EP0DATADONE_Msk
USBD_EVENTS_EP0DATADONE_EVENTS_EP0DATADONE_NotGenerated
USBD_EVENTS_EP0DATADONE_EVENTS_EP0DATADONE_Pos
USBD_EVENTS_EP0SETUP_EVENTS_EP0SETUP_Generated
USBD_EVENTS_EP0SETUP_EVENTS_EP0SETUP_Msk
USBD_EVENTS_EP0SETUP_EVENTS_EP0SETUP_NotGenerated
USBD_EVENTS_EP0SETUP_EVENTS_EP0SETUP_Pos
USBD_EVENTS_EPDATA_EVENTS_EPDATA_Generated
USBD_EVENTS_EPDATA_EVENTS_EPDATA_Msk
USBD_EVENTS_EPDATA_EVENTS_EPDATA_NotGenerated
USBD_EVENTS_EPDATA_EVENTS_EPDATA_Pos
USBD_EVENTS_SOF_EVENTS_SOF_Generated
USBD_EVENTS_SOF_EVENTS_SOF_Msk
USBD_EVENTS_SOF_EVENTS_SOF_NotGenerated
USBD_EVENTS_SOF_EVENTS_SOF_Pos
USBD_EVENTS_STARTED_EVENTS_STARTED_Generated
USBD_EVENTS_STARTED_EVENTS_STARTED_Msk
USBD_EVENTS_STARTED_EVENTS_STARTED_NotGenerated
USBD_EVENTS_STARTED_EVENTS_STARTED_Pos
USBD_EVENTS_USBEVENT_EVENTS_USBEVENT_Generated
USBD_EVENTS_USBEVENT_EVENTS_USBEVENT_Msk
USBD_EVENTS_USBEVENT_EVENTS_USBEVENT_NotGenerated
USBD_EVENTS_USBEVENT_EVENTS_USBEVENT_Pos
USBD_EVENTS_USBRESET_EVENTS_USBRESET_Generated
USBD_EVENTS_USBRESET_EVENTS_USBRESET_Msk
USBD_EVENTS_USBRESET_EVENTS_USBRESET_NotGenerated
USBD_EVENTS_USBRESET_EVENTS_USBRESET_Pos
USBD_FRAMECNTR_FRAMECNTR_Msk
USBD_FRAMECNTR_FRAMECNTR_Pos
USBD_HALTED_EPIN_GETSTATUS_Halted
USBD_HALTED_EPIN_GETSTATUS_Msk
USBD_HALTED_EPIN_GETSTATUS_NotHalted
USBD_HALTED_EPIN_GETSTATUS_Pos
USBD_HALTED_EPOUT_GETSTATUS_Halted
USBD_HALTED_EPOUT_GETSTATUS_Msk
USBD_HALTED_EPOUT_GETSTATUS_NotHalted
USBD_HALTED_EPOUT_GETSTATUS_Pos
USBD_INTENCLR_ENDEPIN0_Clear
USBD_INTENCLR_ENDEPIN0_Disabled
USBD_INTENCLR_ENDEPIN0_Enabled
USBD_INTENCLR_ENDEPIN0_Msk
USBD_INTENCLR_ENDEPIN0_Pos
USBD_INTENCLR_ENDEPIN1_Clear
USBD_INTENCLR_ENDEPIN1_Disabled
USBD_INTENCLR_ENDEPIN1_Enabled
USBD_INTENCLR_ENDEPIN1_Msk
USBD_INTENCLR_ENDEPIN1_Pos
USBD_INTENCLR_ENDEPIN2_Clear
USBD_INTENCLR_ENDEPIN2_Disabled
USBD_INTENCLR_ENDEPIN2_Enabled
USBD_INTENCLR_ENDEPIN2_Msk
USBD_INTENCLR_ENDEPIN2_Pos
USBD_INTENCLR_ENDEPIN3_Clear
USBD_INTENCLR_ENDEPIN3_Disabled
USBD_INTENCLR_ENDEPIN3_Enabled
USBD_INTENCLR_ENDEPIN3_Msk
USBD_INTENCLR_ENDEPIN3_Pos
USBD_INTENCLR_ENDEPIN4_Clear
USBD_INTENCLR_ENDEPIN4_Disabled
USBD_INTENCLR_ENDEPIN4_Enabled
USBD_INTENCLR_ENDEPIN4_Msk
USBD_INTENCLR_ENDEPIN4_Pos
USBD_INTENCLR_ENDEPIN5_Clear
USBD_INTENCLR_ENDEPIN5_Disabled
USBD_INTENCLR_ENDEPIN5_Enabled
USBD_INTENCLR_ENDEPIN5_Msk
USBD_INTENCLR_ENDEPIN5_Pos
USBD_INTENCLR_ENDEPIN6_Clear
USBD_INTENCLR_ENDEPIN6_Disabled
USBD_INTENCLR_ENDEPIN6_Enabled
USBD_INTENCLR_ENDEPIN6_Msk
USBD_INTENCLR_ENDEPIN6_Pos
USBD_INTENCLR_ENDEPIN7_Clear
USBD_INTENCLR_ENDEPIN7_Disabled
USBD_INTENCLR_ENDEPIN7_Enabled
USBD_INTENCLR_ENDEPIN7_Msk
USBD_INTENCLR_ENDEPIN7_Pos
USBD_INTENCLR_ENDEPOUT0_Clear
USBD_INTENCLR_ENDEPOUT0_Disabled
USBD_INTENCLR_ENDEPOUT0_Enabled
USBD_INTENCLR_ENDEPOUT0_Msk
USBD_INTENCLR_ENDEPOUT0_Pos
USBD_INTENCLR_ENDEPOUT1_Clear
USBD_INTENCLR_ENDEPOUT1_Disabled
USBD_INTENCLR_ENDEPOUT1_Enabled
USBD_INTENCLR_ENDEPOUT1_Msk
USBD_INTENCLR_ENDEPOUT1_Pos
USBD_INTENCLR_ENDEPOUT2_Clear
USBD_INTENCLR_ENDEPOUT2_Disabled
USBD_INTENCLR_ENDEPOUT2_Enabled
USBD_INTENCLR_ENDEPOUT2_Msk
USBD_INTENCLR_ENDEPOUT2_Pos
USBD_INTENCLR_ENDEPOUT3_Clear
USBD_INTENCLR_ENDEPOUT3_Disabled
USBD_INTENCLR_ENDEPOUT3_Enabled
USBD_INTENCLR_ENDEPOUT3_Msk
USBD_INTENCLR_ENDEPOUT3_Pos
USBD_INTENCLR_ENDEPOUT4_Clear
USBD_INTENCLR_ENDEPOUT4_Disabled
USBD_INTENCLR_ENDEPOUT4_Enabled
USBD_INTENCLR_ENDEPOUT4_Msk
USBD_INTENCLR_ENDEPOUT4_Pos
USBD_INTENCLR_ENDEPOUT5_Clear
USBD_INTENCLR_ENDEPOUT5_Disabled
USBD_INTENCLR_ENDEPOUT5_Enabled
USBD_INTENCLR_ENDEPOUT5_Msk
USBD_INTENCLR_ENDEPOUT5_Pos
USBD_INTENCLR_ENDEPOUT6_Clear
USBD_INTENCLR_ENDEPOUT6_Disabled
USBD_INTENCLR_ENDEPOUT6_Enabled
USBD_INTENCLR_ENDEPOUT6_Msk
USBD_INTENCLR_ENDEPOUT6_Pos
USBD_INTENCLR_ENDEPOUT7_Clear
USBD_INTENCLR_ENDEPOUT7_Disabled
USBD_INTENCLR_ENDEPOUT7_Enabled
USBD_INTENCLR_ENDEPOUT7_Msk
USBD_INTENCLR_ENDEPOUT7_Pos
USBD_INTENCLR_ENDISOIN_Clear
USBD_INTENCLR_ENDISOIN_Disabled
USBD_INTENCLR_ENDISOIN_Enabled
USBD_INTENCLR_ENDISOIN_Msk
USBD_INTENCLR_ENDISOIN_Pos
USBD_INTENCLR_ENDISOOUT_Clear
USBD_INTENCLR_ENDISOOUT_Disabled
USBD_INTENCLR_ENDISOOUT_Enabled
USBD_INTENCLR_ENDISOOUT_Msk
USBD_INTENCLR_ENDISOOUT_Pos
USBD_INTENCLR_EP0DATADONE_Clear
USBD_INTENCLR_EP0DATADONE_Disabled
USBD_INTENCLR_EP0DATADONE_Enabled
USBD_INTENCLR_EP0DATADONE_Msk
USBD_INTENCLR_EP0DATADONE_Pos
USBD_INTENCLR_EP0SETUP_Clear
USBD_INTENCLR_EP0SETUP_Disabled
USBD_INTENCLR_EP0SETUP_Enabled
USBD_INTENCLR_EP0SETUP_Msk
USBD_INTENCLR_EP0SETUP_Pos
USBD_INTENCLR_EPDATA_Clear
USBD_INTENCLR_EPDATA_Disabled
USBD_INTENCLR_EPDATA_Enabled
USBD_INTENCLR_EPDATA_Msk
USBD_INTENCLR_EPDATA_Pos
USBD_INTENCLR_SOF_Clear
USBD_INTENCLR_SOF_Disabled
USBD_INTENCLR_SOF_Enabled
USBD_INTENCLR_SOF_Msk
USBD_INTENCLR_SOF_Pos
USBD_INTENCLR_STARTED_Clear
USBD_INTENCLR_STARTED_Disabled
USBD_INTENCLR_STARTED_Enabled
USBD_INTENCLR_STARTED_Msk
USBD_INTENCLR_STARTED_Pos
USBD_INTENCLR_USBEVENT_Clear
USBD_INTENCLR_USBEVENT_Disabled
USBD_INTENCLR_USBEVENT_Enabled
USBD_INTENCLR_USBEVENT_Msk
USBD_INTENCLR_USBEVENT_Pos
USBD_INTENCLR_USBRESET_Clear
USBD_INTENCLR_USBRESET_Disabled
USBD_INTENCLR_USBRESET_Enabled
USBD_INTENCLR_USBRESET_Msk
USBD_INTENCLR_USBRESET_Pos
USBD_INTENSET_ENDEPIN0_Disabled
USBD_INTENSET_ENDEPIN0_Enabled
USBD_INTENSET_ENDEPIN0_Msk
USBD_INTENSET_ENDEPIN0_Pos
USBD_INTENSET_ENDEPIN0_Set
USBD_INTENSET_ENDEPIN1_Disabled
USBD_INTENSET_ENDEPIN1_Enabled
USBD_INTENSET_ENDEPIN1_Msk
USBD_INTENSET_ENDEPIN1_Pos
USBD_INTENSET_ENDEPIN1_Set
USBD_INTENSET_ENDEPIN2_Disabled
USBD_INTENSET_ENDEPIN2_Enabled
USBD_INTENSET_ENDEPIN2_Msk
USBD_INTENSET_ENDEPIN2_Pos
USBD_INTENSET_ENDEPIN2_Set
USBD_INTENSET_ENDEPIN3_Disabled
USBD_INTENSET_ENDEPIN3_Enabled
USBD_INTENSET_ENDEPIN3_Msk
USBD_INTENSET_ENDEPIN3_Pos
USBD_INTENSET_ENDEPIN3_Set
USBD_INTENSET_ENDEPIN4_Disabled
USBD_INTENSET_ENDEPIN4_Enabled
USBD_INTENSET_ENDEPIN4_Msk
USBD_INTENSET_ENDEPIN4_Pos
USBD_INTENSET_ENDEPIN4_Set
USBD_INTENSET_ENDEPIN5_Disabled
USBD_INTENSET_ENDEPIN5_Enabled
USBD_INTENSET_ENDEPIN5_Msk
USBD_INTENSET_ENDEPIN5_Pos
USBD_INTENSET_ENDEPIN5_Set
USBD_INTENSET_ENDEPIN6_Disabled
USBD_INTENSET_ENDEPIN6_Enabled
USBD_INTENSET_ENDEPIN6_Msk
USBD_INTENSET_ENDEPIN6_Pos
USBD_INTENSET_ENDEPIN6_Set
USBD_INTENSET_ENDEPIN7_Disabled
USBD_INTENSET_ENDEPIN7_Enabled
USBD_INTENSET_ENDEPIN7_Msk
USBD_INTENSET_ENDEPIN7_Pos
USBD_INTENSET_ENDEPIN7_Set
USBD_INTENSET_ENDEPOUT0_Disabled
USBD_INTENSET_ENDEPOUT0_Enabled
USBD_INTENSET_ENDEPOUT0_Msk
USBD_INTENSET_ENDEPOUT0_Pos
USBD_INTENSET_ENDEPOUT0_Set
USBD_INTENSET_ENDEPOUT1_Disabled
USBD_INTENSET_ENDEPOUT1_Enabled
USBD_INTENSET_ENDEPOUT1_Msk
USBD_INTENSET_ENDEPOUT1_Pos
USBD_INTENSET_ENDEPOUT1_Set
USBD_INTENSET_ENDEPOUT2_Disabled
USBD_INTENSET_ENDEPOUT2_Enabled
USBD_INTENSET_ENDEPOUT2_Msk
USBD_INTENSET_ENDEPOUT2_Pos
USBD_INTENSET_ENDEPOUT2_Set
USBD_INTENSET_ENDEPOUT3_Disabled
USBD_INTENSET_ENDEPOUT3_Enabled
USBD_INTENSET_ENDEPOUT3_Msk
USBD_INTENSET_ENDEPOUT3_Pos
USBD_INTENSET_ENDEPOUT3_Set
USBD_INTENSET_ENDEPOUT4_Disabled
USBD_INTENSET_ENDEPOUT4_Enabled
USBD_INTENSET_ENDEPOUT4_Msk
USBD_INTENSET_ENDEPOUT4_Pos
USBD_INTENSET_ENDEPOUT4_Set
USBD_INTENSET_ENDEPOUT5_Disabled
USBD_INTENSET_ENDEPOUT5_Enabled
USBD_INTENSET_ENDEPOUT5_Msk
USBD_INTENSET_ENDEPOUT5_Pos
USBD_INTENSET_ENDEPOUT5_Set
USBD_INTENSET_ENDEPOUT6_Disabled
USBD_INTENSET_ENDEPOUT6_Enabled
USBD_INTENSET_ENDEPOUT6_Msk
USBD_INTENSET_ENDEPOUT6_Pos
USBD_INTENSET_ENDEPOUT6_Set
USBD_INTENSET_ENDEPOUT7_Disabled
USBD_INTENSET_ENDEPOUT7_Enabled
USBD_INTENSET_ENDEPOUT7_Msk
USBD_INTENSET_ENDEPOUT7_Pos
USBD_INTENSET_ENDEPOUT7_Set
USBD_INTENSET_ENDISOIN_Disabled
USBD_INTENSET_ENDISOIN_Enabled
USBD_INTENSET_ENDISOIN_Msk
USBD_INTENSET_ENDISOIN_Pos
USBD_INTENSET_ENDISOIN_Set
USBD_INTENSET_ENDISOOUT_Disabled
USBD_INTENSET_ENDISOOUT_Enabled
USBD_INTENSET_ENDISOOUT_Msk
USBD_INTENSET_ENDISOOUT_Pos
USBD_INTENSET_ENDISOOUT_Set
USBD_INTENSET_EP0DATADONE_Disabled
USBD_INTENSET_EP0DATADONE_Enabled
USBD_INTENSET_EP0DATADONE_Msk
USBD_INTENSET_EP0DATADONE_Pos
USBD_INTENSET_EP0DATADONE_Set
USBD_INTENSET_EP0SETUP_Disabled
USBD_INTENSET_EP0SETUP_Enabled
USBD_INTENSET_EP0SETUP_Msk
USBD_INTENSET_EP0SETUP_Pos
USBD_INTENSET_EP0SETUP_Set
USBD_INTENSET_EPDATA_Disabled
USBD_INTENSET_EPDATA_Enabled
USBD_INTENSET_EPDATA_Msk
USBD_INTENSET_EPDATA_Pos
USBD_INTENSET_EPDATA_Set
USBD_INTENSET_SOF_Disabled
USBD_INTENSET_SOF_Enabled
USBD_INTENSET_SOF_Msk
USBD_INTENSET_SOF_Pos
USBD_INTENSET_SOF_Set
USBD_INTENSET_STARTED_Disabled
USBD_INTENSET_STARTED_Enabled
USBD_INTENSET_STARTED_Msk
USBD_INTENSET_STARTED_Pos
USBD_INTENSET_STARTED_Set
USBD_INTENSET_USBEVENT_Disabled
USBD_INTENSET_USBEVENT_Enabled
USBD_INTENSET_USBEVENT_Msk
USBD_INTENSET_USBEVENT_Pos
USBD_INTENSET_USBEVENT_Set
USBD_INTENSET_USBRESET_Disabled
USBD_INTENSET_USBRESET_Enabled
USBD_INTENSET_USBRESET_Msk
USBD_INTENSET_USBRESET_Pos
USBD_INTENSET_USBRESET_Set
USBD_INTEN_ENDEPIN0_Disabled
USBD_INTEN_ENDEPIN0_Enabled
USBD_INTEN_ENDEPIN0_Msk
USBD_INTEN_ENDEPIN0_Pos
USBD_INTEN_ENDEPIN1_Disabled
USBD_INTEN_ENDEPIN1_Enabled
USBD_INTEN_ENDEPIN1_Msk
USBD_INTEN_ENDEPIN1_Pos
USBD_INTEN_ENDEPIN2_Disabled
USBD_INTEN_ENDEPIN2_Enabled
USBD_INTEN_ENDEPIN2_Msk
USBD_INTEN_ENDEPIN2_Pos
USBD_INTEN_ENDEPIN3_Disabled
USBD_INTEN_ENDEPIN3_Enabled
USBD_INTEN_ENDEPIN3_Msk
USBD_INTEN_ENDEPIN3_Pos
USBD_INTEN_ENDEPIN4_Disabled
USBD_INTEN_ENDEPIN4_Enabled
USBD_INTEN_ENDEPIN4_Msk
USBD_INTEN_ENDEPIN4_Pos
USBD_INTEN_ENDEPIN5_Disabled
USBD_INTEN_ENDEPIN5_Enabled
USBD_INTEN_ENDEPIN5_Msk
USBD_INTEN_ENDEPIN5_Pos
USBD_INTEN_ENDEPIN6_Disabled
USBD_INTEN_ENDEPIN6_Enabled
USBD_INTEN_ENDEPIN6_Msk
USBD_INTEN_ENDEPIN6_Pos
USBD_INTEN_ENDEPIN7_Disabled
USBD_INTEN_ENDEPIN7_Enabled
USBD_INTEN_ENDEPIN7_Msk
USBD_INTEN_ENDEPIN7_Pos
USBD_INTEN_ENDEPOUT0_Disabled
USBD_INTEN_ENDEPOUT0_Enabled
USBD_INTEN_ENDEPOUT0_Msk
USBD_INTEN_ENDEPOUT0_Pos
USBD_INTEN_ENDEPOUT1_Disabled
USBD_INTEN_ENDEPOUT1_Enabled
USBD_INTEN_ENDEPOUT1_Msk
USBD_INTEN_ENDEPOUT1_Pos
USBD_INTEN_ENDEPOUT2_Disabled
USBD_INTEN_ENDEPOUT2_Enabled
USBD_INTEN_ENDEPOUT2_Msk
USBD_INTEN_ENDEPOUT2_Pos
USBD_INTEN_ENDEPOUT3_Disabled
USBD_INTEN_ENDEPOUT3_Enabled
USBD_INTEN_ENDEPOUT3_Msk
USBD_INTEN_ENDEPOUT3_Pos
USBD_INTEN_ENDEPOUT4_Disabled
USBD_INTEN_ENDEPOUT4_Enabled
USBD_INTEN_ENDEPOUT4_Msk
USBD_INTEN_ENDEPOUT4_Pos
USBD_INTEN_ENDEPOUT5_Disabled
USBD_INTEN_ENDEPOUT5_Enabled
USBD_INTEN_ENDEPOUT5_Msk
USBD_INTEN_ENDEPOUT5_Pos
USBD_INTEN_ENDEPOUT6_Disabled
USBD_INTEN_ENDEPOUT6_Enabled
USBD_INTEN_ENDEPOUT6_Msk
USBD_INTEN_ENDEPOUT6_Pos
USBD_INTEN_ENDEPOUT7_Disabled
USBD_INTEN_ENDEPOUT7_Enabled
USBD_INTEN_ENDEPOUT7_Msk
USBD_INTEN_ENDEPOUT7_Pos
USBD_INTEN_ENDISOIN_Disabled
USBD_INTEN_ENDISOIN_Enabled
USBD_INTEN_ENDISOIN_Msk
USBD_INTEN_ENDISOIN_Pos
USBD_INTEN_ENDISOOUT_Disabled
USBD_INTEN_ENDISOOUT_Enabled
USBD_INTEN_ENDISOOUT_Msk
USBD_INTEN_ENDISOOUT_Pos
USBD_INTEN_EP0DATADONE_Disabled
USBD_INTEN_EP0DATADONE_Enabled
USBD_INTEN_EP0DATADONE_Msk
USBD_INTEN_EP0DATADONE_Pos
USBD_INTEN_EP0SETUP_Disabled
USBD_INTEN_EP0SETUP_Enabled
USBD_INTEN_EP0SETUP_Msk
USBD_INTEN_EP0SETUP_Pos
USBD_INTEN_EPDATA_Disabled
USBD_INTEN_EPDATA_Enabled
USBD_INTEN_EPDATA_Msk
USBD_INTEN_EPDATA_Pos
USBD_INTEN_SOF_Disabled
USBD_INTEN_SOF_Enabled
USBD_INTEN_SOF_Msk
USBD_INTEN_SOF_Pos
USBD_INTEN_STARTED_Disabled
USBD_INTEN_STARTED_Enabled
USBD_INTEN_STARTED_Msk
USBD_INTEN_STARTED_Pos
USBD_INTEN_USBEVENT_Disabled
USBD_INTEN_USBEVENT_Enabled
USBD_INTEN_USBEVENT_Msk
USBD_INTEN_USBEVENT_Pos
USBD_INTEN_USBRESET_Disabled
USBD_INTEN_USBRESET_Enabled
USBD_INTEN_USBRESET_Msk
USBD_INTEN_USBRESET_Pos
USBD_ISOINCONFIG_RESPONSE_Msk
USBD_ISOINCONFIG_RESPONSE_NoResp
USBD_ISOINCONFIG_RESPONSE_Pos
USBD_ISOINCONFIG_RESPONSE_ZeroData
USBD_ISOIN_AMOUNT_AMOUNT_Msk
USBD_ISOIN_AMOUNT_AMOUNT_Pos
USBD_ISOIN_MAXCNT_MAXCNT_Msk
USBD_ISOIN_MAXCNT_MAXCNT_Pos
USBD_ISOIN_PTR_PTR_Msk
USBD_ISOIN_PTR_PTR_Pos
USBD_ISOOUT_AMOUNT_AMOUNT_Msk
USBD_ISOOUT_AMOUNT_AMOUNT_Pos
USBD_ISOOUT_MAXCNT_MAXCNT_Msk
USBD_ISOOUT_MAXCNT_MAXCNT_Pos
USBD_ISOOUT_PTR_PTR_Msk
USBD_ISOOUT_PTR_PTR_Pos
USBD_ISOSPLIT_SPLIT_HalfIN
USBD_ISOSPLIT_SPLIT_Msk
USBD_ISOSPLIT_SPLIT_OneDir
USBD_ISOSPLIT_SPLIT_Pos
USBD_LOWPOWER_LOWPOWER_ForceNormal
USBD_LOWPOWER_LOWPOWER_LowPower
USBD_LOWPOWER_LOWPOWER_Msk
USBD_LOWPOWER_LOWPOWER_Pos
USBD_SHORTS_ENDEPOUT0_EP0RCVOUT_Disabled
USBD_SHORTS_ENDEPOUT0_EP0RCVOUT_Enabled
USBD_SHORTS_ENDEPOUT0_EP0RCVOUT_Msk
USBD_SHORTS_ENDEPOUT0_EP0RCVOUT_Pos
USBD_SHORTS_ENDEPOUT0_EP0STATUS_Disabled
USBD_SHORTS_ENDEPOUT0_EP0STATUS_Enabled
USBD_SHORTS_ENDEPOUT0_EP0STATUS_Msk
USBD_SHORTS_ENDEPOUT0_EP0STATUS_Pos
USBD_SHORTS_EP0DATADONE_EP0STATUS_Disabled
USBD_SHORTS_EP0DATADONE_EP0STATUS_Enabled
USBD_SHORTS_EP0DATADONE_EP0STATUS_Msk
USBD_SHORTS_EP0DATADONE_EP0STATUS_Pos
USBD_SHORTS_EP0DATADONE_STARTEPIN0_Disabled
USBD_SHORTS_EP0DATADONE_STARTEPIN0_Enabled
USBD_SHORTS_EP0DATADONE_STARTEPIN0_Msk
USBD_SHORTS_EP0DATADONE_STARTEPIN0_Pos
USBD_SHORTS_EP0DATADONE_STARTEPOUT0_Disabled
USBD_SHORTS_EP0DATADONE_STARTEPOUT0_Enabled
USBD_SHORTS_EP0DATADONE_STARTEPOUT0_Msk
USBD_SHORTS_EP0DATADONE_STARTEPOUT0_Pos
USBD_SIZE_EPOUT_SIZE_Msk
USBD_SIZE_EPOUT_SIZE_Pos
USBD_SIZE_ISOOUT_SIZE_Msk
USBD_SIZE_ISOOUT_SIZE_Pos
USBD_SIZE_ISOOUT_ZERO_Msk
USBD_SIZE_ISOOUT_ZERO_Normal
USBD_SIZE_ISOOUT_ZERO_Pos
USBD_SIZE_ISOOUT_ZERO_ZeroData
USBD_TASKS_DPDMDRIVE_TASKS_DPDMDRIVE_Msk
USBD_TASKS_DPDMDRIVE_TASKS_DPDMDRIVE_Pos
USBD_TASKS_DPDMDRIVE_TASKS_DPDMDRIVE_Trigger
USBD_TASKS_DPDMNODRIVE_TASKS_DPDMNODRIVE_Msk
USBD_TASKS_DPDMNODRIVE_TASKS_DPDMNODRIVE_Pos
USBD_TASKS_DPDMNODRIVE_TASKS_DPDMNODRIVE_Trigger
USBD_TASKS_EP0RCVOUT_TASKS_EP0RCVOUT_Msk
USBD_TASKS_EP0RCVOUT_TASKS_EP0RCVOUT_Pos
USBD_TASKS_EP0RCVOUT_TASKS_EP0RCVOUT_Trigger
USBD_TASKS_EP0STALL_TASKS_EP0STALL_Msk
USBD_TASKS_EP0STALL_TASKS_EP0STALL_Pos
USBD_TASKS_EP0STALL_TASKS_EP0STALL_Trigger
USBD_TASKS_EP0STATUS_TASKS_EP0STATUS_Msk
USBD_TASKS_EP0STATUS_TASKS_EP0STATUS_Pos
USBD_TASKS_EP0STATUS_TASKS_EP0STATUS_Trigger
USBD_TASKS_STARTEPIN_TASKS_STARTEPIN_Msk
USBD_TASKS_STARTEPIN_TASKS_STARTEPIN_Pos
USBD_TASKS_STARTEPIN_TASKS_STARTEPIN_Trigger
USBD_TASKS_STARTEPOUT_TASKS_STARTEPOUT_Msk
USBD_TASKS_STARTEPOUT_TASKS_STARTEPOUT_Pos
USBD_TASKS_STARTEPOUT_TASKS_STARTEPOUT_Trigger
USBD_TASKS_STARTISOIN_TASKS_STARTISOIN_Msk
USBD_TASKS_STARTISOIN_TASKS_STARTISOIN_Pos
USBD_TASKS_STARTISOIN_TASKS_STARTISOIN_Trigger
USBD_TASKS_STARTISOOUT_TASKS_STARTISOOUT_Msk
USBD_TASKS_STARTISOOUT_TASKS_STARTISOOUT_Pos
USBD_TASKS_STARTISOOUT_TASKS_STARTISOOUT_Trigger
USBD_USBADDR_ADDR_Msk
USBD_USBADDR_ADDR_Pos
USBD_USBPULLUP_CONNECT_Disabled
USBD_USBPULLUP_CONNECT_Enabled
USBD_USBPULLUP_CONNECT_Msk
USBD_USBPULLUP_CONNECT_Pos
USBD_WINDEXH_WINDEXH_Msk
USBD_WINDEXH_WINDEXH_Pos
USBD_WINDEXL_WINDEXL_Msk
USBD_WINDEXL_WINDEXL_Pos
USBD_WLENGTHH_WLENGTHH_Msk
USBD_WLENGTHH_WLENGTHH_Pos
USBD_WLENGTHL_WLENGTHL_Msk
USBD_WLENGTHL_WLENGTHL_Pos
USBD_WVALUEH_WVALUEH_Msk
USBD_WVALUEH_WVALUEH_Pos
USBD_WVALUEL_WVALUEL_Msk
USBD_WVALUEL_WVALUEL_Pos
USE_CBOR_CONTEXT
US_PER_CS
US_PER_HOUR
US_PER_MS
US_PER_SEC
UTC01_01_2016
UUID_NODE_LEN
UUID_STR_LEN
UUID_V1
UUID_V2
UUID_V3
UUID_V4
UUID_V5
UUID_VERSION_MASK
UWORD_MAX
UWORD_MIN
VFS_ANY_FD
VFS_FS_FLAG_WANT_ABS_PATH
VFS_MAX_OPEN_FILES
VFS_NAME_MAX
WDT_CONFIG_HALT_Msk
WDT_CONFIG_HALT_Pause
WDT_CONFIG_HALT_Pos
WDT_CONFIG_HALT_Run
WDT_CONFIG_SLEEP_Msk
WDT_CONFIG_SLEEP_Pause
WDT_CONFIG_SLEEP_Pos
WDT_CONFIG_SLEEP_Run
WDT_COUNT
WDT_CRV_CRV_Msk
WDT_CRV_CRV_Pos
WDT_EVENTS_TIMEOUT_EVENTS_TIMEOUT_Generated
WDT_EVENTS_TIMEOUT_EVENTS_TIMEOUT_Msk
WDT_EVENTS_TIMEOUT_EVENTS_TIMEOUT_NotGenerated
WDT_EVENTS_TIMEOUT_EVENTS_TIMEOUT_Pos
WDT_INTENCLR_TIMEOUT_Clear
WDT_INTENCLR_TIMEOUT_Disabled
WDT_INTENCLR_TIMEOUT_Enabled
WDT_INTENCLR_TIMEOUT_Msk
WDT_INTENCLR_TIMEOUT_Pos
WDT_INTENSET_TIMEOUT_Disabled
WDT_INTENSET_TIMEOUT_Enabled
WDT_INTENSET_TIMEOUT_Msk
WDT_INTENSET_TIMEOUT_Pos
WDT_INTENSET_TIMEOUT_Set
WDT_REQSTATUS_RR0_DisabledOrRequested
WDT_REQSTATUS_RR0_EnabledAndUnrequested
WDT_REQSTATUS_RR0_Msk
WDT_REQSTATUS_RR0_Pos
WDT_REQSTATUS_RR1_DisabledOrRequested
WDT_REQSTATUS_RR1_EnabledAndUnrequested
WDT_REQSTATUS_RR1_Msk
WDT_REQSTATUS_RR1_Pos
WDT_REQSTATUS_RR2_DisabledOrRequested
WDT_REQSTATUS_RR2_EnabledAndUnrequested
WDT_REQSTATUS_RR2_Msk
WDT_REQSTATUS_RR2_Pos
WDT_REQSTATUS_RR3_DisabledOrRequested
WDT_REQSTATUS_RR3_EnabledAndUnrequested
WDT_REQSTATUS_RR3_Msk
WDT_REQSTATUS_RR3_Pos
WDT_REQSTATUS_RR4_DisabledOrRequested
WDT_REQSTATUS_RR4_EnabledAndUnrequested
WDT_REQSTATUS_RR4_Msk
WDT_REQSTATUS_RR4_Pos
WDT_REQSTATUS_RR5_DisabledOrRequested
WDT_REQSTATUS_RR5_EnabledAndUnrequested
WDT_REQSTATUS_RR5_Msk
WDT_REQSTATUS_RR5_Pos
WDT_REQSTATUS_RR6_DisabledOrRequested
WDT_REQSTATUS_RR6_EnabledAndUnrequested
WDT_REQSTATUS_RR6_Msk
WDT_REQSTATUS_RR6_Pos
WDT_REQSTATUS_RR7_DisabledOrRequested
WDT_REQSTATUS_RR7_EnabledAndUnrequested
WDT_REQSTATUS_RR7_Msk
WDT_REQSTATUS_RR7_Pos
WDT_RREN_RR0_Disabled
WDT_RREN_RR0_Enabled
WDT_RREN_RR0_Msk
WDT_RREN_RR0_Pos
WDT_RREN_RR1_Disabled
WDT_RREN_RR1_Enabled
WDT_RREN_RR1_Msk
WDT_RREN_RR1_Pos
WDT_RREN_RR2_Disabled
WDT_RREN_RR2_Enabled
WDT_RREN_RR2_Msk
WDT_RREN_RR2_Pos
WDT_RREN_RR3_Disabled
WDT_RREN_RR3_Enabled
WDT_RREN_RR3_Msk
WDT_RREN_RR3_Pos
WDT_RREN_RR4_Disabled
WDT_RREN_RR4_Enabled
WDT_RREN_RR4_Msk
WDT_RREN_RR4_Pos
WDT_RREN_RR5_Disabled
WDT_RREN_RR5_Enabled
WDT_RREN_RR5_Msk
WDT_RREN_RR5_Pos
WDT_RREN_RR6_Disabled
WDT_RREN_RR6_Enabled
WDT_RREN_RR6_Msk
WDT_RREN_RR6_Pos
WDT_RREN_RR7_Disabled
WDT_RREN_RR7_Enabled
WDT_RREN_RR7_Msk
WDT_RREN_RR7_Pos
WDT_RR_RR_Msk
WDT_RR_RR_Pos
WDT_RR_RR_Reload
WDT_RUNSTATUS_RUNSTATUS_Msk
WDT_RUNSTATUS_RUNSTATUS_NotRunning
WDT_RUNSTATUS_RUNSTATUS_Pos
WDT_RUNSTATUS_RUNSTATUS_Running
WDT_TASKS_START_TASKS_START_Msk
WDT_TASKS_START_TASKS_START_Pos
WDT_TASKS_START_TASKS_START_Trigger
WINT_MIN
W_OK
X_OK
ZTIMER_PERIODIC_KEEP_GOING
_ATEXIT_DYNAMIC_ALLOC
_ATEXIT_SIZE
_CLOCKS_PER_SEC_
_FAPPEND
_FASYNC
_FBINARY
_FCREAT
_FDEFER
_FDIRECT
_FDIRECTORY
_FEXCL
_FEXECSRCH
_FEXLOCK
_FMARK
_FNBIO
_FNDELAY
_FNOCTTY
_FNOFOLLOW
_FNOINHERIT
_FNONBLOCK
_FOPEN
_FREAD
_FSHLOCK
_FSYNC
_FTRUNC
_FWRITE
_HAVE_CC_INHIBIT_LOOP_TO_LIBCALL
_HAVE_LONG_DOUBLE
_IFBLK
_IFCHR
_IFDIR
_IFIFO
_IFLNK
_IFMT
_IFREG
_IFSOCK
_IOFBF
_IOLBF
_IONBF
_LDBL_EQ_DBL
_LIBC_LIMITS_H_
_LITE_EXIT
_MB_LEN_MAX
_NANO_FORMATTED_IO
_NEWLIB_VERSION
_NEWLIB_VERSION_H__
_NULL
_PC_2_SYMLINKS
_PC_ALLOC_SIZE_MIN
_PC_ASYNC_IO
_PC_CHOWN_RESTRICTED
_PC_FILESIZEBITS
_PC_LINK_MAX
_PC_MAX_CANON
_PC_MAX_INPUT
_PC_NAME_MAX
_PC_NO_TRUNC
_PC_PATH_MAX
_PC_PIPE_BUF
_PC_PRIO_IO
_PC_REC_INCR_XFER_SIZE
_PC_REC_MAX_XFER_SIZE
_PC_REC_MIN_XFER_SIZE
_PC_REC_XFER_ALIGN
_PC_SYMLINK_MAX
_PC_SYNC_IO
_PC_TIMESTAMP_RESOLUTION
_PC_VDISABLE
_POSIX2_RE_DUP_MAX
_RAND48_ADD
_RAND48_MULT_0
_RAND48_MULT_1
_RAND48_MULT_2
_RAND48_SEED_0
_RAND48_SEED_1
_RAND48_SEED_2
_REENT_ASCTIME_SIZE
_REENT_CHECK_VERIFY
_REENT_EMERGENCY_SIZE
_REENT_GLOBAL_ATEXIT
_REENT_SIGNAL_SIZE
_RETARGETABLE_LOCKING
_SC_2_CHAR_TERM
_SC_2_C_BIND
_SC_2_C_DEV
_SC_2_FORT_DEV
_SC_2_FORT_RUN
_SC_2_LOCALEDEF
_SC_2_PBS
_SC_2_PBS_ACCOUNTING
_SC_2_PBS_CHECKPOINT
_SC_2_PBS_LOCATE
_SC_2_PBS_MESSAGE
_SC_2_PBS_TRACK
_SC_2_SW_DEV
_SC_2_UPE
_SC_2_VERSION
_SC_ADVISORY_INFO
_SC_AIO_LISTIO_MAX
_SC_AIO_MAX
_SC_AIO_PRIO_DELTA_MAX
_SC_ARG_MAX
_SC_ASYNCHRONOUS_IO
_SC_ATEXIT_MAX
_SC_AVPHYS_PAGES
_SC_BARRIERS
_SC_BC_BASE_MAX
_SC_BC_DIM_MAX
_SC_BC_SCALE_MAX
_SC_BC_STRING_MAX
_SC_CHILD_MAX
_SC_CLK_TCK
_SC_CLOCK_SELECTION
_SC_COLL_WEIGHTS_MAX
_SC_CPUTIME
_SC_DELAYTIMER_MAX
_SC_EXPR_NEST_MAX
_SC_FSYNC
_SC_GETGR_R_SIZE_MAX
_SC_GETPW_R_SIZE_MAX
_SC_HOST_NAME_MAX
_SC_IOV_MAX
_SC_IPV6
_SC_JOB_CONTROL
_SC_LEVEL1_DCACHE_ASSOC
_SC_LEVEL1_DCACHE_LINESIZE
_SC_LEVEL1_DCACHE_SIZE
_SC_LEVEL1_ICACHE_ASSOC
_SC_LEVEL1_ICACHE_LINESIZE
_SC_LEVEL1_ICACHE_SIZE
_SC_LEVEL2_CACHE_ASSOC
_SC_LEVEL2_CACHE_LINESIZE
_SC_LEVEL2_CACHE_SIZE
_SC_LEVEL3_CACHE_ASSOC
_SC_LEVEL3_CACHE_LINESIZE
_SC_LEVEL3_CACHE_SIZE
_SC_LEVEL4_CACHE_ASSOC
_SC_LEVEL4_CACHE_LINESIZE
_SC_LEVEL4_CACHE_SIZE
_SC_LINE_MAX
_SC_LOGIN_NAME_MAX
_SC_MAPPED_FILES
_SC_MEMLOCK
_SC_MEMLOCK_RANGE
_SC_MEMORY_PROTECTION
_SC_MESSAGE_PASSING
_SC_MONOTONIC_CLOCK
_SC_MQ_OPEN_MAX
_SC_MQ_PRIO_MAX
_SC_NGROUPS_MAX
_SC_NPROCESSORS_CONF
_SC_NPROCESSORS_ONLN
_SC_OPEN_MAX
_SC_PAGESIZE
_SC_PAGE_SIZE
_SC_PHYS_PAGES
_SC_POSIX_26_VERSION
_SC_PRIORITIZED_IO
_SC_PRIORITY_SCHEDULING
_SC_RAW_SOCKETS
_SC_READER_WRITER_LOCKS
_SC_REALTIME_SIGNALS
_SC_REGEXP
_SC_RE_DUP_MAX
_SC_RTSIG_MAX
_SC_SAVED_IDS
_SC_SEMAPHORES
_SC_SEM_NSEMS_MAX
_SC_SEM_VALUE_MAX
_SC_SHARED_MEMORY_OBJECTS
_SC_SHELL
_SC_SIGQUEUE_MAX
_SC_SPAWN
_SC_SPIN_LOCKS
_SC_SPORADIC_SERVER
_SC_SS_REPL_MAX
_SC_STREAM_MAX
_SC_SYMLOOP_MAX
_SC_SYNCHRONIZED_IO
_SC_THREADS
_SC_THREAD_ATTR_STACKADDR
_SC_THREAD_ATTR_STACKSIZE
_SC_THREAD_CPUTIME
_SC_THREAD_DESTRUCTOR_ITERATIONS
_SC_THREAD_KEYS_MAX
_SC_THREAD_PRIORITY_SCHEDULING
_SC_THREAD_PRIO_CEILING
_SC_THREAD_PRIO_INHERIT
_SC_THREAD_PRIO_PROTECT
_SC_THREAD_PROCESS_SHARED
_SC_THREAD_ROBUST_PRIO_INHERIT
_SC_THREAD_ROBUST_PRIO_PROTECT
_SC_THREAD_SAFE_FUNCTIONS
_SC_THREAD_SPORADIC_SERVER
_SC_THREAD_STACK_MIN
_SC_THREAD_THREADS_MAX
_SC_TIMEOUTS
_SC_TIMERS
_SC_TIMER_MAX
_SC_TRACE
_SC_TRACE_EVENT_FILTER
_SC_TRACE_EVENT_NAME_MAX
_SC_TRACE_INHERIT
_SC_TRACE_LOG
_SC_TRACE_NAME_MAX
_SC_TRACE_SYS_MAX
_SC_TRACE_USER_EVENT_MAX
_SC_TTY_NAME_MAX
_SC_TYPED_MEMORY_OBJECTS
_SC_TZNAME_MAX
_SC_V6_ILP32_OFF32
_SC_V6_ILP32_OFFBIG
_SC_V6_LP64_OFF64
_SC_V6_LPBIG_OFFBIG
_SC_V7_ILP32_OFF32
_SC_V7_ILP32_OFFBIG
_SC_V7_LP64_OFF64
_SC_V7_LPBIG_OFFBIG
_SC_VERSION
_SC_XBS5_ILP32_OFF32
_SC_XBS5_ILP32_OFFBIG
_SC_XBS5_LP64_OFF64
_SC_XBS5_LPBIG_OFFBIG
_SC_XOPEN_CRYPT
_SC_XOPEN_ENH_I18N
_SC_XOPEN_LEGACY
_SC_XOPEN_REALTIME
_SC_XOPEN_REALTIME_THREADS
_SC_XOPEN_SHM
_SC_XOPEN_STREAMS
_SC_XOPEN_UNIX
_SC_XOPEN_UUCP
_SC_XOPEN_VERSION
_WANT_REENT_SMALL
__ATFILE_VISIBLE
__BIT_TYPES_DEFINED__
__BSD_VISIBLE
__CC_SUPPORTS_DYNAMIC_ARRAY_INIT
__CC_SUPPORTS_INLINE
__CC_SUPPORTS_VARADIC_XXX
__CC_SUPPORTS_WARNING
__CC_SUPPORTS___FUNC__
__CC_SUPPORTS___INLINE
__CC_SUPPORTS___INLINE__
__CM4_CMSIS_VERSION
__CM4_CMSIS_VERSION_MAIN
__CM4_CMSIS_VERSION_SUB
__CM4_REV
__CM_CMSIS_VERSION
__CM_CMSIS_VERSION_MAIN
__CM_CMSIS_VERSION_SUB
__CORTEX_M
__DSP_PRESENT
__ELASTERROR
__FAST16
__FAST64
__FAST8
__FPU_PRESENT
__FPU_USED
__GNUCLIKE_ASM
__GNUCLIKE_BUILTIN_CONSTANT_P
__GNUCLIKE_BUILTIN_MEMCPY
__GNUCLIKE_BUILTIN_NEXT_ARG
__GNUCLIKE_BUILTIN_STDARG
__GNUCLIKE_BUILTIN_VAALIST
__GNUCLIKE_BUILTIN_VARARGS
__GNUCLIKE_CTOR_SECTION_HANDLING
__GNUCLIKE___OFFSETOF
__GNUCLIKE___SECTION
__GNUCLIKE___TYPEOF
__GNUC_VA_LIST_COMPATIBILITY
__GNU_VISIBLE
__INT16
__INT64
__INT8
__ISO_C_VISIBLE
__LARGEFILE_VISIBLE
__LEAST16
__LEAST64
__LEAST8
__MISC_VISIBLE
__MPU_PRESENT
__NEWLIB_H__
__NEWLIB_MINOR__
__NEWLIB_PATCHLEVEL__
__NEWLIB__
__NVIC_PRIO_BITS
__OBSOLETE_MATH
__OBSOLETE_MATH_DEFAULT
__POSIX_VISIBLE
__RAND_MAX
__SAPP
__SEOF
__SERR
__SL64
__SLBF
__SMBF
__SNBF
__SNLK
__SNPT
__SOFF
__SOPT
__SORD
__SRD
__SRW
__SSP_FORTIFY_LEVEL
__SSTR
__SVID_VISIBLE
__SWID
__SWR
__VTOR_PRESENT
__Vendor_SysTickConfig
__XSI_VISIBLE
___int16_t_defined
___int32_t_defined
___int64_t_defined
___int8_t_defined
___int_least16_t_defined
___int_least32_t_defined
___int_least64_t_defined
___int_least8_t_defined
__bool_true_false_are_defined
__error_t_defined
__have_long32
__have_longlong64
__int16_t_defined
__int20
__int20__
__int32_t_defined
__int64_t_defined
__int8_t_defined
__int_fast16_t_defined
__int_fast32_t_defined
__int_fast64_t_defined
__int_fast8_t_defined
__int_least16_t_defined
__int_least32_t_defined
__int_least64_t_defined
__int_least8_t_defined
adc_res_t_ADC_RES_10BIT
adc_res_t_ADC_RES_12BIT
adc_res_t_ADC_RES_14BIT
adc_res_t_ADC_RES_16BIT
adc_res_t_ADC_RES_6BIT
adc_res_t_ADC_RES_8BIT
ble_error_codes_BLE_ERR_ACL_CONN_EXISTS
ble_error_codes_BLE_ERR_AUTH_FAIL
ble_error_codes_BLE_ERR_CHAN_CLASS
ble_error_codes_BLE_ERR_CMD_DISALLOWED
ble_error_codes_BLE_ERR_COARSE_CLK_ADJ
ble_error_codes_BLE_ERR_CONN_ACCEPT_TMO
ble_error_codes_BLE_ERR_CONN_ESTABLISHMENT
ble_error_codes_BLE_ERR_CONN_LIMIT
ble_error_codes_BLE_ERR_CONN_PARMS
ble_error_codes_BLE_ERR_CONN_REJ_BD_ADDR
ble_error_codes_BLE_ERR_CONN_REJ_CHANNEL
ble_error_codes_BLE_ERR_CONN_REJ_RESOURCES
ble_error_codes_BLE_ERR_CONN_REJ_SECURITY
ble_error_codes_BLE_ERR_CONN_SPVN_TMO
ble_error_codes_BLE_ERR_CONN_TERM_LOCAL
ble_error_codes_BLE_ERR_CONN_TERM_MIC
ble_error_codes_BLE_ERR_CTLR_BUSY
ble_error_codes_BLE_ERR_DIFF_TRANS_COLL
ble_error_codes_BLE_ERR_DIR_ADV_TMO
ble_error_codes_BLE_ERR_ENCRYPTION_MODE
ble_error_codes_BLE_ERR_HOST_BUSY_PAIR
ble_error_codes_BLE_ERR_HW_FAIL
ble_error_codes_BLE_ERR_INQ_RSP_TOO_BIG
ble_error_codes_BLE_ERR_INSTANT_PASSED
ble_error_codes_BLE_ERR_INSUFFICIENT_SEC
ble_error_codes_BLE_ERR_INV_HCI_CMD_PARMS
ble_error_codes_BLE_ERR_INV_LMP_LL_PARM
ble_error_codes_BLE_ERR_LIMIT_REACHED
ble_error_codes_BLE_ERR_LINK_KEY_CHANGE
ble_error_codes_BLE_ERR_LMP_COLLISION
ble_error_codes_BLE_ERR_LMP_LL_RSP_TMO
ble_error_codes_BLE_ERR_LMP_PDU
ble_error_codes_BLE_ERR_MAC_CONN_FAIL
ble_error_codes_BLE_ERR_MAX
ble_error_codes_BLE_ERR_MEM_CAPACITY
ble_error_codes_BLE_ERR_NO_PAIRING
ble_error_codes_BLE_ERR_NO_ROLE_CHANGE
ble_error_codes_BLE_ERR_OPERATION_CANCELLED
ble_error_codes_BLE_ERR_PACKET_TOO_LONG
ble_error_codes_BLE_ERR_PAGE_TMO
ble_error_codes_BLE_ERR_PARM_OUT_OF_RANGE
ble_error_codes_BLE_ERR_PENDING_ROLE_SW
ble_error_codes_BLE_ERR_PINKEY_MISSING
ble_error_codes_BLE_ERR_QOS_PARM
ble_error_codes_BLE_ERR_QOS_REJECTED
ble_error_codes_BLE_ERR_RD_CONN_TERM_PWROFF
ble_error_codes_BLE_ERR_RD_CONN_TERM_RESRCS
ble_error_codes_BLE_ERR_REM_USER_CONN_TERM
ble_error_codes_BLE_ERR_REPEATED_ATTEMPTS
ble_error_codes_BLE_ERR_RESERVED_SLOT
ble_error_codes_BLE_ERR_ROLE_SW_FAIL
ble_error_codes_BLE_ERR_SCO_AIR_MODE
ble_error_codes_BLE_ERR_SCO_ITVL
ble_error_codes_BLE_ERR_SCO_OFFSET
ble_error_codes_BLE_ERR_SEC_SIMPLE_PAIR
ble_error_codes_BLE_ERR_SUCCESS
ble_error_codes_BLE_ERR_SYNCH_CONN_LIMIT
ble_error_codes_BLE_ERR_TYPE0_SUBMAP_NDEF
ble_error_codes_BLE_ERR_UNIT_KEY_PAIRING
ble_error_codes_BLE_ERR_UNKNOWN_HCI_CMD
ble_error_codes_BLE_ERR_UNK_ADV_INDENT
ble_error_codes_BLE_ERR_UNK_CONN_ID
ble_error_codes_BLE_ERR_UNK_LMP
ble_error_codes_BLE_ERR_UNSPECIFIED
ble_error_codes_BLE_ERR_UNSUPPORTED
ble_error_codes_BLE_ERR_UNSUPP_LMP_LL_PARM
ble_error_codes_BLE_ERR_UNSUPP_QOS
ble_error_codes_BLE_ERR_UNSUPP_REM_FEATURE
ble_npl_error_BLE_NPL_BAD_MUTEX
ble_npl_error_BLE_NPL_EBUSY
ble_npl_error_BLE_NPL_EINVAL
ble_npl_error_BLE_NPL_ENOENT
ble_npl_error_BLE_NPL_ENOMEM
ble_npl_error_BLE_NPL_ERROR
ble_npl_error_BLE_NPL_ERR_IN_ISR
ble_npl_error_BLE_NPL_ERR_PRIV
ble_npl_error_BLE_NPL_INVALID_PARAM
ble_npl_error_BLE_NPL_MEM_NOT_ALIGNED
ble_npl_error_BLE_NPL_OK
ble_npl_error_BLE_NPL_OS_NOT_STARTED
ble_npl_error_BLE_NPL_TIMEOUT
coap_blksize_t_COAP_BLOCKSIZE_1024
coap_blksize_t_COAP_BLOCKSIZE_128
coap_blksize_t_COAP_BLOCKSIZE_16
coap_blksize_t_COAP_BLOCKSIZE_256
coap_blksize_t_COAP_BLOCKSIZE_32
coap_blksize_t_COAP_BLOCKSIZE_512
coap_blksize_t_COAP_BLOCKSIZE_64
coap_method_t_COAP_METHOD_DELETE
coap_method_t_COAP_METHOD_FETCH
coap_method_t_COAP_METHOD_GET
coap_method_t_COAP_METHOD_IPATCH
coap_method_t_COAP_METHOD_PATCH
coap_method_t_COAP_METHOD_POST
coap_method_t_COAP_METHOD_PUT
core_panic_t_PANIC_ASSERT_FAIL
core_panic_t_PANIC_BUS_FAULT
core_panic_t_PANIC_DEBUG_MON
core_panic_t_PANIC_DUMMY_HANDLER
core_panic_t_PANIC_EXPECT_FAIL
core_panic_t_PANIC_GENERAL_ERROR
core_panic_t_PANIC_HARD_FAULT
core_panic_t_PANIC_HARD_REBOOT
core_panic_t_PANIC_MEM_MANAGE
core_panic_t_PANIC_NMI_HANDLER
core_panic_t_PANIC_SOFT_REBOOT
core_panic_t_PANIC_SSP
core_panic_t_PANIC_STACK_OVERFLOW
core_panic_t_PANIC_UNDEFINED
core_panic_t_PANIC_USAGE_FAULT
cose_algo_t_COSE_ALGO_A128GCM
cose_algo_t_COSE_ALGO_A192GCM
cose_algo_t_COSE_ALGO_A256GCM
cose_algo_t_COSE_ALGO_AESCCM_16_128_128
cose_algo_t_COSE_ALGO_AESCCM_16_128_256
cose_algo_t_COSE_ALGO_AESCCM_16_64_128
cose_algo_t_COSE_ALGO_AESCCM_16_64_256
cose_algo_t_COSE_ALGO_AESCCM_64_128_128
cose_algo_t_COSE_ALGO_AESCCM_64_128_256
cose_algo_t_COSE_ALGO_AESCCM_64_64_128
cose_algo_t_COSE_ALGO_AESCCM_64_64_256
cose_algo_t_COSE_ALGO_CHACHA20POLY1305
cose_algo_t_COSE_ALGO_DIRECT
cose_algo_t_COSE_ALGO_EDDSA
cose_algo_t_COSE_ALGO_ES256
cose_algo_t_COSE_ALGO_ES384
cose_algo_t_COSE_ALGO_ES512
cose_algo_t_COSE_ALGO_HMAC256
cose_algo_t_COSE_ALGO_HSSLMS
cose_algo_t_COSE_ALGO_NONE
cose_cbor_tag_t_COSE_ENCRYPT
cose_cbor_tag_t_COSE_ENCRYPT0
cose_cbor_tag_t_COSE_MAC
cose_cbor_tag_t_COSE_MAC0
cose_cbor_tag_t_COSE_SIGN
cose_cbor_tag_t_COSE_SIGN1
cose_cbor_tag_t_COSE_UNKNOWN
cose_curve_t_COSE_EC_CURVE_ED25519
cose_curve_t_COSE_EC_CURVE_ED448
cose_curve_t_COSE_EC_CURVE_P256
cose_curve_t_COSE_EC_CURVE_P384
cose_curve_t_COSE_EC_CURVE_P521
cose_curve_t_COSE_EC_CURVE_X25519
cose_curve_t_COSE_EC_CURVE_X448
cose_curve_t_COSE_EC_NONE
cose_err_t_COSE_ERR_CBOR_NOTSUP
cose_err_t_COSE_ERR_CRYPTO
cose_err_t_COSE_ERR_INVALID_CBOR
cose_err_t_COSE_ERR_INVALID_PARAM
cose_err_t_COSE_ERR_NOINIT
cose_err_t_COSE_ERR_NOMEM
cose_err_t_COSE_ERR_NOTIMPLEMENTED
cose_err_t_COSE_ERR_NOT_FOUND
cose_err_t_COSE_OK
cose_hdr_type_t_COSE_HDR_TYPE_BSTR
cose_hdr_type_t_COSE_HDR_TYPE_CBOR
cose_hdr_type_t_COSE_HDR_TYPE_INT
cose_hdr_type_t_COSE_HDR_TYPE_TSTR
cose_hdr_type_t_COSE_HDR_TYPE_UNDEF
cose_header_param_t_COSE_HDR_ALG
cose_header_param_t_COSE_HDR_CONTENT_TYPE
cose_header_param_t_COSE_HDR_COUNTERSIG
cose_header_param_t_COSE_HDR_COUNTERSIG0
cose_header_param_t_COSE_HDR_CRIT
cose_header_param_t_COSE_HDR_IV
cose_header_param_t_COSE_HDR_KID
cose_header_param_t_COSE_HDR_PARTIALIV
cose_header_param_t_COSE_HDR_UNASSIGN
cose_key_param_t_COSE_KEY_PARAM_ALGO
cose_key_param_t_COSE_KEY_PARAM_BIV
cose_key_param_t_COSE_KEY_PARAM_KID
cose_key_param_t_COSE_KEY_PARAM_KTY
cose_key_param_t_COSE_KEY_PARAM_OPS
cose_kty_t_COSE_KTY_EC2
cose_kty_t_COSE_KTY_HSSLMS
cose_kty_t_COSE_KTY_OCTET
cose_kty_t_COSE_KTY_RSA
cose_kty_t_COSE_KTY_SYMM
false_
gcoap_socket_type_t_GCOAP_SOCKET_TYPE_DTLS
gcoap_socket_type_t_GCOAP_SOCKET_TYPE_UDP
gcoap_socket_type_t_GCOAP_SOCKET_TYPE_UNDEF
gnrc_ipv6_event_t_GNRC_IPV6_EVENT_ADDR_VALID
gnrc_netif_bus_t_GNRC_NETIF_BUS_IPV6
gnrc_netif_bus_t_GNRC_NETIF_BUS_NUMOF
gnrc_netreg_type_t_GNRC_NETREG_TYPE_CB
gnrc_netreg_type_t_GNRC_NETREG_TYPE_DEFAULT
gnrc_netreg_type_t_GNRC_NETREG_TYPE_MBOX
gnrc_nettype_t_GNRC_NETTYPE_ICMPV6
gnrc_nettype_t_GNRC_NETTYPE_IPV6
gnrc_nettype_t_GNRC_NETTYPE_NETIF
gnrc_nettype_t_GNRC_NETTYPE_NUMOF
gnrc_nettype_t_GNRC_NETTYPE_TCP
gnrc_nettype_t_GNRC_NETTYPE_TX_SYNC
gnrc_nettype_t_GNRC_NETTYPE_UDP
gnrc_nettype_t_GNRC_NETTYPE_UNDEF
gpio_drive_strength_t_GPIO_DRIVE_STRONG
gpio_drive_strength_t_GPIO_DRIVE_STRONGEST
gpio_drive_strength_t_GPIO_DRIVE_WEAK
gpio_drive_strength_t_GPIO_DRIVE_WEAKEST
gpio_flank_t_GPIO_BOTH
gpio_flank_t_GPIO_FALLING
gpio_flank_t_GPIO_RISING
gpio_irq_trig_t_GPIO_TRIGGER_EDGE_BOTH
gpio_irq_trig_t_GPIO_TRIGGER_EDGE_FALLING
gpio_irq_trig_t_GPIO_TRIGGER_EDGE_RISING
gpio_irq_trig_t_GPIO_TRIGGER_LEVEL_HIGH
gpio_irq_trig_t_GPIO_TRIGGER_LEVEL_LOW
gpio_mode_t_GPIO_IN
gpio_mode_t_GPIO_IN_OD_PU
gpio_mode_t_GPIO_IN_PD
gpio_mode_t_GPIO_IN_PU
gpio_mode_t_GPIO_OD
gpio_mode_t_GPIO_OD_PU
gpio_mode_t_GPIO_OUT
gpio_pull_strength_t_GPIO_PULL_STRONG
gpio_pull_strength_t_GPIO_PULL_STRONGEST
gpio_pull_strength_t_GPIO_PULL_WEAK
gpio_pull_strength_t_GPIO_PULL_WEAKEST
gpio_pull_t_GPIO_FLOATING
gpio_pull_t_GPIO_PULL_DOWN
gpio_pull_t_GPIO_PULL_KEEP
gpio_pull_t_GPIO_PULL_UP
gpio_slew_t_GPIO_SLEW_FAST
gpio_slew_t_GPIO_SLEW_FASTEST
gpio_slew_t_GPIO_SLEW_SLOW
gpio_slew_t_GPIO_SLEW_SLOWEST
gpio_state_t_GPIO_DISCONNECT
gpio_state_t_GPIO_INPUT
gpio_state_t_GPIO_OUTPUT_OPEN_DRAIN
gpio_state_t_GPIO_OUTPUT_OPEN_SOURCE
gpio_state_t_GPIO_OUTPUT_PUSH_PULL
gpio_state_t_GPIO_USED_BY_PERIPHERAL
i2c_flags_t_I2C_ADDR10
i2c_flags_t_I2C_NOSTART
i2c_flags_t_I2C_NOSTOP
i2c_flags_t_I2C_REG16
i2c_speed_t_I2C_SPEED_FAST
i2c_speed_t_I2C_SPEED_FAST_PLUS
i2c_speed_t_I2C_SPEED_HIGH
i2c_speed_t_I2C_SPEED_LOW
i2c_speed_t_I2C_SPEED_NORMAL
ieee802154_phy_mode_t_IEEE802154_PHY_ASK
ieee802154_phy_mode_t_IEEE802154_PHY_BPSK
ieee802154_phy_mode_t_IEEE802154_PHY_DISABLED
ieee802154_phy_mode_t_IEEE802154_PHY_MR_FSK
ieee802154_phy_mode_t_IEEE802154_PHY_MR_OFDM
ieee802154_phy_mode_t_IEEE802154_PHY_MR_OQPSK
ieee802154_phy_mode_t_IEEE802154_PHY_OQPSK
mtd_power_state_MTD_POWER_DOWN
mtd_power_state_MTD_POWER_UP
nanocbor_error_t_NANOCBOR_ERR_END
nanocbor_error_t_NANOCBOR_ERR_INVALID_TYPE
nanocbor_error_t_NANOCBOR_ERR_OVERFLOW
nanocbor_error_t_NANOCBOR_ERR_RECURSION
nanocbor_error_t_NANOCBOR_NOT_FOUND
nanocbor_error_t_NANOCBOR_OK
nanocoap_socket_type_t_COAP_SOCKET_TYPE_DTLS
nanocoap_socket_type_t_COAP_SOCKET_TYPE_UDP
netdev_event_t_NETDEV_EVENT_CAD_DONE
netdev_event_t_NETDEV_EVENT_CRC_ERROR
netdev_event_t_NETDEV_EVENT_FHSS_CHANGE_CHANNEL
netdev_event_t_NETDEV_EVENT_ISR
netdev_event_t_NETDEV_EVENT_LINK_DOWN
netdev_event_t_NETDEV_EVENT_LINK_UP
netdev_event_t_NETDEV_EVENT_RX_COMPLETE
netdev_event_t_NETDEV_EVENT_RX_STARTED
netdev_event_t_NETDEV_EVENT_RX_TIMEOUT
netdev_event_t_NETDEV_EVENT_TX_COMPLETE
netdev_event_t_NETDEV_EVENT_TX_STARTED
netdev_event_t_NETDEV_EVENT_TX_TIMEOUT
netdev_type_t_NETDEV_ANY
netdev_type_t_NETDEV_AT86RF215
netdev_type_t_NETDEV_AT86RF2XX
netdev_type_t_NETDEV_ATWINC15X0
netdev_type_t_NETDEV_CC110X
netdev_type_t_NETDEV_CC2420
netdev_type_t_NETDEV_CC2538
netdev_type_t_NETDEV_CDC_ECM
netdev_type_t_NETDEV_DOSE
netdev_type_t_NETDEV_ENC28J60
netdev_type_t_NETDEV_ENCX24J600
netdev_type_t_NETDEV_ESP_ETH
netdev_type_t_NETDEV_ESP_NOW
netdev_type_t_NETDEV_ESP_WIFI
netdev_type_t_NETDEV_ETHOS
netdev_type_t_NETDEV_KW2XRF
netdev_type_t_NETDEV_KW41ZRF
netdev_type_t_NETDEV_MRF24J40
netdev_type_t_NETDEV_NRF24L01P_NG
netdev_type_t_NETDEV_NRF802154
netdev_type_t_NETDEV_SAM0_ETH
netdev_type_t_NETDEV_SLIPDEV
netdev_type_t_NETDEV_SOCKET_ZEP
netdev_type_t_NETDEV_STM32_ETH
netdev_type_t_NETDEV_SX126X
netdev_type_t_NETDEV_SX127X
netdev_type_t_NETDEV_SX1280
netdev_type_t_NETDEV_TAP
netdev_type_t_NETDEV_TINYUSB
netdev_type_t_NETDEV_W5100
netdev_type_t_NETDEV_W5500
netopt_enable_t_NETOPT_DISABLE
netopt_enable_t_NETOPT_ENABLE
netopt_rf_testmode_t_NETOPT_RF_TESTMODE_CRX
netopt_rf_testmode_t_NETOPT_RF_TESTMODE_CTX_CW
netopt_rf_testmode_t_NETOPT_RF_TESTMODE_CTX_PRBS9
netopt_rf_testmode_t_NETOPT_RF_TESTMODE_IDLE
netopt_state_t_NETOPT_STATE_IDLE
netopt_state_t_NETOPT_STATE_OFF
netopt_state_t_NETOPT_STATE_RESET
netopt_state_t_NETOPT_STATE_RX
netopt_state_t_NETOPT_STATE_SLEEP
netopt_state_t_NETOPT_STATE_STANDBY
netopt_state_t_NETOPT_STATE_TX
netopt_t_NETOPT_6LO
netopt_t_NETOPT_6LO_IPHC
netopt_t_NETOPT_ACK_PENDING
netopt_t_NETOPT_ACK_REQ
netopt_t_NETOPT_ACTIVE
netopt_t_NETOPT_ADDRESS
netopt_t_NETOPT_ADDRESS_LONG
netopt_t_NETOPT_ADDR_LEN
netopt_t_NETOPT_AUTOACK
netopt_t_NETOPT_AUTOCCA
netopt_t_NETOPT_BANDWIDTH
netopt_t_NETOPT_BATMON
netopt_t_NETOPT_BLE_CTX
netopt_t_NETOPT_CCA_MODE
netopt_t_NETOPT_CCA_THRESHOLD
netopt_t_NETOPT_CHANNEL
netopt_t_NETOPT_CHANNEL_FREQUENCY
netopt_t_NETOPT_CHANNEL_HOP
netopt_t_NETOPT_CHANNEL_HOP_PERIOD
netopt_t_NETOPT_CHANNEL_PAGE
netopt_t_NETOPT_CHANNEL_SPACING
netopt_t_NETOPT_CHECKSUM
netopt_t_NETOPT_CODING_RATE
netopt_t_NETOPT_CONNECT
netopt_t_NETOPT_CSMA
netopt_t_NETOPT_CSMA_MAXBE
netopt_t_NETOPT_CSMA_MINBE
netopt_t_NETOPT_CSMA_RETRIES
netopt_t_NETOPT_DEMOD_MARGIN
netopt_t_NETOPT_DEVICE_TYPE
netopt_t_NETOPT_DISCONNECT
netopt_t_NETOPT_ENCRYPTION
netopt_t_NETOPT_ENCRYPTION_KEY
netopt_t_NETOPT_FIXED_HEADER
netopt_t_NETOPT_GTS_ALLOC
netopt_t_NETOPT_GTS_TX
netopt_t_NETOPT_HOP_LIMIT
netopt_t_NETOPT_IEEE802154_PHY
netopt_t_NETOPT_INTEGRITY_CHECK
netopt_t_NETOPT_IPV6_ADDR
netopt_t_NETOPT_IPV6_ADDR_FLAGS
netopt_t_NETOPT_IPV6_ADDR_REMOVE
netopt_t_NETOPT_IPV6_FORWARDING
netopt_t_NETOPT_IPV6_GROUP
netopt_t_NETOPT_IPV6_GROUP_LEAVE
netopt_t_NETOPT_IPV6_IID
netopt_t_NETOPT_IPV6_SND_RTR_ADV
netopt_t_NETOPT_IQ_INVERT
netopt_t_NETOPT_IS_CHANNEL_CLR
netopt_t_NETOPT_IS_WIRED
netopt_t_NETOPT_L2FILTER
netopt_t_NETOPT_L2FILTER_RM
netopt_t_NETOPT_L2_GROUP
netopt_t_NETOPT_L2_GROUP_LEAVE
netopt_t_NETOPT_LAST_ED_LEVEL
netopt_t_NETOPT_LINK
netopt_t_NETOPT_LINK_CHECK
netopt_t_NETOPT_LORAWAN_ADR
netopt_t_NETOPT_LORAWAN_APPEUI
netopt_t_NETOPT_LORAWAN_APPKEY
netopt_t_NETOPT_LORAWAN_APPSKEY
netopt_t_NETOPT_LORAWAN_DEVICE_CLASS
netopt_t_NETOPT_LORAWAN_DR
netopt_t_NETOPT_LORAWAN_FNWKSINTKEY
netopt_t_NETOPT_LORAWAN_JOINEUI
netopt_t_NETOPT_LORAWAN_MAX_RX_ERROR
netopt_t_NETOPT_LORAWAN_MIN_RX_SYMBOL
netopt_t_NETOPT_LORAWAN_NWKKEY
netopt_t_NETOPT_LORAWAN_NWKSENCKEY
netopt_t_NETOPT_LORAWAN_NWKSKEY
netopt_t_NETOPT_LORAWAN_PUBLIC_NETWORK
netopt_t_NETOPT_LORAWAN_RX2_DR
netopt_t_NETOPT_LORAWAN_RX2_FREQ
netopt_t_NETOPT_LORAWAN_SNWKSINTKEY
netopt_t_NETOPT_MAC_NO_SLEEP
netopt_t_NETOPT_MAX_PDU_SIZE
netopt_t_NETOPT_MR_FSK_FEC
netopt_t_NETOPT_MR_FSK_MODULATION_INDEX
netopt_t_NETOPT_MR_FSK_MODULATION_ORDER
netopt_t_NETOPT_MR_FSK_SRATE
netopt_t_NETOPT_MR_OFDM_MCS
netopt_t_NETOPT_MR_OFDM_OPTION
netopt_t_NETOPT_MR_OQPSK_CHIPS
netopt_t_NETOPT_MR_OQPSK_RATE
netopt_t_NETOPT_NID
netopt_t_NETOPT_NUMOF
netopt_t_NETOPT_NUM_GATEWAYS
netopt_t_NETOPT_OQPSK_RATE
netopt_t_NETOPT_OTAA
netopt_t_NETOPT_PAN_COORD
netopt_t_NETOPT_PDU_SIZE
netopt_t_NETOPT_PHY_BUSY
netopt_t_NETOPT_PREAMBLE_LENGTH
netopt_t_NETOPT_PRELOADING
netopt_t_NETOPT_PROMISCUOUSMODE
netopt_t_NETOPT_PROTO
netopt_t_NETOPT_RANDOM
netopt_t_NETOPT_RAWMODE
netopt_t_NETOPT_RETRANS
netopt_t_NETOPT_RF_TESTMODE
netopt_t_NETOPT_RSSI
netopt_t_NETOPT_RX_START_IRQ
netopt_t_NETOPT_RX_SYMBOL_TIMEOUT
netopt_t_NETOPT_RX_TIMEOUT
netopt_t_NETOPT_SCAN
netopt_t_NETOPT_SINGLE_RECEIVE
netopt_t_NETOPT_SPREADING_FACTOR
netopt_t_NETOPT_SRC_LEN
netopt_t_NETOPT_STATE
netopt_t_NETOPT_STATS
netopt_t_NETOPT_SYNCWORD
netopt_t_NETOPT_TX_END_IRQ
netopt_t_NETOPT_TX_POWER
netopt_t_NETOPT_TX_RETRIES_NEEDED
netopt_t_NETOPT_TX_START_IRQ
netopt_t_NETOPT_TX_TIMEOUT
os_error_OS_BAD_MUTEX
os_error_OS_EBUSY
os_error_OS_EINVAL
os_error_OS_ENOENT
os_error_OS_ENOMEM
os_error_OS_ERROR
os_error_OS_ERR_IN_ISR
os_error_OS_ERR_PRIV
os_error_OS_INVALID_PARM
os_error_OS_MEM_NOT_ALIGNED
os_error_OS_NOT_STARTED
os_error_OS_OK
os_error_OS_TIMEOUT
pwm_mode_t_PWM_CENTER
pwm_mode_t_PWM_CENTER_INV
pwm_mode_t_PWM_LEFT
pwm_mode_t_PWM_RIGHT
sema_state_t_SEMA_DESTROY
sema_state_t_SEMA_OK
sock_async_flags_t_SOCK_ASYNC_CONN_FIN
sock_async_flags_t_SOCK_ASYNC_CONN_RDY
sock_async_flags_t_SOCK_ASYNC_CONN_RECV
sock_async_flags_t_SOCK_ASYNC_MSG_RECV
sock_async_flags_t_SOCK_ASYNC_MSG_SENT
sock_async_flags_t_SOCK_ASYNC_PATH_PROP
spi_clk_t_SPI_CLK_100KHZ
spi_clk_t_SPI_CLK_10MHZ
spi_clk_t_SPI_CLK_1MHZ
spi_clk_t_SPI_CLK_400KHZ
spi_clk_t_SPI_CLK_5MHZ
spi_mode_t_SPI_MODE_0
spi_mode_t_SPI_MODE_1
spi_mode_t_SPI_MODE_2
spi_mode_t_SPI_MODE_3
suit_digest_t_SUIT_DIGEST_NONE
suit_digest_t_SUIT_DIGEST_SHA256
suit_digest_t_SUIT_DIGEST_SHA384
suit_digest_t_SUIT_DIGEST_SHA512
suit_digest_type_t_SUIT_DIGEST_TYPE_CIPHERTEXT
suit_digest_type_t_SUIT_DIGEST_TYPE_INSTALLED
suit_digest_type_t_SUIT_DIGEST_TYPE_PREIMAGE
suit_digest_type_t_SUIT_DIGEST_TYPE_RAW
suit_error_t_SUIT_ERR_COND
suit_error_t_SUIT_ERR_DIGEST_MISMATCH
suit_error_t_SUIT_ERR_INVALID_MANIFEST
suit_error_t_SUIT_ERR_NOT_SUPPORTED
suit_error_t_SUIT_ERR_NO_MEM
suit_error_t_SUIT_ERR_POLICY_FORBIDDEN
suit_error_t_SUIT_ERR_SEQUENCE_NUMBER
suit_error_t_SUIT_ERR_SIGNATURE
suit_error_t_SUIT_ERR_STORAGE
suit_error_t_SUIT_ERR_STORAGE_EXCEEDED
suit_error_t_SUIT_ERR_STORAGE_UNAVAILABLE
suit_error_t_SUIT_ERR_UNSUPPORTED
suit_error_t_SUIT_OK
suit_parameter_t_SUIT_PARAMETER_CLASS_IDENTIFIER
suit_parameter_t_SUIT_PARAMETER_COMPONENT_OFFSET
suit_parameter_t_SUIT_PARAMETER_COMPRESSION_INFO
suit_parameter_t_SUIT_PARAMETER_DEVICE_IDENTIFIER
suit_parameter_t_SUIT_PARAMETER_ENCRYPTION_INFO
suit_parameter_t_SUIT_PARAMETER_IMAGE_DIGEST
suit_parameter_t_SUIT_PARAMETER_IMAGE_SIZE
suit_parameter_t_SUIT_PARAMETER_MINIMUM_BATTERY
suit_parameter_t_SUIT_PARAMETER_RUN_ARGS
suit_parameter_t_SUIT_PARAMETER_SOFT_FAILURE
suit_parameter_t_SUIT_PARAMETER_SOURCE_COMPONENT
suit_parameter_t_SUIT_PARAMETER_STRICT_ORDER
suit_parameter_t_SUIT_PARAMETER_UNPACK_INFO
suit_parameter_t_SUIT_PARAMETER_UPDATE_PRIORITY
suit_parameter_t_SUIT_PARAMETER_URI
suit_parameter_t_SUIT_PARAMETER_URI_LIST
suit_parameter_t_SUIT_PARAMETER_USE_BEFORE
suit_parameter_t_SUIT_PARAMETER_VENDOR_IDENTIFIER
suit_parameter_t_SUIT_PARAMETER_VERSION
suit_parameter_t_SUIT_PARAMETER_WAIT_INFO
thread_status_t_STATUS_COND_BLOCKED
thread_status_t_STATUS_FLAG_BLOCKED_ALL
thread_status_t_STATUS_FLAG_BLOCKED_ANY
thread_status_t_STATUS_MBOX_BLOCKED
thread_status_t_STATUS_MUTEX_BLOCKED
thread_status_t_STATUS_NUMOF
thread_status_t_STATUS_PENDING
thread_status_t_STATUS_RECEIVE_BLOCKED
thread_status_t_STATUS_REPLY_BLOCKED
thread_status_t_STATUS_RUNNING
thread_status_t_STATUS_SEND_BLOCKED
thread_status_t_STATUS_SLEEPING
thread_status_t_STATUS_STOPPED
thread_status_t_STATUS_ZOMBIE
true_
uart_data_bits_t_UART_DATA_BITS_5
uart_data_bits_t_UART_DATA_BITS_6
uart_data_bits_t_UART_DATA_BITS_7
uart_data_bits_t_UART_DATA_BITS_8
uart_parity_t_UART_PARITY_EVEN
uart_parity_t_UART_PARITY_MARK
uart_parity_t_UART_PARITY_NONE
uart_parity_t_UART_PARITY_ODD
uart_parity_t_UART_PARITY_SPACE
uart_stop_bits_t_UART_STOP_BITS_1
uart_stop_bits_t_UART_STOP_BITS_2
unix_af_t_AF_INET
unix_af_t_AF_INET6
unix_af_t_AF_NUMOF
unix_af_t_AF_PACKET
unix_af_t_AF_UNIX
unix_af_t_AF_UNSPEC
xPSR_C_Msk
xPSR_C_Pos
xPSR_GE_Msk
xPSR_GE_Pos
xPSR_ICI_IT_1_Msk
xPSR_ICI_IT_1_Pos
xPSR_ICI_IT_2_Msk
xPSR_ICI_IT_2_Pos
xPSR_ISR_Msk
xPSR_ISR_Pos
xPSR_N_Msk
xPSR_N_Pos
xPSR_Q_Msk
xPSR_Q_Pos
xPSR_T_Msk
xPSR_T_Pos
xPSR_V_Msk
xPSR_V_Pos
xPSR_Z_Msk
xPSR_Z_Pos
Statics
CIPHER_AES
ITM_RxBuffer
SIG_TYPE_COUNTERSIGNATURE
SIG_TYPE_SIGNATURE
SIG_TYPE_SIGNATURE1
ZTIMER_MSEC
ZTIMER_MSEC_BASE
ZTIMER_SEC
ZTIMER_USEC
ZTIMER_USEC_BASE
__sf_fake_stderr
__sf_fake_stdin
__sf_fake_stdout
_global_atexit
_global_impure_ptr
_impure_ptr
_sys_errlist
_sys_nerr
bitarithm_MultiplyDeBruijnBitPosition
ble_hs_cfg
coap_resources
coap_resources_numof
environ
g_dev_addr
g_log_info
g_random_addr
gnrc_ipv6_pid
i2c_config
ieee802154_addr_bcast
ipv6_addr_all_nodes_if_local
ipv6_addr_all_nodes_link_local
ipv6_addr_all_routers_if_local
ipv6_addr_all_routers_link_local
ipv6_addr_all_routers_site_local
ipv6_addr_link_local_prefix
ipv6_addr_loopback
ipv6_addr_solicited_node_prefix
ipv6_addr_unspecified
mtd_dev_xfa
mtd_dev_xfa_end
mtd_vfs_ops
optarg
opterr
optind
optopt
optreset
pwm_config
saul_reg
sched_context_switch_request
sched_num_threads
sched_runqueues
sched_threads
spi_config
stdin_isrpipe
timer_config
uart_config
uuid_namespace_dns
uuid_namespace_iso
uuid_namespace_url
uuid_namespace_x500
Functions
Keccak_final
Keccak_init
Keccak_update
_Exit
__eprintf
__errno
__getdelim
__getline
__itoa
__locale_mb_cur_max
__retarget_lock_acquire
__retarget_lock_acquire_recursive
__retarget_lock_close
__retarget_lock_close_recursive
__retarget_lock_init
__retarget_lock_init_recursive
__retarget_lock_release
__retarget_lock_release_recursive
__retarget_lock_try_acquire
__retarget_lock_try_acquire_recursive
__sinit
__srget_r
__swbuf_r
__utoa
_asiprintf_r
_asniprintf_r
_asnprintf_r
_asprintf_r
_assert_panic
_atoi_r
_atol_r
_atoll_r
_calloc_r
_clist_sort
_diprintf_r
_dprintf_r
_dtoa_r
_event_callback_handler
_exit
_fclose_r
_fcloseall_r
_fdopen_r
_fflush_r
_fgetc_r
_fgetc_unlocked_r
_fgetpos_r
_fgets_r
_fgets_unlocked_r
_findenv
_findenv_r
_fiprintf_r
_fiscanf_r
_fmemopen_r
_fopen_r
_fprintf_r
_fpurge_r
_fputc_r
_fputc_unlocked_r
_fputs_r
_fputs_unlocked_r
_fread_r
_fread_unlocked_r
_free_r
_freopen_r
_fscanf_r
_fseek_r
_fseeko_r
_fsetpos_r
_ftell_r
_ftello_r
_fwrite_r
_fwrite_unlocked_r
_getc_r
_getc_unlocked_r
_getchar_r
_getchar_unlocked_r
_getenv_r
_gets_r
_gnrc_netapi_get_set
_gnrc_netapi_send_recv
_iprintf_r
_iscanf_r
_malloc_r
_mblen_r
_mbox_get
_mbox_put
_mbstowcs_r
_mbtowc_r
_mkdtemp_r
_mkostemp_r
_mkostemps_r
_mkstemp_r
_mkstemps_r
_mktemp_r
_mstats_r
_open_memstream_r
_perror_r
_printf_r
_putc_r
_putc_unlocked_r
_putchar_r
_putchar_unlocked_r
_putenv_r
_puts_r
_realloc_r
_reallocf_r
_reclaim_reent
_remove_r
_rename_r
_rewind_r
_scanf_r
_sema_wait_ztimer
_setenv_r
_siprintf_r
_siscanf_r
_sniprintf_r
_snprintf_r
_sprintf_r
_sscanf_r
_strdup_r
_strerror_r
_strndup_r
_strtod_r
_strtoimax_r
_strtol_r
_strtold_r
_strtoll_r
_strtoul_r
_strtoull_r
_strtoumax_r
_system_r
_tempnam_r
_tmpfile_r
_tmpnam_r
_tzset_r
_ungetc_r
_unsetenv_r
_vasiprintf_r
_vasniprintf_r
_vasnprintf_r
_vasprintf_r
_vdiprintf_r
_vdprintf_r
_vfiprintf_r
_vfiscanf_r
_vfprintf_r
_vfscanf_r
_viprintf_r
_viscanf_r
_vprintf_r
_vscanf_r
_vsiprintf_r
_vsiscanf_r
_vsniprintf_r
_vsnprintf_r
_vsprintf_r
_vsscanf_r
_wcstoimax_r
_wcstombs_r
_wcstoumax_r
_wctomb_r
_ztimer_assert_clock_active
_ztimer_now_extend
abort
abs
access
adc_continuous_begin
adc_continuous_sample
adc_continuous_stop
adc_init
adc_sample
aes128_cmac_final
aes128_cmac_init
aes128_cmac_update
alarm
aligned_alloc
asctime
asctime_r
at_quick_exit
atexit
atof
atoi
atol
atoll
bf_clear_all
bf_find_first_set
bf_find_first_unset
bf_get_unset
bf_popcnt
bf_set_all
bitarith_msb_32bit_no_native_clz
bitarithm_bits_set
ble_att_mtu
ble_att_preferred_mtu
ble_att_set_preferred_mtu
ble_att_svr_read_local
ble_att_svr_write_local
ble_eddystone_set_adv_data_uid
ble_eddystone_set_adv_data_url
ble_gap_adv_active
ble_gap_adv_rsp_set_data
ble_gap_adv_rsp_set_fields
ble_gap_adv_set_data
ble_gap_adv_set_fields
ble_gap_adv_start
ble_gap_adv_stop
ble_gap_conn_active
ble_gap_conn_cancel
ble_gap_conn_find
ble_gap_conn_find_by_addr
ble_gap_conn_rssi
ble_gap_connect
ble_gap_disc
ble_gap_disc_active
ble_gap_disc_cancel
ble_gap_encryption_initiate
ble_gap_event_listener_register
ble_gap_event_listener_unregister
ble_gap_ext_connect
ble_gap_ext_disc
ble_gap_pair_initiate
ble_gap_read_le_phy
ble_gap_security_initiate
ble_gap_set_data_len
ble_gap_set_event_cb
ble_gap_set_prefered_default_le_phy
ble_gap_set_prefered_le_phy
ble_gap_set_priv_mode
ble_gap_terminate
ble_gap_unpair
ble_gap_unpair_oldest_except
ble_gap_unpair_oldest_peer
ble_gap_update_params
ble_gap_wl_set
ble_gattc_disc_all_chrs
ble_gattc_disc_all_dscs
ble_gattc_disc_all_svcs
ble_gattc_disc_chrs_by_uuid
ble_gattc_disc_svc_by_uuid
ble_gattc_exchange_mtu
ble_gattc_find_inc_svcs
ble_gattc_indicate
ble_gattc_indicate_custom
ble_gattc_init
ble_gattc_notify
ble_gattc_notify_custom
ble_gattc_read
ble_gattc_read_by_uuid
ble_gattc_read_long
ble_gattc_read_mult
ble_gattc_write
ble_gattc_write_flat
ble_gattc_write_long
ble_gattc_write_no_rsp
ble_gattc_write_no_rsp_flat
ble_gattc_write_reliable
ble_gatts_add_svcs
ble_gatts_chr_updated
ble_gatts_count_cfg
ble_gatts_find_chr
ble_gatts_find_dsc
ble_gatts_find_svc
ble_gatts_indicate
ble_gatts_indicate_custom
ble_gatts_notify
ble_gatts_notify_custom
ble_gatts_reset
ble_gatts_show_local
ble_gatts_start
ble_gatts_svc_set_visibility
ble_hs_adv_parse
ble_hs_adv_parse_fields
ble_hs_adv_set_fields
ble_hs_adv_set_fields_mbuf
ble_hs_evq_set
ble_hs_hci_read_chan_map
ble_hs_hci_set_chan_class
ble_hs_id_copy_addr
ble_hs_id_gen_rnd
ble_hs_id_infer_auto
ble_hs_id_set_rnd
ble_hs_init
ble_hs_is_enabled
ble_hs_log_flat_buf
ble_hs_log_mbuf
ble_hs_mbuf_att_pkt
ble_hs_mbuf_from_flat
ble_hs_mbuf_to_flat
ble_hs_sched_reset
ble_hs_sched_start
ble_hs_shutdown
ble_hs_start
ble_hs_stop
ble_hs_synced
ble_ibeacon_set_adv_data
ble_l2cap_connect
ble_l2cap_create_server
ble_l2cap_disconnect
ble_l2cap_get_chan_info
ble_l2cap_get_conn_handle
ble_l2cap_recv_ready
ble_l2cap_send
ble_l2cap_sig_update
ble_npl_callout_init
ble_npl_callout_remaining_ticks
ble_npl_callout_reset
ble_npl_eventq_is_empty
ble_npl_hw_set_isr
ble_npl_sem_pend
ble_sm_sc_oob_generate_data
ble_store_clear
ble_store_delete
ble_store_delete_cccd
ble_store_delete_our_sec
ble_store_delete_peer_sec
ble_store_full_event
ble_store_iterate
ble_store_key_from_value
ble_store_key_from_value_cccd
ble_store_key_from_value_sec
ble_store_overflow_event
ble_store_read
ble_store_read_cccd
ble_store_read_our_sec
ble_store_read_peer_sec
ble_store_util_bonded_peers
ble_store_util_count
ble_store_util_delete_all
ble_store_util_delete_oldest_peer
ble_store_util_delete_peer
ble_store_util_status_rr
ble_store_write
ble_store_write_cccd
ble_store_write_our_sec
ble_store_write_peer_sec
ble_transport_alloc_acl_from_hs
ble_transport_alloc_acl_from_ll
ble_transport_alloc_cmd
ble_transport_alloc_evt
ble_transport_free
ble_transport_hs_init
ble_transport_init
ble_transport_ll_init
ble_transport_register_put_acl_from_ll_cb
ble_transport_to_hs_acl_impl
ble_transport_to_hs_evt_impl
ble_transport_to_ll_acl_impl
ble_transport_to_ll_cmd_impl
ble_uuid_cmp
ble_uuid_copy
ble_uuid_init_from_buf
ble_uuid_to_str
ble_uuid_u16
bluetil_ad_add
bluetil_ad_find
bluetil_ad_find_and_cmp
bluetil_ad_find_str
bluetil_ad_init
bsearch
calloc
chdir
chmod
chown
cipher_decrypt
cipher_encrypt
cipher_get_block_size
cipher_init
clearerr
clock
clock_hfxo_release
clock_hfxo_request
clock_init_hf
clock_start_lf
clock_stop_lf
close
coap_block2_build_reply
coap_block2_init
coap_block_finish
coap_block_object_init
coap_block_slicer_init
coap_blockwise_put_bytes
coap_blockwise_put_char
coap_build_empty_ack
coap_build_hdr
coap_build_reply
coap_build_reply_header
coap_find_option
coap_find_uri_query
coap_get_accept
coap_get_block
coap_get_blockopt
coap_get_content_type
coap_handle_req
coap_has_unprocessed_critical_options
coap_iterate_option
coap_match_path
coap_opt_add_block
coap_opt_add_chars
coap_opt_add_opaque
coap_opt_add_proxy_uri
coap_opt_add_uint
coap_opt_add_uri_query2
coap_opt_finish
coap_opt_get_next
coap_opt_get_opaque
coap_opt_get_string
coap_opt_get_uint
coap_opt_put_block
coap_opt_put_string_with_len
coap_opt_put_uint
coap_opt_put_uri_pathquery
coap_opt_remove
coap_parse
coap_payload_put_bytes
coap_payload_put_char
coap_pkt_init
coap_put_block1_ok
coap_put_option
coap_reply_simple
coap_request_ctx_get_context
coap_request_ctx_get_local_udp
coap_request_ctx_get_path
coap_request_ctx_get_remote_udp
coap_request_ctx_get_tl_type
coap_request_ctx_init
coap_subtree_handler
coap_tree_handler
coap_well_known_core_default_handler
core_panic
cortexm_init
cose_cbor_decode_get_pos
cose_cbor_decode_get_prot
cose_cbor_decode_get_unprot
cose_hdr_decode_from_cbor
cose_hdr_encode_to_map
cose_hdr_format_data
cose_hdr_format_int
cose_hdr_format_string
cose_hdr_get
cose_hdr_get_protected
cose_hdr_get_unprotected
cose_hdr_insert
cose_hdr_size
cose_key_from_cbor
cose_key_init
cose_key_protected_to_map
cose_key_set_keys
cose_key_set_kid
cose_key_unprotected_to_map
cose_sign_add_signer
cose_sign_decode
cose_sign_decode_header
cose_sign_decode_payload
cose_sign_decode_protected
cose_sign_decode_set_external_aad
cose_sign_decode_set_payload
cose_sign_decode_unprotected
cose_sign_encode
cose_sign_init
cose_sign_set_external_aad
cose_sign_set_payload
cose_sign_signature_iter
cose_sign_verify
cose_sign_verify_buffer_required
cose_sign_verify_first
cose_signature_decode_init
cose_signature_decode_kid
cose_signature_decode_protected
cose_signature_decode_signature
cose_signature_decode_unprotected
cose_signature_get_header
cose_signature_get_protected
cose_signature_get_unprotected
cose_signature_num
cose_signature_serialize_protected
cose_signature_unprot_cbor
cose_signature_unprot_to_map
cpu_check_address
cpu_switch_context_exit
cpuid_get
creat
ctime
ctime_r
debug_irq_disable_print
dek_hash
dhcpv6_client_check_ia_na
dhcpv6_client_conf_prefix
dhcpv6_client_get_conf_mode
dhcpv6_client_get_duid_l2
dhcpv6_client_init
dhcpv6_client_prefix_valid_until
dhcpv6_client_req_ia_na
dhcpv6_client_req_ia_pd
dhcpv6_client_set_conf_mode
dhcpv6_client_start
difftime
div
djb2_hash
dup
dup2
event_callback_init
event_cancel
event_get
event_is_queued
event_post
event_sync
event_timeout_clear
event_timeout_set
event_timeout_ztimer_init
event_wait_multi
event_wait_timeout_ztimer
evtimer_add
evtimer_del
evtimer_init
evtimer_print
execl
execle
execlp
execv
execve
execvp
exit
fchmod
fclose
fcntl
feof
ferror
fflush
fgetc
fgetpos
fgets
fnv_hash
fopen
fork
fpathconf
fprintf
fpurge
fputc
fputs
fread
free
freopen
fscanf
fseek
fsetpos
fstat
fsync
ftell
fwrite
gcoap_encode_link
gcoap_get_resource_by_path_iterator
gcoap_get_resource_list
gcoap_init
gcoap_obs_init
gcoap_obs_req_forget
gcoap_obs_send
gcoap_op_state
gcoap_register_listener
gcoap_req_init_path_buffer
gcoap_req_send
gcoap_resp_init
get_be16
get_be24
get_be32
get_be64
get_le16
get_le24
get_le32
get_le64
getc
getchar
getcwd
getdtablesize
getegid
getenv
geteuid
getgid
getgroups
getlogin
getopt
getpgrp
getpid
getppid
gets
getuid
gmtime
gmtime_r
gnrc_icmpv6_build
gnrc_icmpv6_calc_csum
gnrc_icmpv6_demux
gnrc_icmpv6_echo_build
gnrc_icmpv6_echo_req_handle
gnrc_icmpv6_echo_rsp_handle
gnrc_icmpv6_echo_send
gnrc_ipv6_ext_build
gnrc_ipv6_get_header
gnrc_ipv6_hdr_build
gnrc_ipv6_init
gnrc_ipv6_nib_ft_add
gnrc_ipv6_nib_ft_del
gnrc_ipv6_nib_ft_get
gnrc_ipv6_nib_ft_iter
gnrc_ipv6_nib_ft_print
gnrc_ipv6_nib_get_next_hop_l2addr
gnrc_ipv6_nib_handle_pkt
gnrc_ipv6_nib_handle_timer_event
gnrc_ipv6_nib_iface_down
gnrc_ipv6_nib_iface_up
gnrc_ipv6_nib_init
gnrc_ipv6_nib_init_iface
gnrc_ipv6_nib_nc_del
gnrc_ipv6_nib_nc_iter
gnrc_ipv6_nib_nc_mark_reachable
gnrc_ipv6_nib_nc_print
gnrc_ipv6_nib_nc_set
gnrc_ipv6_nib_pl_del
gnrc_ipv6_nib_pl_iter
gnrc_ipv6_nib_pl_print
gnrc_ipv6_nib_pl_set
gnrc_netapi_dispatch
gnrc_netif_acquire
gnrc_netif_create
gnrc_netif_default_init
gnrc_netif_dev_is_6lo
gnrc_netif_eui64_from_addr
gnrc_netif_get_by_ipv6_addr
gnrc_netif_get_by_pid
gnrc_netif_get_by_prefix
gnrc_netif_get_by_type
gnrc_netif_get_from_netdev
gnrc_netif_get_l2addr_opt
gnrc_netif_hdr_build
gnrc_netif_hdr_get_dstaddr
gnrc_netif_hdr_get_flag
gnrc_netif_hdr_get_srcaddr
gnrc_netif_hdr_print
gnrc_netif_init_6ln
gnrc_netif_init_devs
gnrc_netif_ipv6_add_prefix
gnrc_netif_ipv6_addr_add_internal
gnrc_netif_ipv6_addr_best_src
gnrc_netif_ipv6_addr_idx
gnrc_netif_ipv6_addr_match
gnrc_netif_ipv6_addr_remove_internal
gnrc_netif_ipv6_group_idx
gnrc_netif_ipv6_group_join_internal
gnrc_netif_ipv6_group_leave_internal
gnrc_netif_ipv6_iid_from_addr
gnrc_netif_ipv6_init_mtu
gnrc_netif_iter
gnrc_netif_numof
gnrc_netif_release
gnrc_netif_set_from_netdev
gnrc_netreg_acquire_shared
gnrc_netreg_calc_csum
gnrc_netreg_getnext
gnrc_netreg_init
gnrc_netreg_lookup
gnrc_netreg_num
gnrc_netreg_register
gnrc_netreg_release_shared
gnrc_netreg_unregister
gnrc_pktbuf_add
gnrc_pktbuf_hold
gnrc_pktbuf_init
gnrc_pktbuf_mark
gnrc_pktbuf_merge
gnrc_pktbuf_realloc_data
gnrc_pktbuf_release_error
gnrc_pktbuf_remove_snip
gnrc_pktbuf_reverse_snips
gnrc_pktbuf_start_write
gnrc_pktbuf_stats
gnrc_pktsnip_search_type
gnrc_tcp_abort
gnrc_tcp_accept
gnrc_tcp_calc_csum
gnrc_tcp_close
gnrc_tcp_ep_from_str
gnrc_tcp_ep_init
gnrc_tcp_get_local
gnrc_tcp_get_remote
gnrc_tcp_hdr_build
gnrc_tcp_init
gnrc_tcp_listen
gnrc_tcp_open
gnrc_tcp_queue_get_local
gnrc_tcp_recv
gnrc_tcp_send
gnrc_tcp_stop_listen
gnrc_tcp_tcb_init
gnrc_tcp_tcb_queue_init
gnrc_udp_calc_csum
gnrc_udp_hdr_build
gnrc_udp_init
gpio_clear
gpio_init
gpio_int_get_exti
gpio_read
gpio_set
gpio_toggle
gpio_util_shiftin
gpio_write
hmac_sha256
hmac_sha256_final
hmac_sha256_init
hmac_sha256_update
hwrng_init
hwrng_read
i2c_acquire
i2c_deinit_pins
i2c_init
i2c_init_pins
i2c_read_byte
i2c_read_bytes
i2c_read_reg
i2c_read_regs
i2c_release
i2c_write_byte
i2c_write_bytes
i2c_write_reg
i2c_write_regs
icmpv6_hdr_print
ieee802154_dst_filter
ieee802154_get_dst
ieee802154_get_frame_hdr_len
ieee802154_get_src
ieee802154_set_frame_hdr
imaxabs
imaxdiv
inet_csum_slice
iolist_count
iolist_size
iolist_to_buffer
iolist_to_iovec
ipv4_addr_from_buf
ipv4_addr_from_str
ipv4_addr_print
ipv4_addr_to_str
ipv6_addr_equal
ipv6_addr_from_buf
ipv6_addr_from_str
ipv6_addr_init_iid
ipv6_addr_init_prefix
ipv6_addr_match_prefix
ipv6_addr_print
ipv6_addr_split_int
ipv6_addr_split_str
ipv6_addr_to_str
ipv6_addrs_print
ipv6_hdr_print
ipv6_prefix_from_str
isatty
isrpipe_init
isrpipe_read
isrpipe_write
isrpipe_write_one
kr_hash
l2util_addr_from_str
l2util_addr_to_str
l2util_eui64_from_addr
l2util_ipv6_group_to_l2_group
l2util_ipv6_iid_from_addr
l2util_ipv6_iid_to_addr
l2util_ndp_addr_len_from_l2ao
labs
ldiv
link
llabs
lldiv
localtime
localtime_r
lseek
malloc
mblen
mbstowcs
mbtowc
md5
md5_final
md5_init
md5_update
measure_stack_free_internal
memchr
memcmp
memcpy
memmove
memset
mkdir
mkfifo
mktime
msg_avail
msg_avail_thread
msg_init_queue
msg_queue_capacity
msg_queue_print
msg_receive
msg_reply
msg_reply_int
msg_send
msg_send_int
msg_send_receive
msg_send_to_self
msg_try_receive
msg_try_send
mtd_erase
mtd_erase_sector
mtd_init
mtd_power
mtd_read
mtd_read_page
mtd_write
mtd_write_page
mtd_write_page_raw
mtd_write_sector
mutex_cancel
mutex_lock_cancelable
mutex_lock_internal
mutex_unlock
mutex_unlock_and_sleep
nanocbor_at_end
nanocbor_decoder_init
nanocbor_encoded_len
nanocbor_encoder_init
nanocbor_encoder_stream_init
nanocbor_enter_array
nanocbor_enter_map
nanocbor_fmt_array
nanocbor_fmt_array_indefinite
nanocbor_fmt_bool
nanocbor_fmt_bstr
nanocbor_fmt_decimal_frac
nanocbor_fmt_double
nanocbor_fmt_end_indefinite
nanocbor_fmt_float
nanocbor_fmt_int
nanocbor_fmt_map
nanocbor_fmt_map_indefinite
nanocbor_fmt_null
nanocbor_fmt_tag
nanocbor_fmt_tstr
nanocbor_fmt_uint
nanocbor_get_bool
nanocbor_get_bstr
nanocbor_get_decimal_frac
nanocbor_get_double
nanocbor_get_float
nanocbor_get_int16
nanocbor_get_int32
nanocbor_get_int64
nanocbor_get_int8
nanocbor_get_key_tstr
nanocbor_get_null
nanocbor_get_simple
nanocbor_get_subcbor
nanocbor_get_tag
nanocbor_get_tag64
nanocbor_get_tstr
nanocbor_get_type
nanocbor_get_uint16
nanocbor_get_uint32
nanocbor_get_uint64
nanocbor_get_uint8
nanocbor_get_undefined
nanocbor_leave_container
nanocbor_put_bstr
nanocbor_put_tstr
nanocbor_put_tstrn
nanocbor_skip
nanocbor_skip_simple
nanocoap_cache_add_by_key
nanocoap_cache_add_by_req
nanocoap_cache_del
nanocoap_cache_free_count
nanocoap_cache_key_blockreq_options_generate
nanocoap_cache_key_compare
nanocoap_cache_key_generate
nanocoap_cache_key_lookup
nanocoap_cache_key_options_generate
nanocoap_cache_process
nanocoap_cache_request_lookup
nanocoap_cache_used_count
nanocoap_get_blockwise_to_buf
nanocoap_get_blockwise_url
nanocoap_get_blockwise_url_to_buf
nanocoap_request
nanocoap_server
nanocoap_server_prepare_separate
nanocoap_server_send_separate
nanocoap_server_start
nanocoap_sock_block_request
nanocoap_sock_delete
nanocoap_sock_delete_url
nanocoap_sock_fetch
nanocoap_sock_fetch_non
nanocoap_sock_fetch_url
nanocoap_sock_get
nanocoap_sock_get_blockwise
nanocoap_sock_get_non
nanocoap_sock_get_slice
nanocoap_sock_post
nanocoap_sock_post_non
nanocoap_sock_post_url
nanocoap_sock_put
nanocoap_sock_put_non
nanocoap_sock_put_url
nanocoap_sock_request
nanocoap_sock_request_cb
nanocoap_sock_url_connect
netdev_register_signal
netif_get_by_id
netif_get_by_name_buffer
netif_get_id
netif_get_name
netif_get_opt
netif_iter
netif_print_ipv6
netif_register
netif_set_opt
netifs_get_ipv6
netifs_print_ipv6
netopt2str
nrf5x_i2c_acquire
nrf5x_i2c_release
nrf5x_spi_acquire
nrf5x_spi_release
one_at_a_time_hash
open
os_error_to_sys
os_mbuf_adj
os_mbuf_append
os_mbuf_appendfrom
os_mbuf_cmpf
os_mbuf_cmpm
os_mbuf_concat
os_mbuf_copydata
os_mbuf_copyinto
os_mbuf_dup
os_mbuf_extend
os_mbuf_free
os_mbuf_free_chain
os_mbuf_get
os_mbuf_get_pkthdr
os_mbuf_len
os_mbuf_off
os_mbuf_pack_chains
os_mbuf_pool_init
os_mbuf_prepend
os_mbuf_prepend_pullup
os_mbuf_pullup
os_mbuf_trim_front
os_mbuf_widen
os_memblock_from
os_memblock_get
os_memblock_put
os_memblock_put_from_cb
os_mempool_clear
os_mempool_ext_init
os_mempool_info_get_next
os_mempool_init
os_mempool_is_sane
os_mempool_unregister
os_mqueue_get
os_mqueue_init
os_mqueue_put
os_msys_count
os_msys_get
os_msys_get_pkthdr
os_msys_num_free
os_msys_register
os_msys_reset
panic_arch
pathconf
pause
pbkdf2_sha256
periph_init
perror
phydat_date_time_to_unix
phydat_dump
phydat_fit
phydat_prefix_from_scale
phydat_to_json
phydat_unit_print
phydat_unit_write
phydat_unix
pipe
pm_off
pm_reboot
pm_set_lowest
printf
put_be16
put_be24
put_be32
put_be64
put_le16
put_le24
put_le32
put_le64
putc
putchar
puts
pwm_channels
pwm_init
pwm_poweroff
pwm_poweron
pwm_set
qsort
quick_exit
rand
random_bytes
random_init
random_init_by_array
random_uint32
random_uint32_range
read
realloc
remove
rename
rewind
ringbuffer_add
ringbuffer_add_one
ringbuffer_get
ringbuffer_get_one
ringbuffer_peek
ringbuffer_peek_one
ringbuffer_remove
rmdir
rmutex_lock
rmutex_trylock
rmutex_unlock
rotating_hash
rtt_clear_alarm
rtt_clear_overflow_cb
rtt_get_alarm
rtt_get_counter
rtt_init
rtt_poweroff
rtt_poweron
rtt_set_alarm
rtt_set_counter
rtt_set_overflow_cb
saul_class_print
saul_class_to_str
saul_class_write
saul_init_devs
saul_read_notsup
saul_reg_add
saul_reg_find_name
saul_reg_find_nth
saul_reg_find_type
saul_reg_find_type_and_name
saul_reg_read
saul_reg_write
saul_write_notsup
sax_hash
scanf
sched_arch_idle
sched_change_priority
sched_run
sched_set_status
sched_switch
sched_task_exit
sched_yield
sdbm_hash
sema_create
sema_destroy
sema_post
setbuf
setgid
setpgid
setsid
setuid
setvbuf
sha1
sha1_final
sha1_final_hmac
sha1_init
sha1_init_hmac
sha1_update
sha224
sha224_init
sha256
sha256_chain
sha256_chain_verify_element
sha256_chain_with_waypoints
sha256_init
sha2xx_final
sha2xx_pad
sha2xx_update
sha3_256
sha3_256_final
sha3_256_init
sha3_384
sha3_384_final
sha3_384_init
sha3_512
sha3_512_final
sha3_512_init
sha3_update
sha512
sha512_common_final
sha512_common_pad
sha512_common_update
sha512_init
shared_irq_register_i2c
shared_irq_register_spi
shared_irq_register_uart
shell_handle_input_line
shell_parse_file
shell_post_command_hook
shell_post_readline_hook
shell_pre_command_hook
shell_run_once
sleep
snprintf
sock_ip_close
sock_ip_create
sock_ip_get_local
sock_ip_get_remote
sock_ip_recv_aux
sock_ip_recv_buf_aux
sock_ip_send_aux
sock_tcp_accept
sock_tcp_connect
sock_tcp_disconnect
sock_tcp_get_async_ctx
sock_tcp_get_local
sock_tcp_get_remote
sock_tcp_listen
sock_tcp_queue_get_async_ctx
sock_tcp_queue_get_local
sock_tcp_queue_set_cb
sock_tcp_read
sock_tcp_set_cb
sock_tcp_stop_listen
sock_tcp_write
sock_tl_ep_equal
sock_tl_ep_fmt
sock_tl_name2ep
sock_tl_str2ep
sock_udp_close
sock_udp_create
sock_udp_get_async_ctx
sock_udp_get_local
sock_udp_get_remote
sock_udp_recv_aux
sock_udp_recv_buf_aux
sock_udp_sendv_aux
sock_udp_set_cb
sock_urlpath
sock_urlsplit
spi_acquire
spi_init
spi_init_cs
spi_init_pins
spi_init_with_gpio_mode
spi_release
spi_transfer_byte
spi_transfer_bytes
spi_transfer_reg
spi_transfer_regs
spi_twi_irq_register_i2c
spi_twi_irq_register_spi
sprintf
srand
sscanf
stat
stdio_available
stdio_clear_stdin
stdio_close
stdio_init
stdio_read
stdio_write
strcat
strchr
strcmp
strcoll
strcpy
strcspn
strerror
strftime
strlen
strncat
strncmp
strncpy
strpbrk
strrchr
strsignal
strspn
strstr
strtod
strtof
strtoimax
strtok
strtol
strtold
strtoll
strtoul
strtoull
strtoumax
strxfrm
suit_component_name_to_string
suit_get_class_id
suit_get_device_id
suit_get_vendor_id
suit_handle_manifest_buf
suit_handle_url
suit_init_conditions
suit_parse
suit_policy_check
suit_worker_done_cb
suit_worker_trigger
suit_worker_trigger_prepared
suit_worker_try_prepare
swap_buf
swap_in_place
sysconf
system
tcgetpgrp
tcsetpgrp
thread_add_to_list
thread_create
thread_flags_clear
thread_flags_set
thread_flags_wait_all
thread_flags_wait_any
thread_flags_wait_one
thread_flags_wake
thread_getname
thread_getstatus
thread_isr_stack_pointer
thread_isr_stack_start
thread_isr_stack_usage
thread_kill_zombie
thread_print_stack
thread_sleep
thread_stack_init
thread_stack_print
thread_state_to_string
thread_wakeup
thread_yield
thread_zombify
time
timer_clear
timer_init
timer_query_channel_numof
timer_query_freqs
timer_query_freqs_numof
timer_read
timer_set
timer_set_absolute
timer_set_periodic
timer_start
timer_stop
timex_add
timex_cmp
timex_set
timex_sub
timex_to_str
tiny_strerror
tmpfile
tmpnam
tsrb_add
tsrb_add_one
tsrb_drop
tsrb_get
tsrb_get_one
tsrb_peek
tsrb_peek_one
ttyname
ttyname_r
uart_disable_tx
uart_enable_tx
uart_init
uart_mode
uart_poweroff
uart_poweron
uart_write
udp_hdr_print
umask
ungetc
unlink
uuid_from_string
uuid_to_string
uuid_v3
uuid_v4
uuid_v5
vfprintf
vfs_bind
vfs_bind_stdio
vfs_close
vfs_closedir
vfs_dstatvfs
vfs_fcntl
vfs_file_get
vfs_format
vfs_format_by_path
vfs_fstat
vfs_fstatvfs
vfs_fsync
vfs_iterate_mount_dirs
vfs_iterate_mounts
vfs_lseek
vfs_mkdir
vfs_mount
vfs_mount_by_path
vfs_normalize_path
vfs_open
vfs_opendir
vfs_read
vfs_readdir
vfs_readline
vfs_rename
vfs_rmdir
vfs_stat
vfs_statvfs
vfs_sysop_stat_from_fstat
vfs_umount
vfs_unlink
vfs_unmount_by_path
vfs_write
vfs_write_iol
vfscanf
vprintf
vscanf
vsnprintf
vsprintf
vsscanf
wcstoimax
wcstombs
wcstoumax
wctomb
write
ztimer_handler
ztimer_init
ztimer_is_set
ztimer_msg_receive_timeout
ztimer_mutex_lock_timeout
ztimer_mutex_unlock
ztimer_periodic_init
ztimer_periodic_start
ztimer_periodic_start_now
ztimer_periodic_stop
ztimer_periodic_wakeup
ztimer_remove
ztimer_rmutex_lock_timeout
ztimer_set
ztimer_set_msg
ztimer_set_timeout_flag
ztimer_set_wakeup
ztimer_sleep
Type Aliases
FILE
IRQn_Type
_LOCK_T
__FILE
__ULong
__blkcnt_t
__blksize_t
__clock_t
__clockid_t
__compar_fn_t
__dev_t
__fsblkcnt_t
__fsfilcnt_t
__gid_t
__gnuc_va_list
__id_t
__ino_t
__int16_t
__int32_t
__int64_t
__int8_t
__int_least16_t
__int_least32_t
__int_least64_t
__int_least8_t
__intmax_t
__intptr_t
__key_t
__loff_t
__mode_t
__nl_item
__nlink_t
__off_t
__pid_t
__sa_family_t
__size_t
__socklen_t
__ssize_t
__suseconds_t
__time_t
__timer_t
__uid_t
__uint16_t
__uint32_t
__uint64_t
__uint8_t
__uint_least16_t
__uint_least32_t
__uint_least64_t
__uint_least8_t
__uintmax_t
__uintptr_t
__useconds_t
__va_list
_bindgen_ty_1
_bindgen_ty_10
_bindgen_ty_11
_bindgen_ty_13
_bindgen_ty_14
_bindgen_ty_15
_bindgen_ty_16
_bindgen_ty_17
_bindgen_ty_18
_bindgen_ty_19
_bindgen_ty_2
_bindgen_ty_20
_bindgen_ty_21
_bindgen_ty_22
_bindgen_ty_23
_bindgen_ty_3
_bindgen_ty_4
_bindgen_ty_5
_bindgen_ty_6
_bindgen_ty_7
_bindgen_ty_8
_bindgen_ty_9
_flock_t
_fpos_t
_iconv_t
_off64_t
_off_t
_ssize_t
adc_res_t
adc_t
auto_init_fn_t
auto_init_prio_t
ble_error_codes
ble_gap_event_fn
ble_gatt_access_fn
ble_gatt_attr_fn
ble_gatt_chr_flags
ble_gatt_chr_fn
ble_gatt_disc_svc_fn
ble_gatt_dsc_fn
ble_gatt_mtu_fn
ble_gatt_register_fn
ble_gatt_reliable_attr_fn
ble_gatt_svc_foreach_fn
ble_hs_adv_parse_func_t
ble_hs_reset_fn
ble_hs_stop_fn
ble_hs_sync_fn
ble_l2cap_event_fn
ble_l2cap_sig_update_fn
ble_npl_error
ble_npl_event_fn
ble_npl_stime_t
ble_npl_time_t
ble_store_delete_fn
ble_store_iterator_fn
ble_store_read_fn
ble_store_status_fn
ble_store_write_fn
blkcnt_t
blksize_t
caddr_t
cipher_id_t
cipher_interface_t
clist_cmp_func_t
clist_node_t
clock_t
clockid_t
coap_blksize_t
coap_blockwise_cb_t
coap_handler_t
coap_method_flags_t
coap_method_t
coap_request_cb_t
coap_request_ctx_t
coap_resource_subtree_t
core_panic_t
cose_algo_t
cose_cbor_tag_t
cose_curve_t
cose_err_t
cose_hdr_t
cose_hdr_type_t
cose_header_param_t
cose_key_param_t
cose_key_t
cose_kty_t
cose_sign_dec_t
cose_sign_enc_t
cose_signature_dec_t
cose_signature_t
daddr_t
dev_t
error_t
event_handler_t
event_t
evtimer_callback_t
evtimer_event_t
evtimer_msg_t
fpos_t
fsblkcnt_t
fsfilcnt_t
gcoap_link_encoder_t
gcoap_listener_t
gcoap_request_matcher_t
gcoap_request_memo_t
gcoap_resp_handler_t
gcoap_socket_type_t
gid_t
gnrc_icmpv6_echo_rsp_handle_cb_t
gnrc_ipv6_event_t
gnrc_netif_bus_t
gnrc_netif_ops_t
gnrc_netreg_entry_cb_t
gnrc_netreg_entry_t
gnrc_netreg_type_t
gnrc_nettype_t
gnrc_pktsnip_t
gnrc_sock_reg_cb_t
gnrc_sock_reg_t
gnrc_tcp_ep_t
gnrc_tcp_tcb_queue_t
gnrc_tcp_tcb_t
gpio_cb_t
gpio_conf_t
gpio_drive_strength_t
gpio_flank_t
gpio_irq_trig_t
gpio_mode_t
gpio_pull_strength_t
gpio_pull_t
gpio_slew_t
gpio_state_t
gpio_t
i2c_flags_t
i2c_speed_t
i2c_t
id_t
ieee802154_phy_mode_t
ino_t
int_fast16_t
int_fast32_t
int_fast64_t
int_fast8_t
int_least16_t
int_least32_t
int_least64_t
int_least8_t
intmax_t
iolist_t
kernel_pid_t
key_t
list_node_t
log_append_cb
log_notify_rotate_cb
mode_t
mtd_desc_t
mtd_power_state
nanocbor_encoder_append
nanocbor_encoder_fits
nanocbor_encoder_t
nanocbor_error_t
nanocbor_value_t
nanocoap_cache_replacement_strategy_t
nanocoap_cache_update_strategy_t
nanocoap_socket_type_t
netdev_driver_t
netdev_event_cb_t
netdev_event_t
netdev_t
netdev_type_t
netopt_channel_t
netopt_connect_request_t
netopt_connect_result_t
netopt_disconnect_request_t
netopt_disconnect_result_t
netopt_enable_t
netopt_on_connect_result_t
netopt_on_disconnect_result_t
netopt_on_scan_result_t
netopt_rf_testmode_t
netopt_rssi_t
netopt_scan_request_t
netopt_scan_result_t
netopt_state_t
netopt_t
network_uint16_t
network_uint32_t
network_uint64_t
nlink_t
off_t
os_error
os_membuf_t
os_mempool_put_fn
os_sr_t
pid_t
pwm_mode_t
pwm_t
register_t
rtt_cb_t
saul_read_t
saul_reg_t
saul_write_t
sbintime_t
sema_state_t
sha224_context_t
sha256_context_t
sha512_context_t
shared_irq_cb_t
shell_command_handler_t
size_t
sock_async_flags_t
sock_aux_flags_t
sock_ip_t
sock_tcp_cb_t
sock_tcp_ep_t
sock_tcp_queue_cb_t
sock_tcp_queue_t
sock_tcp_t
sock_udp_cb_t
sock_udp_ep_t
sock_udp_t
spi_clk_t
spi_cs_t
spi_mode_t
spi_t
spi_twi_irq_cb_t
ssize_t
suit_digest_t
suit_digest_type_t
suit_error_t
suit_parameter_t
suit_storage_ref_t
suseconds_t
sword_t
thread_flags_t
thread_status_t
thread_t
thread_task_func_t
tim_t
time_t
timer_cb_t
timer_t
tsrb_t
u_int16_t
u_int32_t
u_int64_t
u_int8_t
uart_data_bits_t
uart_parity_t
uart_rx_cb_t
uart_rxstart_cb_t
uart_stop_bits_t
uart_t
uid_t
uint_fast16_t
uint_fast32_t
uint_fast64_t
uint_fast8_t
uint_least16_t
uint_least32_t
uint_least64_t
uint_least8_t
uintmax_t
uinttxtptr_t
unix_af_t
useconds_t
uword_t
vfs_dir_ops_t
vfs_file_ops_t
vfs_file_system_ops_t
vfs_mount_t
wchar_t
wint_t
ztimer_base_t
ztimer_callback_t
ztimer_clock_t
ztimer_now_t
ztimer_periodic_callback_t
Unions
APSR_Type
CONTROL_Type
IPSR_Type
ITM_Type__bindgen_ty_1
NRF_NVMC_Type__bindgen_ty_1
_mbstate_t__bindgen_ty_1
_sock_tl_ep__bindgen_ty_1
be_uint16_t
be_uint32_t
be_uint64_t
ble_gap_event__bindgen_ty_1
ble_gatt_access_ctxt__bindgen_ty_1
ble_gatt_register_ctxt__bindgen_ty_1
ble_l2cap_event__bindgen_ty_1
ble_mbuf_hdr__bindgen_ty_1
ble_sm_io__bindgen_ty_1
ble_store_key
ble_store_status_event__bindgen_ty_1
ble_store_value
ble_uuid_any_t
cose_hdr__bindgen_ty_1
eui64_t
gcoap_request_memo__bindgen_ty_1
gcoap_socket_t__bindgen_ty_1
gnrc_netreg_entry__bindgen_ty_1
gnrc_sock_reg__bindgen_ty_1
gpio_conf_nrf5x
ipv4_addr_t
ipv6_addr_t
le_uint16_t
le_uint32_t
le_uint64_t
msg_t__bindgen_ty_1
nanocbor_encoder__bindgen_ty_1
sock_event_cb_t
sock_ip_ep_t__bindgen_ty_1
vfs_DIR__bindgen_ty_1
vfs_file_t__bindgen_ty_1
xPSR_Type
riot_sys
::
bindgen
Constant
_FNONBLOCK
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pub const _FNONBLOCK:
u32
= 16384;