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board.h
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1/*
2 * Copyright (C) 2017 Inria
3 *
4 * This file is subject to the terms and conditions of the GNU Lesser
5 * General Public License v2.1. See the file LICENSE in the top level
6 * directory for more details.
7 */
8
20#ifndef BOARD_H
21#define BOARD_H
22
23#include "cpu.h"
24#include "periph_conf.h"
25#include "periph_cpu.h"
26#include "periph/gpio.h"
27
28#ifdef __cplusplus
29extern "C" {
30#endif
31
36#define LED0_PIN GPIO_PIN(PA, 17)
37
38#define LED_PORT PORT->Group[PA]
39#define LED0_MASK (1 << 17)
40
41#define LED0_ON (LED_PORT.OUTSET.reg = LED0_MASK)
42#define LED0_OFF (LED_PORT.OUTCLR.reg = LED0_MASK)
43#define LED0_TOGGLE (LED_PORT.OUTTGL.reg = LED0_MASK)
50#define ATWINC15X0_PARAM_SPI SPI_DEV(0)
51#define ATWINC15X0_PARAM_SSN_PIN GPIO_PIN(0, 6)
52#define ATWINC15X0_PARAM_RESET_PIN GPIO_PIN(0, 8)
53#define ATWINC15X0_PARAM_CHIP_EN_PIN GPIO_PIN(0, 14)
54#define ATWINC15X0_PARAM_IRQ_PIN GPIO_PIN(0, 21)
55#define ATWINC15X0_PARAM_WAKE_PIN GPIO_UNDEF
62#define SX127X_PARAM_SPI SPI_DEV(0)
63#if defined(BOARD_FEATHER_M0_LORA)
64#define SX127X_PARAM_SPI_NSS GPIO_PIN(PA, 6)
65#define SX127X_PARAM_RESET GPIO_PIN(PA, 8)
66#define SX127X_PARAM_DIO0 GPIO_PIN(PA, 9)
67#endif
68#define SX127X_PARAM_DIO1 GPIO_UNDEF
69#define SX127X_PARAM_DIO2 GPIO_UNDEF
70#define SX127X_PARAM_DIO3 GPIO_UNDEF
71#define SX127X_PARAM_PASELECT (SX127X_PA_BOOST)
74#ifdef __cplusplus
75}
76#endif
77
78#endif /* BOARD_H */
Native CPU peripheral configuration.
Low-level GPIO peripheral driver interface definitions.