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Data Fields
prcm_regs_t Struct Reference

PRCM registers. More...

Detailed Description

PRCM registers.

Definition at line 236 of file cc26x0_cc13x0_prcm.h.

#include <cc26x0_cc13x0_prcm.h>

Data Fields

reg32_t INFRCLKDIVR
 infrastructure clock division factor for run mode
 
reg32_t INFRCLKDIVS
 infrastructure clock division factor for sleep mode
 
reg32_t INFRCLKDIVDS
 infrastructure clock division factor for deep sleep mode
 
reg32_t VDCTL
 MCU voltage domain control.
 
reg32_t __reserved1 [6]
 Reserved.
 
reg32_t CLKLOADCTL
 clock load control
 
reg32_t RFCCLKG
 RFC clock gate.
 
reg32_t VIMSCLKG
 VIMS clock gate.
 
reg32_t __reserved2 [2]
 Reserved.
 
reg32_t SECDMACLKGR
 TRNG, CRYPTO, and UDMA clock gate for run mode.
 
reg32_t SECDMACLKGS
 TRNG, CRYPTO, and UDMA clock gate for sleep mode.
 
reg32_t SECDMACLKGDS
 TRNG, CRYPTO, and UDMA clock gate for deep sleep mode.
 
reg32_t GPIOCLKGR
 GPIO clock gate for run mode.
 
reg32_t GPIOCLKGS
 GPIO clock gate for sleep mode.
 
reg32_t GPIOCLKGDS
 GPIO clock gate for deep sleep mode.
 
reg32_t GPTCLKGR
 GPT clock gate for run mode.
 
reg32_t GPTCLKGS
 GPT clock gate for sleep mode.
 
reg32_t GPTCLKGDS
 GPT clock gate for deep sleep mode.
 
reg32_t I2CCLKGR
 I2C clock gate for run mode.
 
reg32_t I2CCLKGS
 I2C clock gate for sleep mode.
 
reg32_t I2CCLKGDS
 I2C clock gate for deep sleep mode.
 
reg32_t UARTCLKGR
 UART clock gate for run mode.
 
reg32_t UARTCLKGS
 UART clock gate for sleep mode.
 
reg32_t UARTCLKGDS
 UART clock gate for deep sleep mode.
 
reg32_t SSICLKGR
 SSI clock gate for run mode.
 
reg32_t SSICLKGS
 SSI clock gate for sleep mode.
 
reg32_t SSICLKGDS
 SSI clock gate for deep sleep mode.
 
reg32_t I2SCLKGR
 I2S clock gate for run mode.
 
reg32_t I2SCLKGS
 I2S clock gate for sleep mode.
 
reg32_t I2SCLKGDS
 I2S clock gate for deep sleep mode.
 
reg32_t __reserved3 [10]
 Reserved.
 
reg32_t CPUCLKDIV
 CPU clock division factor.
 
reg32_t __reserved4 [3]
 Reserved.
 
reg32_t I2SBCLKSEL
 I2S clock select.
 
reg32_t GPTCLKDIV
 GPT scalar.
 
reg32_t I2SCLKCTL
 I2S clock control.
 
reg32_t I2SMCLKDIV
 MCLK division ratio.
 
reg32_t I2SBCLKDIV
 BCLK division ratio.
 
reg32_t I2SWCLKDIV
 WCLK division ratio.
 
reg32_t __reserved5 [11]
 Reserved.
 
reg32_t SWRESET
 SW initiated resets.
 
reg32_t WARMRESET
 WARM reset control and status.
 
reg32_t __reserved6 [6]
 Reserved.
 
reg32_t PDCTL0
 power domain control
 
reg32_t PDCTL0RFC
 RFC power domain control.
 
reg32_t PDCTL0SERIAL
 SERIAL power domain control.
 
reg32_t PDCTL0PERIPH
 PERIPH power domain control.
 
reg32_t __reserved7
 Reserved.
 
reg32_t PDSTAT0
 power domain status
 
reg32_t PDSTAT0RFC
 RFC power domain status.
 
reg32_t PDSTAT0SERIAL
 SERIAL power domain status.
 
reg32_t PDSTAT0PERIPH
 PERIPH power domain status.
 
reg32_t __reserved8 [11]
 Reserved.
 
reg32_t PDCTL1
 power domain control
 
reg32_t __reserved9
 power domain control
 
reg32_t PDCTL1CPU
 CPU power domain control.
 
reg32_t PDCTL1RFC
 RFC power domain control.
 
reg32_t PDCTL1VIMS
 VIMS power domain control.
 
reg32_t __reserved10
 Reserved.
 
reg32_t PDSTAT1
 power domain status
 
reg32_t PDSTAT1BUS
 BUS power domain status.
 
reg32_t PDSTAT1RFC
 RFC power domain status.
 
reg32_t PDSTAT1CPU
 CPU power domain status.
 
reg32_t PDSTAT1VIMS
 VIMS power domain status.
 
reg32_t __reserved11 [10]
 Reserved.
 
reg32_t RFCMODESEL
 selected RFC mode
 
reg32_t __reserved12 [20]
 Reserved.
 
reg32_t RAMRETEN
 memory retention control
 
reg32_t __reserved13
 Reserved.
 
reg32_t PDRETEN
 power domain retention (undocumented)
 
reg32_t __reserved14 [8]
 Reserved.
 
reg32_t RAMHWOPT
 undocumented
 
reg32_t SYSBUSCLKDIV
 System bus clock division factor.
 
reg32_t PERBUSCPUCLKDIV
 Peripheral bus division factor.
 
reg32_t PERDMACLKDIV
 DMA clock division factor.
 
reg32_t RESETSECDMA
 Reset SEC and UDMA.
 
reg32_t RESETGPIO
 Reset GPIO.
 
reg32_t RESETGPT
 Reset GPTs.
 
reg32_t RESETI2C
 Reset I2C.
 
reg32_t RESETUART
 Reset UART.
 
reg32_t RESETSSI
 Reset SSI.
 
reg32_t RESETI2S
 Reset I2S.
 
reg32_t RFCBITS
 Control to RFC.
 
reg32_t RFCMODEHWOPT
 allowed RFC modes
 
reg32_t PWRPROFSTAT
 power profiler register
 
reg32_t MCUSRAMCFG
 MCU SRAM configuration.
 
reg32_t __reserved15 [27]
 Reserved.
 
reg32_t OSCIMSC
 oscillator interrupt mask
 
reg32_t OSCRIS
 oscillator raw interrupt status
 
reg32_t OSCICR
 oscillator raw interrupt clear
 

Field Documentation

◆ __reserved1

reg32_t prcm_regs_t::__reserved1

Reserved.

Definition at line 241 of file cc26x0_cc13x0_prcm.h.

◆ __reserved10

reg32_t prcm_regs_t::__reserved10

Reserved.

Definition at line 295 of file cc26x0_cc13x0_prcm.h.

◆ __reserved11

reg32_t prcm_regs_t::__reserved11

Reserved.

Definition at line 301 of file cc26x0_cc13x0_prcm.h.

◆ __reserved12

reg32_t prcm_regs_t::__reserved12

Reserved.

Definition at line 303 of file cc26x0_cc13x0_prcm.h.

◆ __reserved13

reg32_t prcm_regs_t::__reserved13

Reserved.

Definition at line 305 of file cc26x0_cc13x0_prcm.h.

◆ __reserved14

reg32_t prcm_regs_t::__reserved14

Reserved.

Definition at line 307 of file cc26x0_cc13x0_prcm.h.

◆ __reserved15

reg32_t prcm_regs_t::__reserved15[27]

Reserved.

Definition at line 328 of file cc26x2_cc13x2_prcm.h.

◆ __reserved2

reg32_t prcm_regs_t::__reserved2

Reserved.

Definition at line 245 of file cc26x0_cc13x0_prcm.h.

◆ __reserved3

reg32_t prcm_regs_t::__reserved3

Reserved.

Definition at line 267 of file cc26x0_cc13x0_prcm.h.

◆ __reserved4

reg32_t prcm_regs_t::__reserved4

Reserved.

Definition at line 269 of file cc26x0_cc13x0_prcm.h.

◆ __reserved5

reg32_t prcm_regs_t::__reserved5

Reserved.

Definition at line 276 of file cc26x0_cc13x0_prcm.h.

◆ __reserved6

reg32_t prcm_regs_t::__reserved6

Reserved.

Definition at line 279 of file cc26x0_cc13x0_prcm.h.

◆ __reserved7

reg32_t prcm_regs_t::__reserved7

Reserved.

Definition at line 284 of file cc26x0_cc13x0_prcm.h.

◆ __reserved8

reg32_t prcm_regs_t::__reserved8

Reserved.

Definition at line 289 of file cc26x0_cc13x0_prcm.h.

◆ __reserved9

reg32_t prcm_regs_t::__reserved9

power domain control

Definition at line 291 of file cc26x0_cc13x0_prcm.h.

◆ CLKLOADCTL

reg32_t prcm_regs_t::CLKLOADCTL

clock load control

Definition at line 242 of file cc26x0_cc13x0_prcm.h.

◆ CPUCLKDIV

reg32_t prcm_regs_t::CPUCLKDIV

CPU clock division factor.

Definition at line 268 of file cc26x0_cc13x0_prcm.h.

◆ GPIOCLKGDS

reg32_t prcm_regs_t::GPIOCLKGDS

GPIO clock gate for deep sleep mode.

Definition at line 251 of file cc26x0_cc13x0_prcm.h.

◆ GPIOCLKGR

reg32_t prcm_regs_t::GPIOCLKGR

GPIO clock gate for run mode.

Definition at line 249 of file cc26x0_cc13x0_prcm.h.

◆ GPIOCLKGS

reg32_t prcm_regs_t::GPIOCLKGS

GPIO clock gate for sleep mode.

Definition at line 250 of file cc26x0_cc13x0_prcm.h.

◆ GPTCLKDIV

reg32_t prcm_regs_t::GPTCLKDIV

GPT scalar.

Definition at line 271 of file cc26x0_cc13x0_prcm.h.

◆ GPTCLKGDS

reg32_t prcm_regs_t::GPTCLKGDS

GPT clock gate for deep sleep mode.

Definition at line 254 of file cc26x0_cc13x0_prcm.h.

◆ GPTCLKGR

reg32_t prcm_regs_t::GPTCLKGR

GPT clock gate for run mode.

Definition at line 252 of file cc26x0_cc13x0_prcm.h.

◆ GPTCLKGS

reg32_t prcm_regs_t::GPTCLKGS

GPT clock gate for sleep mode.

Definition at line 253 of file cc26x0_cc13x0_prcm.h.

◆ I2CCLKGDS

reg32_t prcm_regs_t::I2CCLKGDS

I2C clock gate for deep sleep mode.

Definition at line 257 of file cc26x0_cc13x0_prcm.h.

◆ I2CCLKGR

reg32_t prcm_regs_t::I2CCLKGR

I2C clock gate for run mode.

Definition at line 255 of file cc26x0_cc13x0_prcm.h.

◆ I2CCLKGS

reg32_t prcm_regs_t::I2CCLKGS

I2C clock gate for sleep mode.

Definition at line 256 of file cc26x0_cc13x0_prcm.h.

◆ I2SBCLKDIV

reg32_t prcm_regs_t::I2SBCLKDIV

BCLK division ratio.

Definition at line 274 of file cc26x0_cc13x0_prcm.h.

◆ I2SBCLKSEL

reg32_t prcm_regs_t::I2SBCLKSEL

I2S clock select.

Definition at line 270 of file cc26x0_cc13x0_prcm.h.

◆ I2SCLKCTL

reg32_t prcm_regs_t::I2SCLKCTL

I2S clock control.

Definition at line 272 of file cc26x0_cc13x0_prcm.h.

◆ I2SCLKGDS

reg32_t prcm_regs_t::I2SCLKGDS

I2S clock gate for deep sleep mode.

Definition at line 266 of file cc26x0_cc13x0_prcm.h.

◆ I2SCLKGR

reg32_t prcm_regs_t::I2SCLKGR

I2S clock gate for run mode.

Definition at line 264 of file cc26x0_cc13x0_prcm.h.

◆ I2SCLKGS

reg32_t prcm_regs_t::I2SCLKGS

I2S clock gate for sleep mode.

Definition at line 265 of file cc26x0_cc13x0_prcm.h.

◆ I2SMCLKDIV

reg32_t prcm_regs_t::I2SMCLKDIV

MCLK division ratio.

Definition at line 273 of file cc26x0_cc13x0_prcm.h.

◆ I2SWCLKDIV

reg32_t prcm_regs_t::I2SWCLKDIV

WCLK division ratio.

Definition at line 275 of file cc26x0_cc13x0_prcm.h.

◆ INFRCLKDIVDS

reg32_t prcm_regs_t::INFRCLKDIVDS

infrastructure clock division factor for deep sleep mode

Definition at line 239 of file cc26x0_cc13x0_prcm.h.

◆ INFRCLKDIVR

reg32_t prcm_regs_t::INFRCLKDIVR

infrastructure clock division factor for run mode

Definition at line 237 of file cc26x0_cc13x0_prcm.h.

◆ INFRCLKDIVS

reg32_t prcm_regs_t::INFRCLKDIVS

infrastructure clock division factor for sleep mode

Definition at line 238 of file cc26x0_cc13x0_prcm.h.

◆ MCUSRAMCFG

reg32_t prcm_regs_t::MCUSRAMCFG

MCU SRAM configuration.

Definition at line 325 of file cc26x2_cc13x2_prcm.h.

◆ OSCICR

reg32_t prcm_regs_t::OSCICR

oscillator raw interrupt clear

Definition at line 331 of file cc26x2_cc13x2_prcm.h.

◆ OSCIMSC

reg32_t prcm_regs_t::OSCIMSC

oscillator interrupt mask

Definition at line 329 of file cc26x2_cc13x2_prcm.h.

◆ OSCRIS

reg32_t prcm_regs_t::OSCRIS

oscillator raw interrupt status

Definition at line 330 of file cc26x2_cc13x2_prcm.h.

◆ PDCTL0

reg32_t prcm_regs_t::PDCTL0

power domain control

Definition at line 280 of file cc26x0_cc13x0_prcm.h.

◆ PDCTL0PERIPH

reg32_t prcm_regs_t::PDCTL0PERIPH

PERIPH power domain control.

Definition at line 283 of file cc26x0_cc13x0_prcm.h.

◆ PDCTL0RFC

reg32_t prcm_regs_t::PDCTL0RFC

RFC power domain control.

Definition at line 281 of file cc26x0_cc13x0_prcm.h.

◆ PDCTL0SERIAL

reg32_t prcm_regs_t::PDCTL0SERIAL

SERIAL power domain control.

Definition at line 282 of file cc26x0_cc13x0_prcm.h.

◆ PDCTL1

reg32_t prcm_regs_t::PDCTL1

power domain control

Definition at line 290 of file cc26x0_cc13x0_prcm.h.

◆ PDCTL1CPU

reg32_t prcm_regs_t::PDCTL1CPU

CPU power domain control.

Definition at line 292 of file cc26x0_cc13x0_prcm.h.

◆ PDCTL1RFC

reg32_t prcm_regs_t::PDCTL1RFC

RFC power domain control.

Definition at line 293 of file cc26x0_cc13x0_prcm.h.

◆ PDCTL1VIMS

reg32_t prcm_regs_t::PDCTL1VIMS

VIMS power domain control.

Definition at line 294 of file cc26x0_cc13x0_prcm.h.

◆ PDRETEN

reg32_t prcm_regs_t::PDRETEN

power domain retention (undocumented)

Definition at line 306 of file cc26x0_cc13x0_prcm.h.

◆ PDSTAT0

reg32_t prcm_regs_t::PDSTAT0

power domain status

Definition at line 285 of file cc26x0_cc13x0_prcm.h.

◆ PDSTAT0PERIPH

reg32_t prcm_regs_t::PDSTAT0PERIPH

PERIPH power domain status.

Definition at line 288 of file cc26x0_cc13x0_prcm.h.

◆ PDSTAT0RFC

reg32_t prcm_regs_t::PDSTAT0RFC

RFC power domain status.

Definition at line 286 of file cc26x0_cc13x0_prcm.h.

◆ PDSTAT0SERIAL

reg32_t prcm_regs_t::PDSTAT0SERIAL

SERIAL power domain status.

Definition at line 287 of file cc26x0_cc13x0_prcm.h.

◆ PDSTAT1

reg32_t prcm_regs_t::PDSTAT1

power domain status

Definition at line 296 of file cc26x0_cc13x0_prcm.h.

◆ PDSTAT1BUS

reg32_t prcm_regs_t::PDSTAT1BUS

BUS power domain status.

Definition at line 297 of file cc26x0_cc13x0_prcm.h.

◆ PDSTAT1CPU

reg32_t prcm_regs_t::PDSTAT1CPU

CPU power domain status.

Definition at line 299 of file cc26x0_cc13x0_prcm.h.

◆ PDSTAT1RFC

reg32_t prcm_regs_t::PDSTAT1RFC

RFC power domain status.

Definition at line 298 of file cc26x0_cc13x0_prcm.h.

◆ PDSTAT1VIMS

reg32_t prcm_regs_t::PDSTAT1VIMS

VIMS power domain status.

Definition at line 300 of file cc26x0_cc13x0_prcm.h.

◆ PERBUSCPUCLKDIV

reg32_t prcm_regs_t::PERBUSCPUCLKDIV

Peripheral bus division factor.

Definition at line 279 of file cc26x2_cc13x2_prcm.h.

◆ PERDMACLKDIV

reg32_t prcm_regs_t::PERDMACLKDIV

DMA clock division factor.

Definition at line 281 of file cc26x2_cc13x2_prcm.h.

◆ PWRPROFSTAT

reg32_t prcm_regs_t::PWRPROFSTAT

power profiler register

Definition at line 323 of file cc26x2_cc13x2_prcm.h.

◆ RAMHWOPT

reg32_t prcm_regs_t::RAMHWOPT

undocumented

Definition at line 308 of file cc26x0_cc13x0_prcm.h.

◆ RAMRETEN

reg32_t prcm_regs_t::RAMRETEN

memory retention control

Definition at line 304 of file cc26x0_cc13x0_prcm.h.

◆ RESETGPIO

reg32_t prcm_regs_t::RESETGPIO

Reset GPIO.

Definition at line 290 of file cc26x2_cc13x2_prcm.h.

◆ RESETGPT

reg32_t prcm_regs_t::RESETGPT

Reset GPTs.

Definition at line 291 of file cc26x2_cc13x2_prcm.h.

◆ RESETI2C

reg32_t prcm_regs_t::RESETI2C

Reset I2C.

Definition at line 292 of file cc26x2_cc13x2_prcm.h.

◆ RESETI2S

reg32_t prcm_regs_t::RESETI2S

Reset I2S.

Definition at line 295 of file cc26x2_cc13x2_prcm.h.

◆ RESETSECDMA

reg32_t prcm_regs_t::RESETSECDMA

Reset SEC and UDMA.

Definition at line 289 of file cc26x2_cc13x2_prcm.h.

◆ RESETSSI

reg32_t prcm_regs_t::RESETSSI

Reset SSI.

Definition at line 294 of file cc26x2_cc13x2_prcm.h.

◆ RESETUART

reg32_t prcm_regs_t::RESETUART

Reset UART.

Definition at line 293 of file cc26x2_cc13x2_prcm.h.

◆ RFCBITS

reg32_t prcm_regs_t::RFCBITS

Control to RFC.

Definition at line 319 of file cc26x2_cc13x2_prcm.h.

◆ RFCCLKG

reg32_t prcm_regs_t::RFCCLKG

RFC clock gate.

Definition at line 243 of file cc26x0_cc13x0_prcm.h.

◆ RFCMODEHWOPT

reg32_t prcm_regs_t::RFCMODEHWOPT

allowed RFC modes

Definition at line 321 of file cc26x2_cc13x2_prcm.h.

◆ RFCMODESEL

reg32_t prcm_regs_t::RFCMODESEL

selected RFC mode

Definition at line 302 of file cc26x0_cc13x0_prcm.h.

◆ SECDMACLKGDS

reg32_t prcm_regs_t::SECDMACLKGDS

TRNG, CRYPTO, and UDMA clock gate for deep sleep mode.

Definition at line 248 of file cc26x0_cc13x0_prcm.h.

◆ SECDMACLKGR

reg32_t prcm_regs_t::SECDMACLKGR

TRNG, CRYPTO, and UDMA clock gate for run mode.

Definition at line 246 of file cc26x0_cc13x0_prcm.h.

◆ SECDMACLKGS

reg32_t prcm_regs_t::SECDMACLKGS

TRNG, CRYPTO, and UDMA clock gate for sleep mode.

Definition at line 247 of file cc26x0_cc13x0_prcm.h.

◆ SSICLKGDS

reg32_t prcm_regs_t::SSICLKGDS

SSI clock gate for deep sleep mode.

Definition at line 263 of file cc26x0_cc13x0_prcm.h.

◆ SSICLKGR

reg32_t prcm_regs_t::SSICLKGR

SSI clock gate for run mode.

Definition at line 261 of file cc26x0_cc13x0_prcm.h.

◆ SSICLKGS

reg32_t prcm_regs_t::SSICLKGS

SSI clock gate for sleep mode.

Definition at line 262 of file cc26x0_cc13x0_prcm.h.

◆ SWRESET

reg32_t prcm_regs_t::SWRESET

SW initiated resets.

Definition at line 277 of file cc26x0_cc13x0_prcm.h.

◆ SYSBUSCLKDIV

reg32_t prcm_regs_t::SYSBUSCLKDIV

System bus clock division factor.

Definition at line 277 of file cc26x2_cc13x2_prcm.h.

◆ UARTCLKGDS

reg32_t prcm_regs_t::UARTCLKGDS

UART clock gate for deep sleep mode.

Definition at line 260 of file cc26x0_cc13x0_prcm.h.

◆ UARTCLKGR

reg32_t prcm_regs_t::UARTCLKGR

UART clock gate for run mode.

Definition at line 258 of file cc26x0_cc13x0_prcm.h.

◆ UARTCLKGS

reg32_t prcm_regs_t::UARTCLKGS

UART clock gate for sleep mode.

Definition at line 259 of file cc26x0_cc13x0_prcm.h.

◆ VDCTL

reg32_t prcm_regs_t::VDCTL

MCU voltage domain control.

Definition at line 240 of file cc26x0_cc13x0_prcm.h.

◆ VIMSCLKG

reg32_t prcm_regs_t::VIMSCLKG

VIMS clock gate.

Definition at line 244 of file cc26x0_cc13x0_prcm.h.

◆ WARMRESET

reg32_t prcm_regs_t::WARMRESET

WARM reset control and status.

Definition at line 278 of file cc26x0_cc13x0_prcm.h.

The documentation for this struct was generated from the following files: