stm32f4/include/periph_cpu.h
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1 /*
2  * Copyright (C) 2015-2016 Freie Universit├Ąt Berlin
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser
5  * General Public License v2.1. See the file LICENSE in the top level
6  * directory for more details.
7  */
8 
19 #ifndef PERIPH_CPU_H
20 #define PERIPH_CPU_H
21 
22 #include "periph_cpu_common.h"
23 
24 #ifdef __cplusplus
25 extern "C" {
26 #endif
27 
31 enum {
32  PORT_A = 0,
33  PORT_B = 1,
34  PORT_C = 2,
35  PORT_D = 3,
36  PORT_E = 4,
37  PORT_F = 5,
38  PORT_G = 6,
39  PORT_H = 7,
40  PORT_I = 8
41 };
42 
46 #if defined(CPU_MODEL_STM32F401RE) || defined(CPU_MODEL_STM32F410RB) || defined(CPU_MODEL_STM32F411RE)|| defined(CPU_MODEL_STM32F413ZH)
47 #define ADC_DEVS (1U)
48 #elif defined(CPU_MODEL_STM32F407VG) || defined(CPU_MODEL_STM32F415RG) || defined(CPU_MODEL_STM32F446RE) || defined(CPU_MODEL_STM32F429ZI)
49 #define ADC_DEVS (3U)
50 #endif
51 
52 #ifndef DOXYGEN
53 
57 #define HAVE_ADC_RES_T
58 typedef enum {
59  ADC_RES_6BIT = 0x03000000,
60  ADC_RES_8BIT = 0x02000000,
61  ADC_RES_10BIT = 0x01000000,
62  ADC_RES_12BIT = 0x00000000,
63  ADC_RES_14BIT = 1,
64  ADC_RES_16BIT = 2
65 } adc_res_t;
67 #endif /* ndef DOXYGEN */
68 
72 typedef struct {
73  gpio_t pin;
74  uint8_t dev;
75  uint8_t chan;
76 } adc_conf_t;
77 
83 static inline void dma_poweron(int stream)
84 {
85  if (stream < 8) {
86  periph_clk_en(AHB1, RCC_AHB1ENR_DMA1EN);
87  }
88  else {
89  periph_clk_en(AHB1, RCC_AHB1ENR_DMA2EN);
90  }
91 }
92 
102 static inline DMA_TypeDef *dma_base(int stream)
103 {
104  return (stream < 8) ? DMA1 : DMA2;
105 }
106 
114 static inline DMA_Stream_TypeDef *dma_stream(int stream)
115 {
116  uint32_t base = (uint32_t)dma_base(stream);
117 
118  return (DMA_Stream_TypeDef *)(base + (0x10 + (0x18 * (stream & 0x7))));
119 }
120 
128 static inline int dma_hl(int stream)
129 {
130  return ((stream & 0x4) >> 2);
131 }
132 
138 static inline uint32_t dma_ifc(int stream)
139 {
140  switch (stream & 0x3) {
141  case 0:
142  return (1 << 5);
143  case 1:
144  return (1 << 11);
145  case 2:
146  return (1 << 21);
147  case 3:
148  return (1 << 27);
149  default:
150  return 0;
151  }
152 }
153 
154 static inline void dma_isr_enable(int stream)
155 {
156  if (stream < 7) {
157  NVIC_EnableIRQ((IRQn_Type)((int)DMA1_Stream0_IRQn + stream));
158  }
159  else if (stream == 7) {
160  NVIC_EnableIRQ(DMA1_Stream7_IRQn);
161  }
162  else if (stream < 13) {
163  NVIC_EnableIRQ((IRQn_Type)((int)DMA2_Stream0_IRQn + (stream - 8)));
164  }
165  else if (stream < 16) {
166  NVIC_EnableIRQ((IRQn_Type)((int)DMA2_Stream5_IRQn + (stream - 13)));
167  }
168 }
169 
170 #ifdef __cplusplus
171 }
172 #endif
173 
174 #endif /* PERIPH_CPU_H */
175 
ADC resolution: 12 bit.
static int dma_hl(int stream)
Select high or low DMA interrupt register based on stream number.
static void dma_isr_enable(int stream)
Enable DMA interrupts.
enum IRQn IRQn_Type
Interrupt Number Definition.
static uint32_t dma_ifc(int stream)
Get the interrupt flag clear bit position in the DMA LIFCR register.
static void dma_poweron(int stream)
Power on the DMA device the given stream belongs to.
static DMA_TypeDef * dma_base(int stream)
Get DMA base register.
not supported by hardware
ADC resolution: 10 bit.
gpio_t adc_conf_t
ADC configuration wrapper.
not supported by hardware
not supported by hardware
not supported by hardware
void periph_clk_en(bus_t bus, uint32_t mask)
Enable the given peripheral clock.
static DMA_Stream_TypeDef * dma_stream(int stream)
Get the DMA stream base address.