stm32f2/include/periph_cpu.h
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1 /*
2  * Copyright (C) 2015 Engineering-Spirit
3  * Copyright (C) 2016 OTA keys S.A.
4  *
5  * This file is subject to the terms and conditions of the GNU Lesser
6  * General Public License v2.1. See the file LICENSE in the top level
7  * directory for more details.
8  */
9 
21 #ifndef PERIPH_CPU_H
22 #define PERIPH_CPU_H
23 
24 #include "periph_cpu_common.h"
25 
26 #ifdef __cplusplus
27 extern "C" {
28 #endif
29 
33 #define CPUID_ADDR (0x1fff7a10)
34 
38 enum {
39  PORT_A = 0,
40  PORT_B = 1,
41  PORT_C = 2,
42  PORT_D = 3,
43  PORT_E = 4,
44  PORT_F = 5,
45  PORT_G = 6,
46  PORT_H = 7,
47  PORT_I = 8
48 };
49 
53 #define ADC_DEVS (2U)
54 
58 typedef struct {
59  gpio_t pin;
60  uint8_t dev;
61  uint8_t chan;
62 } adc_conf_t;
63 
68 #define HAVE_ADC_RES_T
69 typedef enum {
70  ADC_RES_6BIT = 0x03000000,
71  ADC_RES_8BIT = 0x02000000,
72  ADC_RES_10BIT = 0x01000000,
73  ADC_RES_12BIT = 0x00000000,
76 } adc_res_t;
84 static inline void dma_poweron(int stream)
85 {
86  if (stream < 8) {
87  periph_clk_en(AHB1, RCC_AHB1ENR_DMA1EN);
88  } else {
89  periph_clk_en(AHB1, RCC_AHB1ENR_DMA2EN);
90  }
91 }
92 
102 static inline DMA_TypeDef *dma_base(int stream)
103 {
104  return (stream < 8) ? DMA1 : DMA2;
105 }
106 
114 static inline DMA_Stream_TypeDef *dma_stream(int stream)
115 {
116  uint32_t base = (uint32_t)dma_base(stream);
117  return (DMA_Stream_TypeDef *)(base + (0x10 + (0x18 * (stream & 0x7))));
118 }
119 
127 static inline int dma_hl(int stream)
128 {
129  return ((stream & 0x4) >> 2);
130 }
131 
137 static inline uint32_t dma_ifc(int stream)
138 {
139  switch (stream & 0x3) {
140  case 0: /* 0 and 4 */
141  return (1 << 5);
142  case 1: /* 1 and 5 */
143  return (1 << 11);
144  case 2: /* 2 and 6 */
145  return (1 << 21);
146  case 3: /* 3 and 7 */
147  return (1 << 27);
148  default:
149  return 0;
150  }
151 }
152 
158 static inline void dma_isr_enable(int stream)
159 {
160  if (stream < 7) {
161  NVIC_EnableIRQ((IRQn_Type)((int)DMA1_Stream0_IRQn + stream));
162  }
163  else if (stream == 7) {
164  NVIC_EnableIRQ(DMA1_Stream7_IRQn);
165  }
166  else if (stream < 13) {
167  NVIC_EnableIRQ((IRQn_Type)((int)DMA2_Stream0_IRQn + (stream - 8)));
168  }
169  else if (stream < 16) {
170  NVIC_EnableIRQ((IRQn_Type)((int)DMA2_Stream5_IRQn + (stream - 13)));
171  }
172 }
173 
174 #ifdef __cplusplus
175 }
176 #endif
177 
178 #endif /* PERIPH_CPU_H */
179 
ADC resolution: 12 bit.
static void dma_isr_enable(int stream)
Enable DMA interrupts.
static uint32_t dma_ifc(int stream)
Get the interrupt flag clear bit position in the DMA LIFCR register.
enum IRQn IRQn_Type
Interrupt Number Definition.
static DMA_TypeDef * dma_base(int stream)
Get DMA base register.
ADC resolution: 14 bit (not supported)
ADC resolution: 10 bit.
static void dma_poweron(int stream)
Power on the DMA device the given stream belongs to.
gpio_t adc_conf_t
ADC configuration wrapper.
ADC resolution: 16 bit (not supported)
ADC resolution: 8 bit.
ADC resolution: 6 bit.
static DMA_Stream_TypeDef * dma_stream(int stream)
Get the DMA stream base address.
void periph_clk_en(bus_t bus, uint32_t mask)
Enable the given peripheral clock.
static int dma_hl(int stream)
Select high or low DMA interrupt register based on stream number.