stm32_common/include/periph_cpu_common.h
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1 /*
2  * Copyright (C) 2016 Freie Universit├Ąt Berlin
3  * 2017 OTA keys S.A.
4  *
5  * This file is subject to the terms and conditions of the GNU Lesser
6  * General Public License v2.1. See the file LICENSE in the top level
7  * directory for more details.
8  */
9 
21 #ifndef PERIPH_CPU_COMMON_H
22 #define PERIPH_CPU_COMMON_H
23 
24 #include "cpu.h"
25 
26 #ifdef __cplusplus
27 extern "C" {
28 #endif
29 
33 extern uint32_t _cpuid_address;
37 #define CPUID_ADDR (&_cpuid_address)
38 
41 #define CPUID_LEN (12U)
42 
46 #define TIMER_CHAN (4U)
47 
52 #define PERIPH_SPI_NEEDS_TRANSFER_BYTE
53 #define PERIPH_SPI_NEEDS_TRANSFER_REG
54 #define PERIPH_SPI_NEEDS_TRANSFER_REGS
55 
60 #if defined(CPU_FAM_STM32F1) || defined(CPU_FAM_STM32F2) \
61  || defined(CPU_FAM_STM32F4) || defined(DOXYGEN)
62 #define PM_NUM_MODES (2U)
63 #endif
64 
68 typedef enum {
69  APB1,
70  APB2,
71 #if defined(CPU_FAM_STM32L0)
72  AHB,
73  IOP,
74 #elif defined(CPU_FAM_STM32L1) || defined(CPU_FAM_STM32F1) \
75  || defined(CPU_FAM_STM32F0) || defined(CPU_FAM_STM32F3)
76  AHB,
77 #elif defined(CPU_FAM_STM32F2) || defined(CPU_FAM_STM32F4) \
78  || defined(CPU_FAM_STM32L4) || defined(CPU_FAM_STM32F7)
79  AHB1,
80  AHB2,
81  AHB3
82 #else
83 #warning "unsupported stm32XX family"
84 #endif
85 } bus_t;
86 
87 #ifndef DOXYGEN
88 
92 #define HAVE_GPIO_T
93 typedef uint32_t gpio_t;
95 #endif
96 
100 #define GPIO_UNDEF (0xffffffff)
101 
105 #define GPIO_PIN(x, y) ((GPIOA_BASE + (x << 10)) | y)
106 
113 #define SPI_HWCS_MASK (0xffffff00)
114 
121 #define SPI_HWCS(x) (SPI_HWCS_MASK | x)
122 
126 typedef enum {
127 #ifdef CPU_FAM_STM32F1
128  GPIO_AF_OUT_PP = 0xb,
129  GPIO_AF_OUT_OD = 0xf,
130 #else
131  GPIO_AF0 = 0,
139 #ifndef CPU_FAM_STM32F0
148 #endif
149 #endif
150 } gpio_af_t;
151 
152 #ifndef CPU_FAM_STM32F1
153 
161 #define GPIO_MODE(io, pr, ot) ((io << 0) | (pr << 2) | (ot << 4))
162 
163 #ifndef DOXYGEN
164 
168 #define HAVE_GPIO_MODE_T
169 typedef enum {
170  GPIO_IN = GPIO_MODE(0, 0, 0),
171  GPIO_IN_PD = GPIO_MODE(0, 2, 0),
172  GPIO_IN_PU = GPIO_MODE(0, 1, 0),
173  GPIO_OUT = GPIO_MODE(1, 0, 0),
174  GPIO_OD = GPIO_MODE(1, 0, 1),
175  GPIO_OD_PU = GPIO_MODE(1, 1, 1)
176 } gpio_mode_t;
183 #define HAVE_GPIO_FLANK_T
184 typedef enum {
185  GPIO_RISING = 1,
186  GPIO_FALLING = 2,
187  GPIO_BOTH = 3
188 } gpio_flank_t;
190 #endif /* ndef DOXYGEN */
191 #endif /* ndef CPU_FAM_STM32F1 */
192 
196 typedef struct {
197  TIM_TypeDef *dev;
198  uint32_t max;
199  uint32_t rcc_mask;
200  uint8_t bus;
201  uint8_t irqn;
202 } timer_conf_t;
203 
207 typedef struct {
208  gpio_t pin;
209  uint8_t cc_chan;
210 } pwm_chan_t;
211 
215 typedef struct {
216  TIM_TypeDef *dev;
217  uint32_t rcc_mask;
221  uint8_t bus;
222 } pwm_conf_t;
223 
227 typedef struct {
228  USART_TypeDef *dev;
229  uint32_t rcc_mask;
230  gpio_t rx_pin;
231  gpio_t tx_pin;
232 #ifndef CPU_FAM_STM32F1
235 #endif
236  uint8_t bus;
237  uint8_t irqn;
238 #if 0 /* TODO */
239  uint8_t dma_stream;
240  uint8_t dma_chan;
241 #endif
242 #ifdef UART_USE_HW_FC
243  gpio_t cts_pin;
244  gpio_t rts_pin;
245 #ifndef CPU_FAM_STM32F1
246  gpio_af_t cts_af;
247  gpio_af_t rts_af;
248 #endif
249 #endif
250 } uart_conf_t;
251 
255 typedef struct {
256  SPI_TypeDef *dev;
257  gpio_t mosi_pin;
258  gpio_t miso_pin;
259  gpio_t sclk_pin;
260  gpio_t cs_pin;
261 #ifndef CPU_FAM_STM32F1
263 #endif
264  uint32_t rccmask;
265  uint8_t apbbus;
266 } spi_conf_t;
267 
275 uint32_t periph_apb_clk(uint8_t bus);
276 
283 void periph_clk_en(bus_t bus, uint32_t mask);
284 
291 void periph_clk_dis(bus_t bus, uint32_t mask);
292 
299 void gpio_init_af(gpio_t pin, gpio_af_t af);
300 
306 void gpio_init_analog(gpio_t pin);
307 
308 #ifdef __cplusplus
309 }
310 #endif
311 
312 #endif /* PERIPH_CPU_COMMON_H */
313 
use alternate function 4
#define GPIO_MODE(io, pr, ot)
Generate GPIO mode bitfields.
use alternate function 9
use alternate function 7
emit interrupt on rising flank
Definition: gpio.h:114
bus_t
Available peripheral buses.
uint32_t rcc_mask
bit in clock enable register
use alternate function 8
use alternate function 10
uint32_t rcc_mask
corresponding bit in the RCC register
uint32_t max
maximum value to count to (16/32 bit)
uint8_t cc_chan
capture compare channel used
use alternate function 6
use alternate function 14
gpio_af_t
Available MUX values for configuring a pin's alternate function.
#define TIMER_CHAN
All STM timers have 4 capture-compare channels.
use alternate function 3
uint8_t bus
APBx bus the timer is clock from.
gpio_af_t tx_af
alternate function for TX pin
use alternate function 1
PWM configuration structure.
gpio_af_t af
pin alternate function
emit interrupt on both flanks
Definition: gpio.h:115
gpio_flank_t
Definition of possible active flanks for external interrupt mode.
Definition: gpio.h:112
use alternate function 0
unsigned int gpio_t
GPIO type identifier.
Definition: gpio.h:69
use alternate function 13
TIM_TypeDef * dev
Timer used.
uint32_t rcc_mask
bit in clock enable register
emit interrupt on falling flank
Definition: gpio.h:113
use alternate function 5
static DMA_Stream_TypeDef * dma_stream(int stream)
Get the DMA stream base address.
use alternate function 11
input, pull-up
uint8_t apbbus
APBx bus the device is connected to.
use alternate function 12
void gpio_init_af(gpio_t pin, gpio_af_t af)
Configure the alternate function for the given pin.
void periph_clk_en(bus_t bus, uint32_t mask)
Enable the given peripheral clock.
UART device configuration.
gpio_af_t rx_af
alternate function for RX pin
input, no pull
TIM_TypeDef * dev
timer device
uint32_t rccmask
bit in the RCC peripheral enable register
uint32_t _cpuid_address
Linker script provided symbol for CPUID location.
not supported
void gpio_init_analog(gpio_t pin)
Configure the given pin to be used as ADC input.
use alternate function 15
SPI configuration data structure.
SPI_TypeDef * dev
SPI device base register address.
gpio_t pin
GPIO pin mapped to this channel.
input, pull-down
gpio_af_t af
alternate function used
uint32_t periph_apb_clk(uint8_t bus)
Get the actual bus clock frequency for the APB buses.
Timer configuration data.
use alternate function 2
void periph_clk_dis(bus_t bus, uint32_t mask)
Disable the given peripheral clock.