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sdcard_spi_internal.h
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1 /*
2  * Copyright (C) 2016 Michel Rottleuthner <michel.rottleuthner@haw-hamburg.de>
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser
5  * General Public License v2.1. See the file LICENSE in the top level
6  * directory for more details.
7  */
8 
24 #ifndef SDCARD_SPI_INTERNAL_H
25 #define SDCARD_SPI_INTERNAL_H
26 
27 #ifdef __cplusplus
28 extern "C" {
29 #endif
30 
31 #include "periph/spi.h"
32 #include "periph/gpio.h"
33 #include "stdbool.h"
34 #include "sdcard_spi.h"
35 
36 
37 /* number of clocks that should be applied to the card on init
38  before taking furter actions (see sd spec. 6.4.1.1 Power Up Time of Card) */
39 #define SD_POWERSEQUENCE_CLOCK_COUNT 74
40 
41 #define SD_CARD_PREINIT_CLOCK_PERIOD_US 10 /* used to generate 100 kHz clock in init phase*/
42 #define SD_CARD_WAIT_AFTER_POWER_UP_US 1000
43 
44 /* R1 response bits (see sd spec. 7.3.2.1 Format R1) */
45 #define SD_R1_RESPONSE_PARAM_ERROR (1<<6)
46 #define SD_R1_RESPONSE_ADDR_ERROR (1<<5)
47 #define SD_R1_RESPONSE_ERASE_SEQ_ERROR (1<<4)
48 #define SD_R1_RESPONSE_CMD_CRC_ERROR (1<<3)
49 #define SD_R1_RESPONSE_ILLEGAL_CMD_ERROR (1<<2)
50 #define SD_R1_RESPONSE_ERASE_RESET (1<<1)
51 #define SD_R1_RESPONSE_IN_IDLE_STATE (0x01)
52 #define SD_INVALID_R1_RESPONSE (1<<7)
53 
54 #define R1_VALID(X) (((X) >> 7) == 0)
55 #define R1_PARAM_ERR(X) ((((X) &SD_R1_RESPONSE_PARAM_ERROR) != 0))
56 #define R1_ADDR_ERR(X) ((((X) &SD_R1_RESPONSE_ADDR_ERROR) != 0))
57 #define R1_ERASE_ERR(X) ((((X) &SD_R1_RESPONSE_ERASE_SEQ_ERROR) != 0))
58 #define R1_CMD_CRC_ERR(X) ((((X) &SD_R1_RESPONSE_CMD_CRC_ERROR) != 0))
59 #define R1_ILL_CMD_ERR(X) ((((X) &SD_R1_RESPONSE_ILLEGAL_CMD_ERROR) != 0))
60 #define R1_IDLE_BIT_SET(X) (((X) &SD_R1_RESPONSE_IN_IDLE_STATE) != 0)
61 #define R1_ERROR(X) (R1_PARAM_ERR(X) || R1_ADDR_ERR(X) || R1_ERASE_ERR(X) || \
62  R1_CMD_CRC_ERR(X) || R1_ILL_CMD_ERR(X))
63 
64 /* see sd spec. 7.3.3.1 Data Response Token */
65 #define DATA_RESPONSE_IS_VALID(X) (((X) & 0x11) == 0x01)
66 #define DATA_RESPONSE_ACCEPTED(X) (((X) & 0x0E) == (1<<2))
67 #define DATA_RESPONSE_CRC_ERR(X) (((X) & 0x0E) == 0x0A)
68 #define DATA_RESPONSE_WRITE_ERR(X) (((X) & 0x0E) == 0x0C)
69 
70 /* see sd spec. 5.1 OCR register */
71 #define OCR_VOLTAGE_3_2_TO_3_3 (1L << 20)
72 #define OCR_VOLTAGE_3_3_TO_3_4 (1L << 21)
73 
74 /* card capacity status (CCS=0: the card is SDSD; CCS=1: card is SDHC or SDXC) */
75 #define OCR_CCS (1L << 30)
76 
77 /* This bit is set to low if the card has not finished power up routine */
78 #define OCR_POWER_UP_STATUS (1L << 31)
79 
80 /* to ensure the voltage range check on init is done properly you need to
81  define this according to your actual interface/wiring with the sd-card */
82 #define SYSTEM_VOLTAGE (OCR_VOLTAGE_3_2_TO_3_3 | OCR_VOLTAGE_3_2_TO_3_3)
83 
84 
85 /* see sd spec. 7.3.1.3 Detailed Command Description */
86 #define SD_CMD_PREFIX_MASK (1<<6)
87 
88 #define SD_CMD_0 0 /* Resets the SD Memory Card */
89 #define SD_CMD_1 1 /* Sends host capacity support info and starts the cards init process */
90 #define SD_CMD_8 8 /* Sends SD Card interface condition incl. host supply voltage info */
91 #define SD_CMD_9 9 /* Asks the selected card to send its card-specific data (CSD) */
92 #define SD_CMD_10 10 /* Asks the selected card to send its card identification (CID) */
93 #define SD_CMD_12 12 /* Forces the card to stop transmission in Multiple Block Read Operation */
94 #define SD_CMD_13 13 /* Sent as ACMD13 asks the card to send it's SD status */
95 
96 #define SD_CMD_16 16 /* In case of SDSC Card, block length is set by this command */
97 #define SD_CMD_17 17 /* Reads a block of the size selected by the SET_BLOCKLEN command */
98 #define SD_CMD_18 18 /* Continuously transfers data blocks from card to host
99  until interrupted by a STOP_TRANSMISSION command */
100 #define SD_CMD_24 24 /* Writes a block of the size selected by the SET_BLOCKLEN command */
101 #define SD_CMD_25 25 /* Continuously writes blocks of data until 'Stop Tran'token is sent */
102 #define SD_CMD_41 41 /* Reserved (used for ACMD41) */
103 #define SD_CMD_55 55 /* Defines to the card that the next commmand is an application specific
104  command rather than a standard command */
105 #define SD_CMD_58 58 /* Reads the OCR register of a card */
106 #define SD_CMD_59 59 /* Turns the CRC option on or off. Argument: 1:on; 0:off */
107 
108 #define SD_CMD_8_VHS_2_7_V_TO_3_6_V 0x01
109 #define SD_CMD_8_CHECK_PATTERN 0xB5
110 #define SD_CMD_NO_ARG 0x00000000
111 #define SD_ACMD_41_ARG_HC 0x40000000
112 #define SD_CMD_59_ARG_EN 0x00000001
113 #define SD_CMD_59_ARG_DIS 0x00000000
114 
115 /* see sd spec. 7.3.3 Control Tokens */
116 #define SD_DATA_TOKEN_CMD_17_18_24 0xFE
117 #define SD_DATA_TOKEN_CMD_25 0xFC
118 #define SD_DATA_TOKEN_CMD_25_STOP 0xFD
119 
120 #define SD_SIZE_OF_CID_AND_CSD_REG 16
121 #define SD_SIZE_OF_SD_STATUS 64
122 #define SD_BLOCKS_FOR_REG_READ 1
123 #define SD_GET_CSD_STRUCTURE(CSD_RAW_DATA) ((CSD_RAW_DATA)[0] >> 6)
124 #define SD_CSD_V1 0
125 #define SD_CSD_V2 1
126 #define SD_CSD_VUNSUPPORTED -1
127 
128 /* the retry counters below are used as timeouts for specific actions.
129  The values may need some adjustments to either give the card more time to respond
130  to commands or to achieve a lower delay / avoid infinite blocking. */
131 #define R1_POLLING_RETRY_CNT 1000000
132 #define SD_DATA_TOKEN_RETRY_CNT 1000000
133 #define INIT_CMD_RETRY_CNT 1000000
134 #define INIT_CMD0_RETRY_CNT 3
135 #define SD_WAIT_FOR_NOT_BUSY_CNT 1000000 /* use -1 for full blocking till the card isn't busy */
136 #define SD_BLOCK_READ_CMD_RETRIES 10 /* only affects sending of cmd not whole transaction! */
137 #define SD_BLOCK_WRITE_CMD_RETRIES 10 /* only affects sending of cmd not whole transaction! */
138 
139 /* memory capacity in bytes = (C_SIZE+1) * SD_CSD_V2_C_SIZE_BLOCK_MULT * BLOCK_LEN */
140 #define SD_CSD_V2_C_SIZE_BLOCK_MULT 1024
141 
142 #define SD_CARD_SPI_MODE SPI_MODE_0
143 
144 /* this speed setting is only used while the init procedure is performed */
145 #define SD_CARD_SPI_SPEED_PREINIT SPI_CLK_400KHZ
146 
147 /* after init procedure is finished the driver auto sets the card to this speed */
148 #define SD_CARD_SPI_SPEED_POSTINIT SPI_CLK_10MHZ
149 
150 #define SD_CARD_DUMMY_BYTE 0xFF
151 
152 #define SDCARD_SPI_IEC_KIBI (1024L)
153 #define SDCARD_SPI_SI_KILO (1000L)
154 
155 typedef enum {
156  SD_INIT_START,
157  SD_INIT_SPI_POWER_SEQ,
158  SD_INIT_SEND_CMD0,
159  SD_INIT_SEND_CMD8,
160  SD_INIT_CARD_UNKNOWN,
161  SD_INIT_SEND_ACMD41_HCS,
162  SD_INIT_SEND_ACMD41,
163  SD_INIT_SEND_CMD1,
164  SD_INIT_SEND_CMD58,
165  SD_INIT_SEND_CMD16,
166  SD_INIT_ENABLE_CRC,
167  SD_INIT_READ_CID,
168  SD_INIT_READ_CSD,
169  SD_INIT_SET_MAX_SPI_SPEED,
170  SD_INIT_FINISH
171 } sd_init_fsm_state_t;
172 
189 char sdcard_spi_send_cmd(sdcard_spi_t *card, char sd_cmd_idx, uint32_t argument, int32_t max_retry);
190 
207 char sdcard_spi_send_acmd(sdcard_spi_t *card, char sd_cmd_idx, uint32_t argument, int32_t max_retry);
208 
217 
225 uint32_t sdcard_spi_get_au_size(sdcard_spi_t *card);
226 
236 
237 
238 #ifdef __cplusplus
239 }
240 #endif
241 
242 #endif /* SDCARD_SPI_INTERNAL_H */
243 
SD status register (see section 4.10.2 in SD-Spec v5.00)
Definition: sdcard_spi.h:130
Low-level GPIO peripheral driver interface definitions.
uint32_t sdcard_spi_get_au_size(sdcard_spi_t *card)
Gets the allocation unit size of the card.
Low-level SPI peripheral driver interface definition.
sd_rw_response_t
sdcard_spi r/w-operation return values
Definition: sdcard_spi.h:161
char sdcard_spi_send_cmd(sdcard_spi_t *card, char sd_cmd_idx, uint32_t argument, int32_t max_retry)
Sends a cmd to the sd card.
Public interface for the sdcard_spi driver.
sd_rw_response_t sdcard_spi_read_sds(sdcard_spi_t *card, sd_status_t *sd_status)
Gets the SD status of the card.
uint32_t sdcard_spi_get_sector_count(sdcard_spi_t *card)
Gets the sector count of the card.
char sdcard_spi_send_acmd(sdcard_spi_t *card, char sd_cmd_idx, uint32_t argument, int32_t max_retry)
Sends an acmd to the sd card.
Device descriptor for sdcard_spi.
Definition: sdcard_spi.h:187