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periph_cpu.h
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1/*
2 * Copyright (C) 2015 Freie Universität Berlin
3 * 2015 Hamburg University of Applied Sciences
4 *
5 * This file is subject to the terms and conditions of the GNU Lesser
6 * General Public License v2.1. See the file LICENSE in the top level
7 * directory for more details.
8 */
9
22#ifndef PERIPH_CPU_H
23#define PERIPH_CPU_H
24
25#include "cpu.h"
26
27#ifdef __cplusplus
28extern "C" {
29#endif
30
31#ifndef DOXYGEN
32#define HAVE_GPIO_T
33typedef uint32_t gpio_t;
34
35#define GPIO_UNDEF (0xffffffff)
36
37#define GPIO_PIN(x, y) (((uint32_t)PIOA + (x << 9)) | y)
38#endif /* DOXYGEN */
39
44#define PERIPH_SPI_NEEDS_INIT_CS
45#define PERIPH_SPI_NEEDS_TRANSFER_BYTE
46#define PERIPH_SPI_NEEDS_TRANSFER_REG
47#define PERIPH_SPI_NEEDS_TRANSFER_REGS
53#define CPUID_LEN (16U)
54
58#define TIMER_MAX_VAL (0xffffffff)
59
68#define TIMER_CHANNEL_NUMOF (1)
69
74#define RTT_MAX_VALUE (0xffffffff)
75#define RTT_CLOCK_FREQUENCY (CHIP_FREQ_XTAL_32K) /* in Hz */
76#define RTT_MIN_FREQUENCY (1) /* in Hz */
77#define RTT_MAX_FREQUENCY (RTT_CLOCK_FREQUENCY) /* in Hz */
88#define GPIO_MODE(io, pu, od) (io | (pu << 1) | (od << 2))
89
97#define ADC_NUMOF (16U)
98
110#define DAC_NUMOF (2U)
111
112#ifndef DOXYGEN
113#define HAVE_GPIO_MODE_T
114typedef enum {
115 GPIO_IN = GPIO_MODE(0, 0, 0),
116 GPIO_IN_PD = 0xf,
117 GPIO_IN_PU = GPIO_MODE(0, 1, 0),
118 GPIO_OUT = GPIO_MODE(1, 0, 0),
119 GPIO_OD = GPIO_MODE(1, 0, 1),
120 GPIO_OD_PU = GPIO_MODE(1, 1, 1),
122
123#define HAVE_GPIO_FLANK_T
124typedef enum {
125 GPIO_RISING = 1,
126 GPIO_FALLING = 2,
127 GPIO_BOTH = 3
129#endif /* ndef DOXYGEN */
130
134enum {
135 PA = 0,
136 PB = 1,
137 PC = 2,
138 PD = 3,
139};
140
144typedef enum {
147} gpio_mux_t;
148
149#ifndef DOXYGEN
154#define HAVE_SPI_MODE_T
155typedef enum {
156 SPI_MODE_0 = (SPI_CSR_NCPHA),
157 SPI_MODE_1 = (0),
158 SPI_MODE_2 = (SPI_CSR_CPOL | SPI_CSR_NCPHA),
159 SPI_MODE_3 = (SPI_CSR_CPOL)
160} spi_mode_t;
167#define HAVE_SPI_CLK_T
168typedef enum {
169 SPI_CLK_100KHZ = (100000),
170 SPI_CLK_400KHZ = (400000),
171 SPI_CLK_1MHZ = (1000000),
172 SPI_CLK_5MHZ = (5000000),
173 SPI_CLK_10MHZ = (10000000)
174} spi_clk_t;
176#endif /* ndef DOXYGEN */
177
178#ifndef DOXYGEN
183#define HAVE_ADC_RES_T
184typedef enum {
185 ADC_RES_6BIT = 0x1,
186 ADC_RES_8BIT = 0x2,
187 ADC_RES_10BIT = ADC_MR_LOWRES_BITS_10,
188 ADC_RES_12BIT = ADC_MR_LOWRES_BITS_12,
189 ADC_RES_14BIT = 0x4,
190 ADC_RES_16BIT = 0x8
191} adc_res_t;
193#endif /* ndef DOXYGEN */
194
198typedef struct {
199 Tc *dev;
200 uint8_t id_ch0;
202
206typedef struct {
207 Uart *dev;
208 gpio_t rx_pin;
209 gpio_t tx_pin;
210 gpio_mux_t mux;
211 uint8_t pmc_id;
212 uint8_t irqn;
214
218typedef struct {
219 gpio_t pin;
220 uint8_t hwchan;
222
226typedef struct {
227 Spi *dev;
228 uint8_t id;
229 gpio_t clk;
230 gpio_t mosi;
231 gpio_t miso;
233} spi_conf_t;
234
241void gpio_init_mux(gpio_t pin, gpio_mux_t mux);
242
243#ifdef __cplusplus
244}
245#endif
246
247#endif /* PERIPH_CPU_H */
gpio_flank_t
Definition periph_cpu.h:180
@ GPIO_OUT
select GPIO MASK as output
Definition periph_cpu.h:165
@ GPIO_IN
select GPIO MASK as input
Definition periph_cpu.h:164
spi_clk_t
Definition periph_cpu.h:352
@ SPI_CLK_10MHZ
drive the SPI bus with 10MHz
Definition periph_cpu.h:357
@ SPI_CLK_5MHZ
drive the SPI bus with 5MHz
Definition periph_cpu.h:356
@ SPI_CLK_400KHZ
drive the SPI bus with 400KHz
Definition periph_cpu.h:354
@ SPI_CLK_1MHZ
drive the SPI bus with 1MHz
Definition periph_cpu.h:355
@ SPI_CLK_100KHZ
drive the SPI bus with 100KHz
Definition periph_cpu.h:353
void gpio_init_mux(gpio_t pin, uint8_t over, uint8_t sel, uint8_t func)
Configure an alternate function for the given pin.
#define GPIO_MODE(x, y)
Internal macro for combining pin mode (x) and pull-up/down (y).
Definition periph_cpu.h:152
adc_res_t
Possible ADC resolution settings.
Definition adc.h:93
@ ADC_RES_16BIT
ADC resolution: 16 bit.
Definition adc.h:99
@ ADC_RES_8BIT
ADC resolution: 8 bit.
Definition adc.h:95
@ ADC_RES_14BIT
ADC resolution: 14 bit.
Definition adc.h:98
@ ADC_RES_6BIT
ADC resolution: 6 bit.
Definition adc.h:94
@ ADC_RES_10BIT
ADC resolution: 10 bit.
Definition adc.h:96
@ ADC_RES_12BIT
ADC resolution: 12 bit.
Definition adc.h:97
spi_mode_t
Support SPI modes.
Definition periph_cpu.h:43
@ SPI_MODE_0
CPOL=0, CPHA=0.
Definition periph_cpu.h:44
@ SPI_MODE_2
CPOL=1, CPHA=0.
Definition periph_cpu.h:46
@ SPI_MODE_1
CPOL=0, CPHA=1.
Definition periph_cpu.h:45
@ SPI_MODE_3
CPOL=1, CPHA=1.
Definition periph_cpu.h:47
gpio_mode_t
Available pin modes.
Definition periph_cpu.h:82
@ PB
port B
@ PC
port C
@ PA
port A
@ PD
port D
gpio_mux_t
Available MUX values for configuring a pin's alternate function.
gpio_mux_t
GPIO mux configuration.
Definition periph_cpu.h:144
@ GPIO_MUX_A
alternate function A
Definition periph_cpu.h:145
@ GPIO_MUX_B
alternate function B
Definition periph_cpu.h:146
PWM channel configuration.
Definition periph_cpu.h:469
uint8_t hwchan
the HW channel used for a logical channel
Definition periph_cpu.h:220
SPI device configuration.
Definition periph_cpu.h:337
gpio_mux_t mux
pin MUX setting
Definition periph_cpu.h:232
uint8_t id
corresponding ID of that module
Definition periph_cpu.h:228
Spi * dev
SPI module to use.
Definition periph_cpu.h:227
gpio_t clk
pin mapped to the CLK line
Definition periph_cpu.h:229
Timer device configuration.
Definition periph_cpu.h:264
Tc * dev
timer device
Definition periph_cpu.h:199
uint8_t id_ch0
ID of the timer's first channel.
Definition periph_cpu.h:200
UART device configuration.
Definition periph_cpu.h:218
uint8_t pmc_id
bit in the PMC register of the device
Definition periph_cpu.h:211
Uart * dev
U(S)ART device used.
Definition periph_cpu.h:207