Loading...
Searching...
No Matches
cpu_conf.h
Go to the documentation of this file.
1/*
2 * Copyright (C) 2014 Freie Universität Berlin
3 *
4 * This file is subject to the terms and conditions of the GNU Lesser General
5 * Public License v2.1. See the file LICENSE in the top level directory for more
6 * details.
7 */
8
21#ifndef CPU_CONF_H
22#define CPU_CONF_H
23
24#include "cpu_conf_common.h"
25#include "vendor/nrf51.h"
26#include "vendor/nrf51_bitfields.h"
27#include "vendor/nrf51822_peripherals.h"
28
29#ifdef __cplusplus
30extern "C" {
31#endif
32
37#define CPU_DEFAULT_IRQ_PRIO (1U)
38#define CPU_IRQ_NUMOF (26U)
39#define CPU_FLASH_BASE (0x00000000)
46#define FLASHPAGE_SIZE (1024U)
47
48#if defined(CPU_MODEL_NRF51X22XXAA) || defined(CPU_MODEL_NRF51X22XXAC)
49#define FLASHPAGE_NUMOF (256U)
50#elif defined(CPU_MODEL_NRF51X22XXAB)
51#define FLASHPAGE_NUMOF (128U)
52#endif
53/* The minimum block size which can be written is 4B. However, the erase
54 * block is always FLASHPAGE_SIZE.
55 */
56#define FLASHPAGE_WRITE_BLOCK_SIZE (4U)
57/* Writing should be always 4 bytes aligned */
58#define FLASHPAGE_WRITE_BLOCK_ALIGNMENT (4U)
66#ifndef CONFIG_GNRC_PKTBUF_SIZE
67#define CONFIG_GNRC_PKTBUF_SIZE (2048)
68#endif
75#define PWM_GPIOTE_CH (2U)
76#define PWM_PPI_A (0U)
77#define PWM_PPI_B (1U)
80#ifdef __cplusplus
81}
82#endif
83
84#endif /* CPU_CONF_H */