nrf24l01p_settings.h
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1 /*
2  * Copyright (C) 2014 Hamburg University of Applied Sciences
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser General
5  * Public License v2.1. See the file LICENSE in the top level directory for more
6  * details.
7  */
8 
21 #ifndef NRF24L01P_SETTINGS_H
22 #define NRF24L01P_SETTINGS_H
23 
24 #ifdef __cplusplus
25 extern "C" {
26 #endif
27 
32 #define INITIAL_ADDRESS_WIDTH 5
33 #define NRF24L01P_MAX_DATA_LENGTH 32
34 #ifndef INITIAL_RF_CHANNEL
35 #define INITIAL_RF_CHANNEL 5
36 #endif
37 #define INITIAL_RX_POWER_0dB 0
38 
44 #define DELAY_CS_TOGGLE_US 2
45 #define DELAY_AFTER_FUNC_US 2
46 #define DELAY_CE_HIGH_US (20)
47 #define DELAY_CHANGE_PWR_MODE_US (1500)
48 #define DELAY_CHANGE_TXRX_US (130)
49 #define DELAY_CE_START_US (5)
50 /*
51  * This is the time which is needed to physically transmit the data.
52  * Compare nrf24l01+ pruduct specification p.42. It is computed just
53  * for this setup
54  */
55 #define DELAY_DATA_ON_AIR (1300)
56 
62 #define CMD_R_REGISTER 0x00
63 #define CMD_W_REGISTER 0x20
64 #define CMD_R_RX_PAYLOAD 0x61
65 #define CMD_W_TX_PAYLOAD 0xa0
66 #define CMD_FLUSH_TX 0xe1
67 #define CMD_FLUSH_RX 0xe2
68 #define CMD_REUSE_TX_PL 0xe3
69 #define CMD_R_RX_PL_WID 0x60
70 #define CMD_W_ACK_PAYLOAD 0xa8
71 #define CMD_W_TX_PAYLOAD_NOACK 0xb0
72 #define CMD_NOP 0xff
73 
74 #define REGISTER_MASK 0x1F
75 
81 #define REG_CONFIG 0x00
82 #define REG_EN_AA 0x01
83 #define REG_EN_RXADDR 0x02
84 #define REG_SETUP_AW 0x03
85 #define REG_SETUP_RETR 0x04
86 #define REG_RF_CH 0x05
87 #define REG_RF_SETUP 0x06
88 #define REG_STATUS 0x07
89 #define REG_OBSERVE_TX 0x08
90 #define REG_RPD 0x09
91 #define REG_RX_ADDR_P0 0x0a
92 #define REG_RX_ADDR_P1 0x0b
93 #define REG_RX_ADDR_P2 0x0c
94 #define REG_RX_ADDR_P3 0x0d
95 #define REG_RX_ADDR_P4 0x0e
96 #define REG_RX_ADDR_P5 0x0f
97 #define REG_TX_ADDR 0x10
98 #define REG_RX_PW_P0 0x11
99 #define REG_RX_PW_P1 0x12
100 #define REG_RX_PW_P2 0x13
101 #define REG_RX_PW_P3 0x14
102 #define REG_RX_PW_P4 0x15
103 #define REG_RX_PW_P5 0x16
104 #define REG_FIFO_STATUS 0x17
105 #define REG_DYNPD 0x1c
106 #define REG_FEATURE 0x1d
107 
113 #define ENAA_P0 0x01
114 #define ENAA_P1 0x02
115 #define ENAA_P2 0x04
116 #define ENAA_P3 0x08
117 #define ENAA_P4 0x10
118 #define ENAA_P5 0x20
119 
124 #define MASK_RX_DR 0x40
125 #define MASK_TX_DS 0x20
126 #define MASK_MAX_RT 0x10
127 #define EN_CRC 0x08
128 #define CRCO 0x04
129 #define PWR_UP 0x02
130 #define PRIM_RX 0x01
131 
137 #define RX_DR 0x40
138 #define TX_DS 0x20
139 #define MAX_RT 0x10
140 #define RX_P_NO 0x0e
141 #define TX_FULL 0x01
142 #define ALL_INT_MASK 0x70
143 
149 #define RF_SETUP_CONT_WAVE (1 << 7)
150 #define RF_SETUP_RF_DR_LOW (1 << 5)
151 #define RF_SETUP_PLL_LOCK (1 << 4)
152 #define RF_SETUP_RF_DR_HIGH (1 << 3)
153 #define RF_SETUP_RF_PWR (3 << 1)
154 
159 #define RF_CH_MASK 0x7f
160 
165 #define DYNPD_DPL_P5 (1 << 5)
166 #define DYNPD_DPL_P4 (1 << 4)
167 #define DYNPD_DPL_P3 (1 << 3)
168 #define DYNPD_DPL_P2 (1 << 2)
169 #define DYNPD_DPL_P1 (1 << 1)
170 #define DYNPD_DPL_P0 (1 << 0)
171 
177 #define FEATURE_EN_DPL (1 << 2)
178 #define FEATURE_EN_ACK_PAY (1 << 1)
179 #define FEATURE_EN_DYN_ACK (1 << 0)
180 
182 #ifdef __cplusplus
183 }
184 #endif
185 
186 #endif /* NRF24L01P_SETTINGS_H */
187