nrf24l01p_settings.h
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1 /*
2  * Copyright (C) 2014 Hamburg University of Applied Sciences
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser General
5  * Public License v2.1. See the file LICENSE in the top level directory for more
6  * details.
7  */
8 
22 #ifndef NRF24L01P_SETTINGS_H
23 #define NRF24L01P_SETTINGS_H
24 
25 #ifdef __cplusplus
26 extern "C" {
27 #endif
28 
33 #define INITIAL_ADDRESS_WIDTH 5
34 #define NRF24L01P_MAX_DATA_LENGTH 32
35 #ifndef INITIAL_RF_CHANNEL
36 #define INITIAL_RF_CHANNEL 5
37 #endif
38 #define INITIAL_RX_POWER_0dB 0
39 
45 #define DELAY_CS_TOGGLE_US 2
46 #define DELAY_AFTER_FUNC_US 2
47 #define DELAY_CE_HIGH_US (20)
48 #define DELAY_CHANGE_PWR_MODE_US (1500)
49 #define DELAY_CHANGE_TXRX_US (130)
50 #define DELAY_CE_START_US (5)
51 /*
52  * This is the time which is needed to physically transmit the data.
53  * Compare nrf24l01+ pruduct specification p.42. It is computed just
54  * for this setup
55  */
56 #define DELAY_DATA_ON_AIR (1300)
57 
63 #define CMD_R_REGISTER 0x00
64 #define CMD_W_REGISTER 0x20
65 #define CMD_R_RX_PAYLOAD 0x61
66 #define CMD_W_TX_PAYLOAD 0xa0
67 #define CMD_FLUSH_TX 0xe1
68 #define CMD_FLUSH_RX 0xe2
69 #define CMD_REUSE_TX_PL 0xe3
70 #define CMD_R_RX_PL_WID 0x60
71 #define CMD_W_ACK_PAYLOAD 0xa8
72 #define CMD_W_TX_PAYLOAD_NOACK 0xb0
73 #define CMD_NOP 0xff
74 
75 #define REGISTER_MASK 0x1F
76 
82 #define REG_CONFIG 0x00
83 #define REG_EN_AA 0x01
84 #define REG_EN_RXADDR 0x02
85 #define REG_SETUP_AW 0x03
86 #define REG_SETUP_RETR 0x04
87 #define REG_RF_CH 0x05
88 #define REG_RF_SETUP 0x06
89 #define REG_STATUS 0x07
90 #define REG_OBSERVE_TX 0x08
91 #define REG_RPD 0x09
92 #define REG_RX_ADDR_P0 0x0a
93 #define REG_RX_ADDR_P1 0x0b
94 #define REG_RX_ADDR_P2 0x0c
95 #define REG_RX_ADDR_P3 0x0d
96 #define REG_RX_ADDR_P4 0x0e
97 #define REG_RX_ADDR_P5 0x0f
98 #define REG_TX_ADDR 0x10
99 #define REG_RX_PW_P0 0x11
100 #define REG_RX_PW_P1 0x12
101 #define REG_RX_PW_P2 0x13
102 #define REG_RX_PW_P3 0x14
103 #define REG_RX_PW_P4 0x15
104 #define REG_RX_PW_P5 0x16
105 #define REG_FIFO_STATUS 0x17
106 #define REG_DYNPD 0x1c
107 #define REG_FEATURE 0x1d
108 
114 #define ENAA_P0 0x01
115 #define ENAA_P1 0x02
116 #define ENAA_P2 0x04
117 #define ENAA_P3 0x08
118 #define ENAA_P4 0x10
119 #define ENAA_P5 0x20
120 
125 #define MASK_RX_DR 0x40
126 #define MASK_TX_DS 0x20
127 #define MASK_MAX_RT 0x10
128 #define EN_CRC 0x08
129 #define CRCO 0x04
130 #define PWR_UP 0x02
131 #define PRIM_RX 0x01
132 
138 #define RX_DR 0x40
139 #define TX_DS 0x20
140 #define MAX_RT 0x10
141 #define RX_P_NO 0x0e
142 #define TX_FULL 0x01
143 #define ALL_INT_MASK 0x70
144 
150 #define RF_SETUP_CONT_WAVE (1 << 7)
151 #define RF_SETUP_RF_DR_LOW (1 << 5)
152 #define RF_SETUP_PLL_LOCK (1 << 4)
153 #define RF_SETUP_RF_DR_HIGH (1 << 3)
154 #define RF_SETUP_RF_PWR (3 << 1)
155 
160 #define RF_CH_MASK 0x7f
161 
166 #define DYNPD_DPL_P5 (1 << 5)
167 #define DYNPD_DPL_P4 (1 << 4)
168 #define DYNPD_DPL_P3 (1 << 3)
169 #define DYNPD_DPL_P2 (1 << 2)
170 #define DYNPD_DPL_P1 (1 << 1)
171 #define DYNPD_DPL_P0 (1 << 0)
172 
178 #define FEATURE_EN_DPL (1 << 2)
179 #define FEATURE_EN_ACK_PAY (1 << 1)
180 #define FEATURE_EN_DYN_ACK (1 << 0)
181 
183 #ifdef __cplusplus
184 }
185 #endif
186 
187 #endif /* NRF24L01P_SETTINGS_H */