lis3dh.h
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1 /*
2  * Copyright (C) 2015 Eistec AB
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser
5  * General Public License v2.1. See the file LICENSE in the top level
6  * directory for more details.
7  */
8 
22 #ifndef LIS3DH_H
23 #define LIS3DH_H
24 
25 #include <stdint.h>
26 
27 #include "periph/spi.h"
28 #include "periph/gpio.h"
29 
30 #ifdef __cplusplus
31 extern "C" {
32 #endif
33 
38 #define LIS3DH_WHO_AM_I_RESPONSE (0b00110011)
39 
43 typedef enum {
44  LIS3DH_REG_STATUS_AUX = 0x07,
45  LIS3DH_REG_OUT_AUX_ADC1_L = 0x08,
46  LIS3DH_REG_OUT_AUX_ADC1_H = 0x09,
47  LIS3DH_REG_OUT_AUX_ADC2_L = 0x0A,
48  LIS3DH_REG_OUT_AUX_ADC2_H = 0x0B,
49  LIS3DH_REG_OUT_AUX_ADC3_L = 0x0C,
50  LIS3DH_REG_OUT_AUX_ADC3_H = 0x0D,
51  LIS3DH_REG_INT_COUNTER_REG = 0x0E,
52  LIS3DH_REG_WHO_AM_I = 0x0F,
53  LIS3DH_REG_TEMP_CFG_REG = 0x1F,
54  LIS3DH_REG_CTRL_REG1 = 0x20,
55  LIS3DH_REG_CTRL_REG2 = 0x21,
56  LIS3DH_REG_CTRL_REG3 = 0x22,
57  LIS3DH_REG_CTRL_REG4 = 0x23,
58  LIS3DH_REG_CTRL_REG5 = 0x24,
59  LIS3DH_REG_CTRL_REG6 = 0x25,
60  LIS3DH_REG_REFERENCE = 0x26,
61  LIS3DH_REG_STATUS_REG = 0x27,
62  LIS3DH_REG_OUT_X_L = 0x28,
63  LIS3DH_REG_OUT_X_H = 0x29,
64  LIS3DH_REG_OUT_Y_L = 0x2A,
65  LIS3DH_REG_OUT_Y_H = 0x2B,
66  LIS3DH_REG_OUT_Z_L = 0x2C,
67  LIS3DH_REG_OUT_Z_H = 0x2D,
68  LIS3DH_REG_FIFO_CTRL_REG = 0x2E,
69  LIS3DH_REG_FIFO_SRC_REG = 0x2F,
70  LIS3DH_REG_INT1_CFG = 0x30,
71  LIS3DH_REG_INT1_SOURCE = 0x31,
72  LIS3DH_REG_INT1_THS = 0x32,
73  LIS3DH_REG_INT1_DURATION = 0x33,
74  LIS3DH_REG_CLICK_CFG = 0x38,
75  LIS3DH_REG_CLICK_SRC = 0x39,
76  LIS3DH_REG_CLICK_THS = 0x3A,
77  LIS3DH_REG_TIME_LIMIT = 0x3B,
78  LIS3DH_REG_TIME_LATENCY = 0x3C,
79  LIS3DH_REG_TIME_WINDOW = 0x3D,
80 } lis3dh_reg_t;
81 
82 /*
83  * Bit offsets within the individual registers
84  * source: LIS3DH datasheet
85  */
86 
100 #define LIS3DH_TEMP_CFG_REG_ADC_PD_MASK (1 << 7)
101 
109 #define LIS3DH_TEMP_CFG_REG_TEMP_EN_MASK (1 << 6)
110 
128 #define LIS3DH_CTRL_REG1_ODR_SHIFT (4)
129 #define LIS3DH_CTRL_REG1_ODR3_MASK (1 << (LIS3DH_CTRL_REG1_ODR_SHIFT + 3))
130 #define LIS3DH_CTRL_REG1_ODR2_MASK (1 << (LIS3DH_CTRL_REG1_ODR_SHIFT + 2))
131 #define LIS3DH_CTRL_REG1_ODR1_MASK (1 << (LIS3DH_CTRL_REG1_ODR_SHIFT + 1))
132 #define LIS3DH_CTRL_REG1_ODR0_MASK (1 << LIS3DH_CTRL_REG1_ODR_SHIFT)
133 
134 #define LIS3DH_CTRL_REG1_ODR_MASK (LIS3DH_CTRL_REG1_ODR3_MASK | \
135  LIS3DH_CTRL_REG1_ODR2_MASK | \
136  LIS3DH_CTRL_REG1_ODR1_MASK | \
137  LIS3DH_CTRL_REG1_ODR0_MASK)
138 
149 #define LIS3DH_CTRL_REG1_LPEN_MASK (1 << 3)
150 
152 #define LIS3DH_CTRL_REG1_ZEN_SHIFT (2)
153 
161 #define LIS3DH_CTRL_REG1_ZEN_MASK (1 << LIS3DH_CTRL_REG1_ZEN_SHIFT)
162 
164 #define LIS3DH_CTRL_REG1_YEN_SHIFT (1)
165 
173 #define LIS3DH_CTRL_REG1_YEN_MASK (1 << LIS3DH_CTRL_REG1_YEN_SHIFT)
174 
176 #define LIS3DH_CTRL_REG1_XEN_SHIFT (0)
177 
185 #define LIS3DH_CTRL_REG1_XEN_MASK (1 << LIS3DH_CTRL_REG1_XEN_SHIFT)
186 
188 #define LIS3DH_CTRL_REG1_XYZEN_SHIFT (0)
189 
190 #define LIS3DH_CTRL_REG1_XYZEN_MASK (LIS3DH_CTRL_REG1_XEN_MASK | \
191  LIS3DH_CTRL_REG1_YEN_MASK | LIS3DH_CTRL_REG1_ZEN_MASK)
192 
199 #define LIS3DH_AXES_X (LIS3DH_CTRL_REG1_XEN_MASK)
200 #define LIS3DH_AXES_Y (LIS3DH_CTRL_REG1_YEN_MASK)
201 #define LIS3DH_AXES_Z (LIS3DH_CTRL_REG1_ZEN_MASK)
205 #define LIS3DH_AXES_XYZ (LIS3DH_CTRL_REG1_XYZEN_MASK)
206 
220 #define LIS3DH_CTRL_REG2_HPM1_MASK (1 << 7)
221 #define LIS3DH_CTRL_REG2_HPM0_MASK (1 << 6)
222 
228 #define LIS3DH_CTRL_REG2_HPCF2_MASK (1 << 5)
229 #define LIS3DH_CTRL_REG2_HPCF1_MASK (1 << 4)
230 
240 #define LIS3DH_CTRL_REG2_FDS_MASK (1 << 3)
241 
248 #define LIS3DH_CTRL_REG2_HPCLICK_MASK (1 << 2)
249 
257 #define LIS3DH_CTRL_REG2_HPIS2_MASK (1 << 1)
258 #define LIS3DH_CTRL_REG2_HPIS1_MASK (1 << 0)
259 
274 #define LIS3DH_CTRL_REG3_I1_CLICK_MASK (1 << 7)
275 
284 #define LIS3DH_CTRL_REG3_I1_AOI1_MASK (1 << 6)
285 
293 #define LIS3DH_CTRL_REG3_I1_AOI2_MASK (1 << 5)
294 
302 #define LIS3DH_CTRL_REG3_I1_DRDY1_MASK (1 << 4)
303 
311 #define LIS3DH_CTRL_REG3_I1_DRDY2_MASK (1 << 3)
312 
320 #define LIS3DH_CTRL_REG3_I1_WTM_MASK (1 << 2)
321 
329 #define LIS3DH_CTRL_REG3_I1_OVERRUN_MASK (1 << 1)
330 
348 #define LIS3DH_CTRL_REG4_BDU_MASK (1 << 7)
349 
350 #define LIS3DH_CTRL_REG4_BDU_ENABLE (LIS3DH_CTRL_REG4_BDU_MASK)
351 
352 #define LIS3DH_CTRL_REG4_BDU_DISABLE (0)
353 
365 #define LIS3DH_CTRL_REG4_BLE_MASK (1 << 6)
366 
368 #define LIS3DH_CTRL_REG4_BLE_LITTLE_ENDIAN (0)
369 
370 #define LIS3DH_CTRL_REG4_BLE_BIG_ENDIAN (LIS3DH_CTRL_REG4_BLE_MASK)
371 
384 #define LIS3DH_CTRL_REG4_FS1_MASK (1 << 5)
385 #define LIS3DH_CTRL_REG4_FS0_MASK (1 << 4)
386 #define LIS3DH_CTRL_REG4_FS_MASK (LIS3DH_CTRL_REG4_FS1_MASK | LIS3DH_CTRL_REG4_FS0_MASK)
387 
393 #define LIS3DH_CTRL_REG4_SCALE_2G (0)
394 #define LIS3DH_CTRL_REG4_SCALE_4G (LIS3DH_CTRL_REG4_FS0_MASK)
395 #define LIS3DH_CTRL_REG4_SCALE_8G (LIS3DH_CTRL_REG4_FS1_MASK)
397 #define LIS3DH_CTRL_REG4_SCALE_16G (LIS3DH_CTRL_REG4_FS1_MASK | LIS3DH_CTRL_REG4_FS0_MASK)
398 
408 #define LIS3DH_CTRL_REG4_HR_MASK (1 << 3)
409 
421 #define LIS3DH_CTRL_REG4_ST1_MASK (1 << 2)
422 #define LIS3DH_CTRL_REG4_ST0_MASK (1 << 1)
423 
433 #define LIS3DH_CTRL_REG4_SIM_MASK (1 << 0)
434 
443 #define LIS3DH_CTRL_REG5_REBOOT_MASK (1 << 7)
444 
453 #define LIS3DH_CTRL_REG5_FIFO_EN_MASK (1 << 6)
454 
466 #define LIS3DH_CTRL_REG5_LIR_I1_MASK (1 << 3)
467 
473 #define LIS3DH_CTRL_REG5_D4D_I1_MASK (1 << 2)
474 
489 #define LIS3DH_STATUS_REG_ZYXOR_MASK (1 << 7)
490 
499 #define LIS3DH_STATUS_REG_ZOR_MASK (1 << 6)
500 
509 #define LIS3DH_STATUS_REG_YOR_MASK (1 << 5)
510 
519 #define LIS3DH_STATUS_REG_XOR_MASK (1 << 4)
520 
529 #define LIS3DH_STATUS_REG_ZYXDA_MASK (1 << 3)
530 
539 #define LIS3DH_STATUS_REG_ZDA_MASK (1 << 2)
540 
549 #define LIS3DH_STATUS_REG_YDA_MASK (1 << 1)
550 
559 #define LIS3DH_STATUS_REG_XDA_MASK (1 << 0)
560 
567 #define LIS3DH_FIFO_CTRL_REG_FM_SHIFT (6)
568 #define LIS3DH_FIFO_CTRL_REG_FM1_MASK (1 << 7)
569 #define LIS3DH_FIFO_CTRL_REG_FM0_MASK (1 << 6)
570 #define LIS3DH_FIFO_CTRL_REG_FM_MASK (LIS3DH_FIFO_CTRL_REG_FM1_MASK | \
571  LIS3DH_FIFO_CTRL_REG_FM0_MASK)
572 
573 #define LIS3DH_FIFO_CTRL_REG_TR_MASK (1 << 5)
574 #define LIS3DH_FIFO_CTRL_REG_FTH4_MASK (1 << 4)
575 #define LIS3DH_FIFO_CTRL_REG_FTH3_MASK (1 << 3)
576 #define LIS3DH_FIFO_CTRL_REG_FTH2_MASK (1 << 2)
577 #define LIS3DH_FIFO_CTRL_REG_FTH1_MASK (1 << 1)
578 #define LIS3DH_FIFO_CTRL_REG_FTH0_MASK (1 << 0)
579 #define LIS3DH_FIFO_CTRL_REG_FTH_SHIFT (0)
580 #define LIS3DH_FIFO_CTRL_REG_FTH_MASK \
581  (LIS3DH_FIFO_CTRL_REG_FTH0_MASK | \
582  LIS3DH_FIFO_CTRL_REG_FTH1_MASK | \
583  LIS3DH_FIFO_CTRL_REG_FTH2_MASK | \
584  LIS3DH_FIFO_CTRL_REG_FTH3_MASK | \
585  LIS3DH_FIFO_CTRL_REG_FTH4_MASK)
586 
592 #define LIS3DH_FIFO_SRC_REG_WTM_MASK (1 << 7)
593 #define LIS3DH_FIFO_SRC_REG_OVRN_FIFO_MASK (1 << 6)
594 #define LIS3DH_FIFO_SRC_REG_EMPTY_MASK (1 << 5)
595 #define LIS3DH_FIFO_SRC_REG_FSS4_MASK (1 << 4)
596 #define LIS3DH_FIFO_SRC_REG_FSS3_MASK (1 << 3)
597 #define LIS3DH_FIFO_SRC_REG_FSS2_MASK (1 << 2)
598 #define LIS3DH_FIFO_SRC_REG_FSS1_MASK (1 << 1)
599 #define LIS3DH_FIFO_SRC_REG_FSS0_MASK (1 << 0)
600 #define LIS3DH_FIFO_SRC_REG_FSS_SHIFT (0)
601 #define LIS3DH_FIFO_SRC_REG_FSS_MASK \
602  (LIS3DH_FIFO_SRC_REG_FSS0_MASK | \
603  LIS3DH_FIFO_SRC_REG_FSS1_MASK | \
604  LIS3DH_FIFO_SRC_REG_FSS2_MASK | \
605  LIS3DH_FIFO_SRC_REG_FSS3_MASK | \
606  LIS3DH_FIFO_SRC_REG_FSS4_MASK)
607 
617 #define LIS3DH_SPI_WRITE_MASK (0 << 7)
618 
621 #define LIS3DH_SPI_READ_MASK (1 << 7)
622 
625 #define LIS3DH_SPI_MULTI_MASK (1 << 6)
626 
629 #define LIS3DH_SPI_SINGLE_MASK (0 << 6)
630 
633 #define LIS3DH_SPI_ADDRESS_MASK (0x3F)
634 
640 #define LIS3DH_ADC_DATA_SIZE (2)
641 
642 
649 #define LIS3DH_ODR_POWERDOWN (0x00 << LIS3DH_CTRL_REG1_ODR_SHIFT)
650 #define LIS3DH_ODR_1Hz (0x01 << LIS3DH_CTRL_REG1_ODR_SHIFT)
651 #define LIS3DH_ODR_10Hz (0x02 << LIS3DH_CTRL_REG1_ODR_SHIFT)
652 #define LIS3DH_ODR_25Hz (0x03 << LIS3DH_CTRL_REG1_ODR_SHIFT)
653 #define LIS3DH_ODR_50Hz (0x04 << LIS3DH_CTRL_REG1_ODR_SHIFT)
654 #define LIS3DH_ODR_100Hz (0x05 << LIS3DH_CTRL_REG1_ODR_SHIFT)
655 #define LIS3DH_ODR_200Hz (0x06 << LIS3DH_CTRL_REG1_ODR_SHIFT)
656 #define LIS3DH_ODR_400Hz (0x07 << LIS3DH_CTRL_REG1_ODR_SHIFT)
657 #define LIS3DH_ODR_LP1600Hz (0x08 << LIS3DH_CTRL_REG1_ODR_SHIFT)
658 /* Normal mode 1250 Hz and Low power mode 5000 Hz share the same setting */
659 #define LIS3DH_ODR_NP1250Hz (0x09 << LIS3DH_CTRL_REG1_ODR_SHIFT)
660 #define LIS3DH_ODR_LP5000HZ (0x09 << LIS3DH_CTRL_REG1_ODR_SHIFT)
661 
670 #define LIS3DH_FIFO_MODE_BYPASS (0x00 << LIS3DH_FIFO_CTRL_REG_FM_SHIFT)
671 
672 #define LIS3DH_FIFO_MODE_FIFO (0x01 << LIS3DH_FIFO_CTRL_REG_FM_SHIFT)
673 
674 #define LIS3DH_FIFO_MODE_STREAM (0x02 << LIS3DH_FIFO_CTRL_REG_FM_SHIFT)
675 
676 #define LIS3DH_FIFO_MODE_STREAM_TO_FIFO (0x03 << LIS3DH_FIFO_CTRL_REG_FM_SHIFT)
677 
682 typedef struct {
685  gpio_t cs;
686  gpio_t int1;
687  gpio_t int2;
688  uint8_t scale;
689  uint8_t odr;
691 
695 typedef struct {
698  gpio_t cs;
699  int16_t scale;
700 } lis3dh_t;
701 
705 typedef struct __attribute__((packed))
706 {
707  int16_t acc_x;
708  int16_t acc_y;
709  int16_t acc_z;
710 } lis3dh_data_t;
711 
712 
722 int lis3dh_init(lis3dh_t *dev, const lis3dh_params_t *params);
723 
733 int lis3dh_read_xyz(const lis3dh_t *dev, lis3dh_data_t *acc_data);
734 
744 int lis3dh_read_aux_adc1(const lis3dh_t *dev, int16_t *out);
745 
755 int lis3dh_read_aux_adc2(const lis3dh_t *dev, int16_t *out);
756 
769 int lis3dh_read_aux_adc3(const lis3dh_t *dev, int16_t *out);
770 
785 int lis3dh_set_aux_adc(const lis3dh_t *dev, const uint8_t enable, const uint8_t temperature);
786 
799 int lis3dh_set_axes(const lis3dh_t *dev, const uint8_t axes);
800 
811 int lis3dh_set_fifo(const lis3dh_t *dev, const uint8_t mode, const uint8_t watermark);
812 
822 int lis3dh_set_odr(const lis3dh_t *dev, const uint8_t odr);
823 
836 int lis3dh_set_scale(lis3dh_t *dev, const uint8_t scale);
837 
849 int lis3dh_set_int1(const lis3dh_t *dev, const uint8_t mode);
850 
859 int lis3dh_get_fifo_level(const lis3dh_t *dev);
860 
861 #ifdef __cplusplus
862 }
863 #endif
864 
865 #endif /* LIS3DH_H */
866 
Device descriptor for LIS3DH sensors.
Definition: lis3dh.h:695
int lis3dh_read_aux_adc1(const lis3dh_t *dev, int16_t *out)
Read auxiliary ADC channel 1 data from the accelerometer.
int lis3dh_init(lis3dh_t *dev, const lis3dh_params_t *params)
Initialize a LIS3DH sensor instance.
Configuration parameters for LIS3DH devices.
Definition: lis3dh.h:682
Result vector for accelerometer measurement.
Definition: lis3dh.h:705
Low-level GPIO peripheral driver interface definitions.
lis3dh_reg_t
LIS3DH hardware register addresses.
Definition: lis3dh.h:43
int16_t scale
Current scale setting of the sensor.
Definition: lis3dh.h:699
spi_t spi
SPI device the sensor is connected to.
Definition: lis3dh.h:696
int16_t acc_y
Acceleration in the Y direction in milli-G.
Definition: lis3dh.h:708
spi_clk_t clk
clock speed of the SPI bus
Definition: lis3dh.h:697
int lis3dh_set_axes(const lis3dh_t *dev, const uint8_t axes)
Enable/disable accelerometer axes.
gpio_t int1
INT1 pin.
Definition: lis3dh.h:686
int lis3dh_read_aux_adc2(const lis3dh_t *dev, int16_t *out)
Read auxiliary ADC channel 2 data from the accelerometer.
int16_t acc_z
Acceleration in the Z direction in milli-G.
Definition: lis3dh.h:709
Low-level SPI peripheral driver interface definition.
uint8_t odr
Default sensor ODR setting: LIS3DH_ODR_xxxHz.
Definition: lis3dh.h:689
int lis3dh_set_scale(lis3dh_t *dev, const uint8_t scale)
Set the full scale range of the sensor.
gpio_t int2
INT2 (DRDY) pin.
Definition: lis3dh.h:687
gpio_t cs
Chip select pin.
Definition: lis3dh.h:685
int lis3dh_set_odr(const lis3dh_t *dev, const uint8_t odr)
Set the output data rate of the sensor.
int lis3dh_set_aux_adc(const lis3dh_t *dev, const uint8_t enable, const uint8_t temperature)
Turn on/off power to the auxiliary ADC in LIS3DH.
int lis3dh_read_xyz(const lis3dh_t *dev, lis3dh_data_t *acc_data)
Read 3D acceleration data from the accelerometer.
int lis3dh_get_fifo_level(const lis3dh_t *dev)
Get the current number of elements in the FIFO.
int lis3dh_read_aux_adc3(const lis3dh_t *dev, int16_t *out)
Read auxiliary ADC channel 3 data from the accelerometer.
uint8_t scale
Default sensor scale: 2, 4, 8, or 16 (G)
Definition: lis3dh.h:688
spi_t spi
SPI device the sensor is connected to.
Definition: lis3dh.h:683
int16_t acc_x
Acceleration in the X direction in milli-G.
Definition: lis3dh.h:707
int lis3dh_set_fifo(const lis3dh_t *dev, const uint8_t mode, const uint8_t watermark)
Enable/disable the FIFO.
int lis3dh_set_int1(const lis3dh_t *dev, const uint8_t mode)
Set INT1 pin function.
gpio_t cs
Chip select pin.
Definition: lis3dh.h:698
unsigned int spi_t
Default type for SPI devices.
Definition: spi.h:105
spi_clk_t clk
designated clock speed of the SPI bus
Definition: lis3dh.h:684