lis3dh.h
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1 /*
2  * Copyright (C) 2015 Eistec AB
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser
5  * General Public License v2.1. See the file LICENSE in the top level
6  * directory for more details.
7  */
8 
22 #ifndef LIS3DH_H
23 #define LIS3DH_H
24 
25 #include <stdint.h>
26 
27 #include "periph/spi.h"
28 #include "periph/gpio.h"
29 
30 #ifdef __cplusplus
31 extern "C" {
32 #endif
33 
40 #define LIS3DH_WHO_AM_I_RESPONSE (0x33)
41 
46 #define LIS3DH_REG_STATUS_AUX (0x07)
47 #define LIS3DH_REG_OUT_AUX_ADC1_L (0x08)
48 #define LIS3DH_REG_OUT_AUX_ADC1_H (0x09)
49 #define LIS3DH_REG_OUT_AUX_ADC2_L (0x0A)
50 #define LIS3DH_REG_OUT_AUX_ADC2_H (0x0B)
51 #define LIS3DH_REG_OUT_AUX_ADC3_L (0x0C)
52 #define LIS3DH_REG_OUT_AUX_ADC3_H (0x0D)
53 #define LIS3DH_REG_INT_COUNTER_REG (0x0E)
54 #define LIS3DH_REG_WHO_AM_I (0x0F)
55 #define LIS3DH_REG_TEMP_CFG_REG (0x1F)
56 #define LIS3DH_REG_CTRL_REG1 (0x20)
57 #define LIS3DH_REG_CTRL_REG2 (0x21)
58 #define LIS3DH_REG_CTRL_REG3 (0x22)
59 #define LIS3DH_REG_CTRL_REG4 (0x23)
60 #define LIS3DH_REG_CTRL_REG5 (0x24)
61 #define LIS3DH_REG_CTRL_REG6 (0x25)
62 #define LIS3DH_REG_REFERENCE (0x26)
63 #define LIS3DH_REG_STATUS_REG (0x27)
64 #define LIS3DH_REG_OUT_X_L (0x28)
65 #define LIS3DH_REG_OUT_X_H (0x29)
66 #define LIS3DH_REG_OUT_Y_L (0x2A)
67 #define LIS3DH_REG_OUT_Y_H (0x2B)
68 #define LIS3DH_REG_OUT_Z_L (0x2C)
69 #define LIS3DH_REG_OUT_Z_H (0x2D)
70 #define LIS3DH_REG_FIFO_CTRL_REG (0x2E)
71 #define LIS3DH_REG_FIFO_SRC_REG (0x2F)
72 #define LIS3DH_REG_INT1_CFG (0x30)
73 #define LIS3DH_REG_INT1_SOURCE (0x31)
74 #define LIS3DH_REG_INT1_THS (0x32)
75 #define LIS3DH_REG_INT1_DURATION (0x33)
76 #define LIS3DH_REG_CLICK_CFG (0x38)
77 #define LIS3DH_REG_CLICK_SRC (0x39)
78 #define LIS3DH_REG_CLICK_THS (0x3A)
79 #define LIS3DH_REG_TIME_LIMIT (0x3B)
80 #define LIS3DH_REG_TIME_LATENCY (0x3C)
81 #define LIS3DH_REG_TIME_WINDOW (0x3D)
82 
84 /*
85  * Bit offsets within the individual registers
86  * source: LIS3DH datasheet
87  */
88 
100 #define LIS3DH_TEMP_CFG_REG_ADC_PD_MASK (1 << 7)
101 
108 #define LIS3DH_TEMP_CFG_REG_TEMP_EN_MASK (1 << 6)
109  /* TEMP_CFG_REG bitfield macros */
110 
118 #define LIS3DH_CTRL_REG1_ODR_SHIFT (4)
119 
122 #define LIS3DH_CTRL_REG1_ODR3_MASK (1 << (LIS3DH_CTRL_REG1_ODR_SHIFT + 3))
123 
126 #define LIS3DH_CTRL_REG1_ODR2_MASK (1 << (LIS3DH_CTRL_REG1_ODR_SHIFT + 2))
127 
130 #define LIS3DH_CTRL_REG1_ODR1_MASK (1 << (LIS3DH_CTRL_REG1_ODR_SHIFT + 1))
131 
134 #define LIS3DH_CTRL_REG1_ODR0_MASK (1 << LIS3DH_CTRL_REG1_ODR_SHIFT)
135 
144 #define LIS3DH_CTRL_REG1_ODR_MASK (LIS3DH_CTRL_REG1_ODR3_MASK | \
145  LIS3DH_CTRL_REG1_ODR2_MASK | \
146  LIS3DH_CTRL_REG1_ODR1_MASK | \
147  LIS3DH_CTRL_REG1_ODR0_MASK)
148 
156 #define LIS3DH_CTRL_REG1_LPEN_MASK (1 << 3)
157 
160 #define LIS3DH_CTRL_REG1_ZEN_SHIFT (2)
161 
169 #define LIS3DH_CTRL_REG1_ZEN_MASK (1 << LIS3DH_CTRL_REG1_ZEN_SHIFT)
170 
173 #define LIS3DH_CTRL_REG1_YEN_SHIFT (1)
174 
182 #define LIS3DH_CTRL_REG1_YEN_MASK (1 << LIS3DH_CTRL_REG1_YEN_SHIFT)
183 
186 #define LIS3DH_CTRL_REG1_XEN_SHIFT (0)
187 
195 #define LIS3DH_CTRL_REG1_XEN_MASK (1 << LIS3DH_CTRL_REG1_XEN_SHIFT)
196 
199 #define LIS3DH_CTRL_REG1_XYZEN_SHIFT (0)
200 
203 #define LIS3DH_CTRL_REG1_XYZEN_MASK (LIS3DH_CTRL_REG1_XEN_MASK | \
204  LIS3DH_CTRL_REG1_YEN_MASK | LIS3DH_CTRL_REG1_ZEN_MASK)
205 
209 #define LIS3DH_AXES_X (LIS3DH_CTRL_REG1_XEN_MASK)
210 
213 #define LIS3DH_AXES_Y (LIS3DH_CTRL_REG1_YEN_MASK)
214 
217 #define LIS3DH_AXES_Z (LIS3DH_CTRL_REG1_ZEN_MASK)
218  /* CTRL_REG1 bitfield macros */
219 
223 #define LIS3DH_AXES_XYZ (LIS3DH_CTRL_REG1_XYZEN_MASK)
224 
236 #define LIS3DH_CTRL_REG2_HPM1_MASK (1 << 7)
237 
244 #define LIS3DH_CTRL_REG2_HPM0_MASK (1 << 6)
245 
248 #define LIS3DH_CTRL_REG2_HPCF2_MASK (1 << 5)
249 
252 #define LIS3DH_CTRL_REG2_HPCF1_MASK (1 << 4)
253 
261 #define LIS3DH_CTRL_REG2_FDS_MASK (1 << 3)
262 
268 #define LIS3DH_CTRL_REG2_HPCLICK_MASK (1 << 2)
269 
275 #define LIS3DH_CTRL_REG2_HPIS2_MASK (1 << 1)
276 
282 #define LIS3DH_CTRL_REG2_HPIS1_MASK (1 << 0)
283  /* CTRL_REG2 bitfield macros */
284 
297 #define LIS3DH_CTRL_REG3_I1_CLICK_MASK (1 << 7)
298 
306 #define LIS3DH_CTRL_REG3_I1_AOI1_MASK (1 << 6)
307 
315 #define LIS3DH_CTRL_REG3_I1_AOI2_MASK (1 << 5)
316 
324 #define LIS3DH_CTRL_REG3_I1_DRDY1_MASK (1 << 4)
325 
333 #define LIS3DH_CTRL_REG3_I1_DRDY2_MASK (1 << 3)
334 
342 #define LIS3DH_CTRL_REG3_I1_WTM_MASK (1 << 2)
343 
351 #define LIS3DH_CTRL_REG3_I1_OVERRUN_MASK (1 << 1)
352  /* CTRL_REG3 bitfield macros */
353 
366 #define LIS3DH_CTRL_REG4_BDU_MASK (1 << 7)
367 
370 #define LIS3DH_CTRL_REG4_BDU_ENABLE (LIS3DH_CTRL_REG4_BDU_MASK)
371 
374 #define LIS3DH_CTRL_REG4_BDU_DISABLE (0)
375 
383 #define LIS3DH_CTRL_REG4_BLE_MASK (1 << 6)
384 
387 #define LIS3DH_CTRL_REG4_BLE_LITTLE_ENDIAN (0)
388 
391 #define LIS3DH_CTRL_REG4_BLE_BIG_ENDIAN (LIS3DH_CTRL_REG4_BLE_MASK)
392 
395 #define LIS3DH_CTRL_REG4_FS1_MASK (1 << 5)
396 
399 #define LIS3DH_CTRL_REG4_FS0_MASK (1 << 4)
400 
403 #define LIS3DH_CTRL_REG4_FS_MASK (LIS3DH_CTRL_REG4_FS1_MASK | \
404  LIS3DH_CTRL_REG4_FS0_MASK)
405 
408 #define LIS3DH_CTRL_REG4_SCALE_2G (0)
409 
412 #define LIS3DH_CTRL_REG4_SCALE_4G (LIS3DH_CTRL_REG4_FS0_MASK)
413 
416 #define LIS3DH_CTRL_REG4_SCALE_8G (LIS3DH_CTRL_REG4_FS1_MASK)
417 
420 #define LIS3DH_CTRL_REG4_SCALE_16G (LIS3DH_CTRL_REG4_FS1_MASK | LIS3DH_CTRL_REG4_FS0_MASK)
421 
429 #define LIS3DH_CTRL_REG4_HR_MASK (1 << 3)
430 
440 #define LIS3DH_CTRL_REG4_ST1_MASK (1 << 2)
441 
444 #define LIS3DH_CTRL_REG4_ST0_MASK (1 << 1)
445 
453 #define LIS3DH_CTRL_REG4_SIM_MASK (1 << 0)
454 
462 #define LIS3DH_CTRL_REG5_REBOOT_MASK (1 << 7)
463 
471 #define LIS3DH_CTRL_REG5_FIFO_EN_MASK (1 << 6)
472 
483 #define LIS3DH_CTRL_REG5_LIR_I1_MASK (1 << 3)
484 
489 #define LIS3DH_CTRL_REG5_D4D_I1_MASK (1 << 2)
490  /* CTRL_REG4 bitfield macros */
491 
504 #define LIS3DH_STATUS_REG_ZYXOR_MASK (1 << 7)
505 
513 #define LIS3DH_STATUS_REG_ZOR_MASK (1 << 6)
514 
522 #define LIS3DH_STATUS_REG_YOR_MASK (1 << 5)
523 
531 #define LIS3DH_STATUS_REG_XOR_MASK (1 << 4)
532 
540 #define LIS3DH_STATUS_REG_ZYXDA_MASK (1 << 3)
541 
549 #define LIS3DH_STATUS_REG_ZDA_MASK (1 << 2)
550 
558 #define LIS3DH_STATUS_REG_YDA_MASK (1 << 1)
559 
567 #define LIS3DH_STATUS_REG_XDA_MASK (1 << 0)
568  /* STATUS_REG bitfield macros */
569 
574 #define LIS3DH_FIFO_CTRL_REG_FM_SHIFT (6)
575 #define LIS3DH_FIFO_CTRL_REG_FM1_MASK (1 << 7)
576 #define LIS3DH_FIFO_CTRL_REG_FM0_MASK (1 << 6)
577 #define LIS3DH_FIFO_CTRL_REG_FM_MASK (LIS3DH_FIFO_CTRL_REG_FM1_MASK | \
578  LIS3DH_FIFO_CTRL_REG_FM0_MASK)
579 #define LIS3DH_FIFO_CTRL_REG_TR_MASK (1 << 5)
580 #define LIS3DH_FIFO_CTRL_REG_FTH4_MASK (1 << 4)
581 #define LIS3DH_FIFO_CTRL_REG_FTH3_MASK (1 << 3)
582 #define LIS3DH_FIFO_CTRL_REG_FTH2_MASK (1 << 2)
583 #define LIS3DH_FIFO_CTRL_REG_FTH1_MASK (1 << 1)
584 #define LIS3DH_FIFO_CTRL_REG_FTH0_MASK (1 << 0)
585 #define LIS3DH_FIFO_CTRL_REG_FTH_SHIFT (0)
586 #define LIS3DH_FIFO_CTRL_REG_FTH_MASK (LIS3DH_FIFO_CTRL_REG_FTH0_MASK | \
587  LIS3DH_FIFO_CTRL_REG_FTH1_MASK | \
588  LIS3DH_FIFO_CTRL_REG_FTH2_MASK | \
589  LIS3DH_FIFO_CTRL_REG_FTH3_MASK | \
590  LIS3DH_FIFO_CTRL_REG_FTH4_MASK)
591  /* FIFO_CTRL_REG bitfield macros */
592 
597 #define LIS3DH_FIFO_SRC_REG_WTM_MASK (1 << 7)
598 #define LIS3DH_FIFO_SRC_REG_OVRN_FIFO_MASK (1 << 6)
599 #define LIS3DH_FIFO_SRC_REG_EMPTY_MASK (1 << 5)
600 #define LIS3DH_FIFO_SRC_REG_FSS4_MASK (1 << 4)
601 #define LIS3DH_FIFO_SRC_REG_FSS3_MASK (1 << 3)
602 #define LIS3DH_FIFO_SRC_REG_FSS2_MASK (1 << 2)
603 #define LIS3DH_FIFO_SRC_REG_FSS1_MASK (1 << 1)
604 #define LIS3DH_FIFO_SRC_REG_FSS0_MASK (1 << 0)
605 #define LIS3DH_FIFO_SRC_REG_FSS_SHIFT (0)
606 #define LIS3DH_FIFO_SRC_REG_FSS_MASK (LIS3DH_FIFO_SRC_REG_FSS0_MASK | \
607  LIS3DH_FIFO_SRC_REG_FSS1_MASK | \
608  LIS3DH_FIFO_SRC_REG_FSS2_MASK | \
609  LIS3DH_FIFO_SRC_REG_FSS3_MASK | \
610  LIS3DH_FIFO_SRC_REG_FSS4_MASK)
611  /* FIFO_CTRL_REG bitfield macros */
612 
620 #define LIS3DH_SPI_WRITE_MASK (0 << 7)
621 
624 #define LIS3DH_SPI_READ_MASK (1 << 7)
625 
628 #define LIS3DH_SPI_MULTI_MASK (1 << 6)
629 
632 #define LIS3DH_SPI_SINGLE_MASK (0 << 6)
633 
636 #define LIS3DH_SPI_ADDRESS_MASK (0x3F)
637  /* Register address bitfield macros */
638 
642 #define LIS3DH_ADC_DATA_SIZE (2U)
643 
653 #define LIS3DH_FIFO_MODE_BYPASS (0x00 << LIS3DH_FIFO_CTRL_REG_FM_SHIFT)
654 
657 #define LIS3DH_FIFO_MODE_FIFO (0x01 << LIS3DH_FIFO_CTRL_REG_FM_SHIFT)
658 
661 #define LIS3DH_FIFO_MODE_STREAM (0x02 << LIS3DH_FIFO_CTRL_REG_FM_SHIFT)
662 
665 #define LIS3DH_FIFO_MODE_STREAM_TO_FIFO (0x03 << LIS3DH_FIFO_CTRL_REG_FM_SHIFT)
666 
677 #define LIS3DH_ODR_POWERDOWN (0x00 << LIS3DH_CTRL_REG1_ODR_SHIFT)
678 
681 #define LIS3DH_ODR_1Hz (0x01 << LIS3DH_CTRL_REG1_ODR_SHIFT)
682 
685 #define LIS3DH_ODR_10Hz (0x02 << LIS3DH_CTRL_REG1_ODR_SHIFT)
686 
689 #define LIS3DH_ODR_25Hz (0x03 << LIS3DH_CTRL_REG1_ODR_SHIFT)
690 
693 #define LIS3DH_ODR_50Hz (0x04 << LIS3DH_CTRL_REG1_ODR_SHIFT)
694 
697 #define LIS3DH_ODR_100Hz (0x05 << LIS3DH_CTRL_REG1_ODR_SHIFT)
698 
701 #define LIS3DH_ODR_200Hz (0x06 << LIS3DH_CTRL_REG1_ODR_SHIFT)
702 
705 #define LIS3DH_ODR_400Hz (0x07 << LIS3DH_CTRL_REG1_ODR_SHIFT)
706 
709 #define LIS3DH_ODR_LP1600Hz (0x08 << LIS3DH_CTRL_REG1_ODR_SHIFT)
710 
714 #define LIS3DH_ODR_NP1250Hz (0x09 << LIS3DH_CTRL_REG1_ODR_SHIFT)
715 
719 #define LIS3DH_ODR_LP5000HZ (0x09 << LIS3DH_CTRL_REG1_ODR_SHIFT)
720 
725 typedef struct {
728  gpio_t cs;
729  gpio_t int1;
730  gpio_t int2;
731  uint8_t scale;
732  uint8_t odr;
734 
738 typedef struct {
741  gpio_t cs;
742  int16_t scale;
743 } lis3dh_t;
744 
748 typedef struct __attribute__((packed))
749 {
750  int16_t acc_x;
751  int16_t acc_y;
752  int16_t acc_z;
753 } lis3dh_data_t;
754 
764 int lis3dh_init(lis3dh_t *dev, const lis3dh_params_t *params);
765 
775 int lis3dh_read_xyz(const lis3dh_t *dev, lis3dh_data_t *acc_data);
776 
786 int lis3dh_read_aux_adc1(const lis3dh_t *dev, int16_t *out);
787 
797 int lis3dh_read_aux_adc2(const lis3dh_t *dev, int16_t *out);
798 
811 int lis3dh_read_aux_adc3(const lis3dh_t *dev, int16_t *out);
812 
827 int lis3dh_set_aux_adc(const lis3dh_t *dev, const uint8_t enable, const uint8_t temperature);
828 
841 int lis3dh_set_axes(const lis3dh_t *dev, const uint8_t axes);
842 
853 int lis3dh_set_fifo(const lis3dh_t *dev, const uint8_t mode, const uint8_t watermark);
854 
864 int lis3dh_set_odr(const lis3dh_t *dev, const uint8_t odr);
865 
878 int lis3dh_set_scale(lis3dh_t *dev, const uint8_t scale);
879 
891 int lis3dh_set_int1(const lis3dh_t *dev, const uint8_t mode);
892 
901 int lis3dh_get_fifo_level(const lis3dh_t *dev);
902 
903 #ifdef __cplusplus
904 }
905 #endif
906 
907 #endif /* LIS3DH_H */
908 
int lis3dh_read_aux_adc3(const lis3dh_t *dev, int16_t *out)
Read auxiliary ADC channel 3 data from the accelerometer.
Device descriptor for LIS3DH sensors.
Definition: lis3dh.h:738
int lis3dh_set_fifo(const lis3dh_t *dev, const uint8_t mode, const uint8_t watermark)
Enable/disable the FIFO.
Configuration parameters for LIS3DH devices.
Definition: lis3dh.h:725
int lis3dh_read_aux_adc1(const lis3dh_t *dev, int16_t *out)
Read auxiliary ADC channel 1 data from the accelerometer.
Result vector for accelerometer measurement.
Definition: lis3dh.h:748
Low-level GPIO peripheral driver interface definitions.
int lis3dh_get_fifo_level(const lis3dh_t *dev)
Get the current number of elements in the FIFO.
int16_t scale
Current scale setting of the sensor.
Definition: lis3dh.h:742
spi_t spi
SPI device the sensor is connected to.
Definition: lis3dh.h:739
int16_t acc_y
Acceleration in the Y direction in milli-G.
Definition: lis3dh.h:751
spi_clk_t clk
clock speed of the SPI bus
Definition: lis3dh.h:740
gpio_t int1
INT1 pin.
Definition: lis3dh.h:729
int lis3dh_set_axes(const lis3dh_t *dev, const uint8_t axes)
Enable/disable accelerometer axes.
int16_t acc_z
Acceleration in the Z direction in milli-G.
Definition: lis3dh.h:752
Low-level SPI peripheral driver interface definition.
int lis3dh_set_scale(lis3dh_t *dev, const uint8_t scale)
Set the full scale range of the sensor.
uint8_t odr
Default sensor ODR setting: LIS3DH_ODR_xxxHz.
Definition: lis3dh.h:732
gpio_t int2
INT2 (DRDY) pin.
Definition: lis3dh.h:730
gpio_t cs
Chip select pin.
Definition: lis3dh.h:728
int lis3dh_read_aux_adc2(const lis3dh_t *dev, int16_t *out)
Read auxiliary ADC channel 2 data from the accelerometer.
int lis3dh_set_int1(const lis3dh_t *dev, const uint8_t mode)
Set INT1 pin function.
int lis3dh_init(lis3dh_t *dev, const lis3dh_params_t *params)
Initialize a LIS3DH sensor instance.
uint8_t scale
Default sensor scale: 2, 4, 8, or 16 (G)
Definition: lis3dh.h:731
int lis3dh_set_aux_adc(const lis3dh_t *dev, const uint8_t enable, const uint8_t temperature)
Turn on/off power to the auxiliary ADC in LIS3DH.
spi_t spi
SPI device the sensor is connected to.
Definition: lis3dh.h:726
int16_t acc_x
Acceleration in the X direction in milli-G.
Definition: lis3dh.h:750
int lis3dh_set_odr(const lis3dh_t *dev, const uint8_t odr)
Set the output data rate of the sensor.
int lis3dh_read_xyz(const lis3dh_t *dev, lis3dh_data_t *acc_data)
Read 3D acceleration data from the accelerometer.
gpio_t cs
Chip select pin.
Definition: lis3dh.h:741
unsigned int spi_t
Default type for SPI devices.
Definition: spi.h:105
spi_clk_t clk
designated clock speed of the SPI bus
Definition: lis3dh.h:727