LIS3DH accelerometer

Device driver for the LIS3DH accelerometer. More...

Detailed Description

Device driver for the LIS3DH accelerometer.

Files

file  lis3dh.h
 Device driver interface for the LIS3DH accelerometer.
 

Data Structures

struct  lis3dh_params_t
 Configuration parameters for LIS3DH devices. More...
 
struct  lis3dh_t
 Device descriptor for LIS3DH sensors. More...
 
struct  lis3dh_data_t
 Result vector for accelerometer measurement. More...
 

Macros

#define LIS3DH_WHO_AM_I_RESPONSE   (0x33)
 Identifier register value. More...
 
#define LIS3DH_AXES_XYZ   (LIS3DH_CTRL_REG1_XYZEN_MASK)
 Convenience macro for enabling all axes.
 
#define LIS3DH_ADC_DATA_SIZE   (2U)
 Length of scalar measurement data in bytes.
 

Functions

int lis3dh_init (lis3dh_t *dev, const lis3dh_params_t *params)
 Initialize a LIS3DH sensor instance. More...
 
int lis3dh_read_xyz (const lis3dh_t *dev, lis3dh_data_t *acc_data)
 Read 3D acceleration data from the accelerometer. More...
 
int lis3dh_read_aux_adc1 (const lis3dh_t *dev, int16_t *out)
 Read auxiliary ADC channel 1 data from the accelerometer. More...
 
int lis3dh_read_aux_adc2 (const lis3dh_t *dev, int16_t *out)
 Read auxiliary ADC channel 2 data from the accelerometer. More...
 
int lis3dh_read_aux_adc3 (const lis3dh_t *dev, int16_t *out)
 Read auxiliary ADC channel 3 data from the accelerometer. More...
 
int lis3dh_set_aux_adc (const lis3dh_t *dev, const uint8_t enable, const uint8_t temperature)
 Turn on/off power to the auxiliary ADC in LIS3DH. More...
 
int lis3dh_set_axes (const lis3dh_t *dev, const uint8_t axes)
 Enable/disable accelerometer axes. More...
 
int lis3dh_set_fifo (const lis3dh_t *dev, const uint8_t mode, const uint8_t watermark)
 Enable/disable the FIFO. More...
 
int lis3dh_set_odr (const lis3dh_t *dev, const uint8_t odr)
 Set the output data rate of the sensor. More...
 
int lis3dh_set_scale (lis3dh_t *dev, const uint8_t scale)
 Set the full scale range of the sensor. More...
 
int lis3dh_set_int1 (const lis3dh_t *dev, const uint8_t mode)
 Set INT1 pin function. More...
 
int lis3dh_get_fifo_level (const lis3dh_t *dev)
 Get the current number of elements in the FIFO. More...
 

LIS3DH hardware register addresses

#define LIS3DH_REG_STATUS_AUX   (0x07)
 
#define LIS3DH_REG_OUT_AUX_ADC1_L   (0x08)
 
#define LIS3DH_REG_OUT_AUX_ADC1_H   (0x09)
 
#define LIS3DH_REG_OUT_AUX_ADC2_L   (0x0A)
 
#define LIS3DH_REG_OUT_AUX_ADC2_H   (0x0B)
 
#define LIS3DH_REG_OUT_AUX_ADC3_L   (0x0C)
 
#define LIS3DH_REG_OUT_AUX_ADC3_H   (0x0D)
 
#define LIS3DH_REG_INT_COUNTER_REG   (0x0E)
 
#define LIS3DH_REG_WHO_AM_I   (0x0F)
 
#define LIS3DH_REG_TEMP_CFG_REG   (0x1F)
 
#define LIS3DH_REG_CTRL_REG1   (0x20)
 
#define LIS3DH_REG_CTRL_REG2   (0x21)
 
#define LIS3DH_REG_CTRL_REG3   (0x22)
 
#define LIS3DH_REG_CTRL_REG4   (0x23)
 
#define LIS3DH_REG_CTRL_REG5   (0x24)
 
#define LIS3DH_REG_CTRL_REG6   (0x25)
 
#define LIS3DH_REG_REFERENCE   (0x26)
 
#define LIS3DH_REG_STATUS_REG   (0x27)
 
#define LIS3DH_REG_OUT_X_L   (0x28)
 
#define LIS3DH_REG_OUT_X_H   (0x29)
 
#define LIS3DH_REG_OUT_Y_L   (0x2A)
 
#define LIS3DH_REG_OUT_Y_H   (0x2B)
 
#define LIS3DH_REG_OUT_Z_L   (0x2C)
 
#define LIS3DH_REG_OUT_Z_H   (0x2D)
 
#define LIS3DH_REG_FIFO_CTRL_REG   (0x2E)
 
#define LIS3DH_REG_FIFO_SRC_REG   (0x2F)
 
#define LIS3DH_REG_INT1_CFG   (0x30)
 
#define LIS3DH_REG_INT1_SOURCE   (0x31)
 
#define LIS3DH_REG_INT1_THS   (0x32)
 
#define LIS3DH_REG_INT1_DURATION   (0x33)
 
#define LIS3DH_REG_CLICK_CFG   (0x38)
 
#define LIS3DH_REG_CLICK_SRC   (0x39)
 
#define LIS3DH_REG_CLICK_THS   (0x3A)
 
#define LIS3DH_REG_TIME_LIMIT   (0x3B)
 
#define LIS3DH_REG_TIME_LATENCY   (0x3C)
 
#define LIS3DH_REG_TIME_WINDOW   (0x3D)
 

TEMP_CFG_REG bitfield macros

#define LIS3DH_TEMP_CFG_REG_ADC_PD_MASK   (1 << 7)
 ADC enable. More...
 
#define LIS3DH_TEMP_CFG_REG_TEMP_EN_MASK   (1 << 6)
 Temperature sensor (T) enable. More...
 

CTRL_REG1 bitfield macros

#define LIS3DH_CTRL_REG1_ODR_SHIFT   (4)
 ODR global shift.
 
#define LIS3DH_CTRL_REG1_ODR3_MASK   (1 << (LIS3DH_CTRL_REG1_ODR_SHIFT + 3))
 ODR fourth bit mask.
 
#define LIS3DH_CTRL_REG1_ODR2_MASK   (1 << (LIS3DH_CTRL_REG1_ODR_SHIFT + 2))
 ODR third bit mask.
 
#define LIS3DH_CTRL_REG1_ODR1_MASK   (1 << (LIS3DH_CTRL_REG1_ODR_SHIFT + 1))
 ODR second bit mask.
 
#define LIS3DH_CTRL_REG1_ODR0_MASK   (1 << LIS3DH_CTRL_REG1_ODR_SHIFT)
 ODR first bit mask.
 
#define LIS3DH_CTRL_REG1_ODR_MASK
 Output data rate (ODR) selection bitfield. More...
 
#define LIS3DH_CTRL_REG1_LPEN_MASK   (1 << 3)
 Low power mode enable. More...
 
#define LIS3DH_CTRL_REG1_ZEN_SHIFT   (2)
 Z enable bit offset.
 
#define LIS3DH_CTRL_REG1_ZEN_MASK   (1 << LIS3DH_CTRL_REG1_ZEN_SHIFT)
 Z axis enable. More...
 
#define LIS3DH_CTRL_REG1_YEN_SHIFT   (1)
 Y enable bit offset.
 
#define LIS3DH_CTRL_REG1_YEN_MASK   (1 << LIS3DH_CTRL_REG1_YEN_SHIFT)
 Y axis enable. More...
 
#define LIS3DH_CTRL_REG1_XEN_SHIFT   (0)
 X enable bit offset.
 
#define LIS3DH_CTRL_REG1_XEN_MASK   (1 << LIS3DH_CTRL_REG1_XEN_SHIFT)
 X axis enable. More...
 
#define LIS3DH_CTRL_REG1_XYZEN_SHIFT   (0)
 XYZ enable bitfield offset.
 
#define LIS3DH_CTRL_REG1_XYZEN_MASK
 X, Y, Z enable bitfield mask. More...
 
#define LIS3DH_AXES_X   (LIS3DH_CTRL_REG1_XEN_MASK)
 enable X axis (Use when calling lis3dh_set_axes())
 
#define LIS3DH_AXES_Y   (LIS3DH_CTRL_REG1_YEN_MASK)
 enable Y axis (Use when calling lis3dh_set_axes())
 
#define LIS3DH_AXES_Z   (LIS3DH_CTRL_REG1_ZEN_MASK)
 enable Z axis (Use when calling lis3dh_set_axes())
 

CTRL_REG2 bitfield macros

#define LIS3DH_CTRL_REG2_HPM1_MASK   (1 << 7)
 High pass filter mode selection second bit. More...
 
#define LIS3DH_CTRL_REG2_HPM0_MASK   (1 << 6)
 High pass filter mode selection first bit. More...
 
#define LIS3DH_CTRL_REG2_HPCF2_MASK   (1 << 5)
 High pass filter cut off frequency selection second bit.
 
#define LIS3DH_CTRL_REG2_HPCF1_MASK   (1 << 4)
 High pass filter cut off frequency selection second bit.
 
#define LIS3DH_CTRL_REG2_FDS_MASK   (1 << 3)
 Filtered data selection. More...
 
#define LIS3DH_CTRL_REG2_HPCLICK_MASK   (1 << 2)
 High pass filter enabled for CLICK function. More...
 
#define LIS3DH_CTRL_REG2_HPIS2_MASK   (1 << 1)
 High pass filter enabled for AOI function on interrupt 2, second bit. More...
 
#define LIS3DH_CTRL_REG2_HPIS1_MASK   (1 << 0)
 High pass filter enabled for AOI function on interrupt 2, first bit. More...
 

CTRL_REG3 bitfield macros

#define LIS3DH_CTRL_REG3_I1_CLICK_MASK   (1 << 7)
 CLICK interrupt on INT1. More...
 
#define LIS3DH_CTRL_REG3_I1_AOI1_MASK   (1 << 6)
 AOI1 interrupt on INT1. More...
 
#define LIS3DH_CTRL_REG3_I1_AOI2_MASK   (1 << 5)
 AOI2 interrupt on INT1. More...
 
#define LIS3DH_CTRL_REG3_I1_DRDY1_MASK   (1 << 4)
 DRDY1 interrupt on INT1. More...
 
#define LIS3DH_CTRL_REG3_I1_DRDY2_MASK   (1 << 3)
 DRDY2 interrupt on INT1. More...
 
#define LIS3DH_CTRL_REG3_I1_WTM_MASK   (1 << 2)
 FIFO Watermark interrupt on INT1. More...
 
#define LIS3DH_CTRL_REG3_I1_OVERRUN_MASK   (1 << 1)
 FIFO Overrun interrupt on INT1. More...
 

CTRL_REG4 bitfield macros

#define LIS3DH_CTRL_REG4_BDU_MASK   (1 << 7)
 Block data update (BDU) bit mask. More...
 
#define LIS3DH_CTRL_REG4_BDU_ENABLE   (LIS3DH_CTRL_REG4_BDU_MASK)
 Block data update (BDU) enable.
 
#define LIS3DH_CTRL_REG4_BDU_DISABLE   (0)
 Block data update (BDU) disable.
 
#define LIS3DH_CTRL_REG4_BLE_MASK   (1 << 6)
 Big/little endian bit mask. More...
 
#define LIS3DH_CTRL_REG4_BLE_LITTLE_ENDIAN   (0)
 Big/little endian little endian mode.
 
#define LIS3DH_CTRL_REG4_BLE_BIG_ENDIAN   (LIS3DH_CTRL_REG4_BLE_MASK)
 Big/little endian big endian mode.
 
#define LIS3DH_CTRL_REG4_FS1_MASK   (1 << 5)
 Full scale selection mask second bit.
 
#define LIS3DH_CTRL_REG4_FS0_MASK   (1 << 4)
 Full scale selection mask first bit.
 
#define LIS3DH_CTRL_REG4_FS_MASK
 Full scale selection mask. More...
 
#define LIS3DH_CTRL_REG4_SCALE_2G   (0)
 Scale register value: +/- 2G.
 
#define LIS3DH_CTRL_REG4_SCALE_4G   (LIS3DH_CTRL_REG4_FS0_MASK)
 Scale register value: +/- 4G.
 
#define LIS3DH_CTRL_REG4_SCALE_8G   (LIS3DH_CTRL_REG4_FS1_MASK)
 Scale register value: +/- 8G.
 
#define LIS3DH_CTRL_REG4_SCALE_16G   (LIS3DH_CTRL_REG4_FS1_MASK | LIS3DH_CTRL_REG4_FS0_MASK)
 Scale: +/- 16G.
 
#define LIS3DH_CTRL_REG4_HR_MASK   (1 << 3)
 High resolution output mode. More...
 
#define LIS3DH_CTRL_REG4_ST1_MASK   (1 << 2)
 Self test enable second bit mask. More...
 
#define LIS3DH_CTRL_REG4_ST0_MASK   (1 << 1)
 Self test enable first bit mask.
 
#define LIS3DH_CTRL_REG4_SIM_MASK   (1 << 0)
 SPI serial interface mode selection. More...
 
#define LIS3DH_CTRL_REG5_REBOOT_MASK   (1 << 7)
 Reboot memory content. More...
 
#define LIS3DH_CTRL_REG5_FIFO_EN_MASK   (1 << 6)
 FIFO enable. More...
 
#define LIS3DH_CTRL_REG5_LIR_I1_MASK   (1 << 3)
 Latch interrupt request on INT1. More...
 
#define LIS3DH_CTRL_REG5_D4D_I1_MASK   (1 << 2)
 4D enable More...
 

STATUS_REG bitfield macros

#define LIS3DH_STATUS_REG_ZYXOR_MASK   (1 << 7)
 X, Y or Z axis data overrun. More...
 
#define LIS3DH_STATUS_REG_ZOR_MASK   (1 << 6)
 Z axis data overrun. More...
 
#define LIS3DH_STATUS_REG_YOR_MASK   (1 << 5)
 Y axis data overrun. More...
 
#define LIS3DH_STATUS_REG_XOR_MASK   (1 << 4)
 X axis data overrun. More...
 
#define LIS3DH_STATUS_REG_ZYXDA_MASK   (1 << 3)
 X, Y or Z axis new data available. More...
 
#define LIS3DH_STATUS_REG_ZDA_MASK   (1 << 2)
 Z axis new data available. More...
 
#define LIS3DH_STATUS_REG_YDA_MASK   (1 << 1)
 Y axis new data available. More...
 
#define LIS3DH_STATUS_REG_XDA_MASK   (1 << 0)
 X axis new data available. More...
 

FIFO_CTRL_REG bitfield macros

#define LIS3DH_FIFO_CTRL_REG_FM_SHIFT   (6)
 
#define LIS3DH_FIFO_CTRL_REG_FM1_MASK   (1 << 7)
 
#define LIS3DH_FIFO_CTRL_REG_FM0_MASK   (1 << 6)
 
#define LIS3DH_FIFO_CTRL_REG_FM_MASK
 
#define LIS3DH_FIFO_CTRL_REG_TR_MASK   (1 << 5)
 
#define LIS3DH_FIFO_CTRL_REG_FTH4_MASK   (1 << 4)
 
#define LIS3DH_FIFO_CTRL_REG_FTH3_MASK   (1 << 3)
 
#define LIS3DH_FIFO_CTRL_REG_FTH2_MASK   (1 << 2)
 
#define LIS3DH_FIFO_CTRL_REG_FTH1_MASK   (1 << 1)
 
#define LIS3DH_FIFO_CTRL_REG_FTH0_MASK   (1 << 0)
 
#define LIS3DH_FIFO_CTRL_REG_FTH_SHIFT   (0)
 
#define LIS3DH_FIFO_CTRL_REG_FTH_MASK
 

FIFO_SRC_REG bitfield macros

#define LIS3DH_FIFO_SRC_REG_WTM_MASK   (1 << 7)
 
#define LIS3DH_FIFO_SRC_REG_OVRN_FIFO_MASK   (1 << 6)
 
#define LIS3DH_FIFO_SRC_REG_EMPTY_MASK   (1 << 5)
 
#define LIS3DH_FIFO_SRC_REG_FSS4_MASK   (1 << 4)
 
#define LIS3DH_FIFO_SRC_REG_FSS3_MASK   (1 << 3)
 
#define LIS3DH_FIFO_SRC_REG_FSS2_MASK   (1 << 2)
 
#define LIS3DH_FIFO_SRC_REG_FSS1_MASK   (1 << 1)
 
#define LIS3DH_FIFO_SRC_REG_FSS0_MASK   (1 << 0)
 
#define LIS3DH_FIFO_SRC_REG_FSS_SHIFT   (0)
 
#define LIS3DH_FIFO_SRC_REG_FSS_MASK
 

Register address bitfield macros

#define LIS3DH_SPI_WRITE_MASK   (0 << 7)
 Write to register.
 
#define LIS3DH_SPI_READ_MASK   (1 << 7)
 The READ bit must be set when reading.
 
#define LIS3DH_SPI_MULTI_MASK   (1 << 6)
 Multi byte transfers must assert this bit when writing the address.
 
#define LIS3DH_SPI_SINGLE_MASK   (0 << 6)
 Opposite of LIS3DH_SPI_MULTI_MASK.
 
#define LIS3DH_SPI_ADDRESS_MASK   (0x3F)
 Mask of the address bits in the address byte during transfers.
 

FIFO modes.

Used when calling lis3dh_set_fifo()

#define LIS3DH_FIFO_MODE_BYPASS   (0x00 << LIS3DH_FIFO_CTRL_REG_FM_SHIFT)
 FIFO mode: Bypass.
 
#define LIS3DH_FIFO_MODE_FIFO   (0x01 << LIS3DH_FIFO_CTRL_REG_FM_SHIFT)
 FIFO mode: FIFO.
 
#define LIS3DH_FIFO_MODE_STREAM   (0x02 << LIS3DH_FIFO_CTRL_REG_FM_SHIFT)
 FIFO mode: Stream.
 
#define LIS3DH_FIFO_MODE_STREAM_TO_FIFO   (0x03 << LIS3DH_FIFO_CTRL_REG_FM_SHIFT)
 FIFO mode: Stream to FIFO.
 

Output Data Rates (ODR) macros

Use these when calling lis3dh_set_odr(odr).

#define LIS3DH_ODR_POWERDOWN   (0x00 << LIS3DH_CTRL_REG1_ODR_SHIFT)
 Powerdown mode.
 
#define LIS3DH_ODR_1Hz   (0x01 << LIS3DH_CTRL_REG1_ODR_SHIFT)
 1Hz mode
 
#define LIS3DH_ODR_10Hz   (0x02 << LIS3DH_CTRL_REG1_ODR_SHIFT)
 10Hz mode
 
#define LIS3DH_ODR_25Hz   (0x03 << LIS3DH_CTRL_REG1_ODR_SHIFT)
 25Hz mode
 
#define LIS3DH_ODR_50Hz   (0x04 << LIS3DH_CTRL_REG1_ODR_SHIFT)
 50Hz mode
 
#define LIS3DH_ODR_100Hz   (0x05 << LIS3DH_CTRL_REG1_ODR_SHIFT)
 100Hz mode
 
#define LIS3DH_ODR_200Hz   (0x06 << LIS3DH_CTRL_REG1_ODR_SHIFT)
 200Hz mode
 
#define LIS3DH_ODR_400Hz   (0x07 << LIS3DH_CTRL_REG1_ODR_SHIFT)
 400Hz mode
 
#define LIS3DH_ODR_LP1600Hz   (0x08 << LIS3DH_CTRL_REG1_ODR_SHIFT)
 Low power 1600Hz mode.
 
#define LIS3DH_ODR_NP1250Hz   (0x09 << LIS3DH_CTRL_REG1_ODR_SHIFT)
 Normal mode 1250 Hz. More...
 
#define LIS3DH_ODR_LP5000HZ   (0x09 << LIS3DH_CTRL_REG1_ODR_SHIFT)
 Low power mode 5000 Hz. More...
 

Macro Definition Documentation

◆ LIS3DH_CTRL_REG1_LPEN_MASK

#define LIS3DH_CTRL_REG1_LPEN_MASK   (1 << 3)

Low power mode enable.

Default value: 0

0. normal mode

  1. low power mode

Definition at line 156 of file lis3dh.h.

◆ LIS3DH_CTRL_REG1_ODR_MASK

#define LIS3DH_CTRL_REG1_ODR_MASK
Value:
LIS3DH_CTRL_REG1_ODR2_MASK | \
LIS3DH_CTRL_REG1_ODR1_MASK | \
LIS3DH_CTRL_REG1_ODR0_MASK)
#define LIS3DH_CTRL_REG1_ODR3_MASK
ODR fourth bit mask.
Definition: lis3dh.h:122

Output data rate (ODR) selection bitfield.

Default value: 0000

0000: Power down; Others: Refer to data sheet

See also
LIS3DH data sheet Table 25, “Data rate configuration”

Definition at line 144 of file lis3dh.h.

◆ LIS3DH_CTRL_REG1_XEN_MASK

#define LIS3DH_CTRL_REG1_XEN_MASK   (1 << LIS3DH_CTRL_REG1_XEN_SHIFT)

X axis enable.

Default value: 1

0. X axis disabled

  1. X axis enabled

Definition at line 195 of file lis3dh.h.

◆ LIS3DH_CTRL_REG1_XYZEN_MASK

#define LIS3DH_CTRL_REG1_XYZEN_MASK
Value:
LIS3DH_CTRL_REG1_YEN_MASK | LIS3DH_CTRL_REG1_ZEN_MASK)
#define LIS3DH_CTRL_REG1_ZEN_MASK
Z axis enable.
Definition: lis3dh.h:169
#define LIS3DH_CTRL_REG1_XEN_MASK
X axis enable.
Definition: lis3dh.h:195

X, Y, Z enable bitfield mask.

Definition at line 203 of file lis3dh.h.

◆ LIS3DH_CTRL_REG1_YEN_MASK

#define LIS3DH_CTRL_REG1_YEN_MASK   (1 << LIS3DH_CTRL_REG1_YEN_SHIFT)

Y axis enable.

Default value: 1

0. Y axis disabled

  1. Y axis enabled

Definition at line 182 of file lis3dh.h.

◆ LIS3DH_CTRL_REG1_ZEN_MASK

#define LIS3DH_CTRL_REG1_ZEN_MASK   (1 << LIS3DH_CTRL_REG1_ZEN_SHIFT)

Z axis enable.

Default value: 1

0. Z axis disabled

  1. Z axis enabled

Definition at line 169 of file lis3dh.h.

◆ LIS3DH_CTRL_REG2_FDS_MASK

#define LIS3DH_CTRL_REG2_FDS_MASK   (1 << 3)

Filtered data selection.

Default value: 0

0. internal filter bypassed

  1. data from internal filter sent to output register and FIFO

Definition at line 261 of file lis3dh.h.

◆ LIS3DH_CTRL_REG2_HPCLICK_MASK

#define LIS3DH_CTRL_REG2_HPCLICK_MASK   (1 << 2)

High pass filter enabled for CLICK function.

0. filter bypassed

  1. filter enabled

Definition at line 268 of file lis3dh.h.

◆ LIS3DH_CTRL_REG2_HPIS1_MASK

#define LIS3DH_CTRL_REG2_HPIS1_MASK   (1 << 0)

High pass filter enabled for AOI function on interrupt 2, first bit.

0. filter bypassed

  1. filter enabled

Definition at line 282 of file lis3dh.h.

◆ LIS3DH_CTRL_REG2_HPIS2_MASK

#define LIS3DH_CTRL_REG2_HPIS2_MASK   (1 << 1)

High pass filter enabled for AOI function on interrupt 2, second bit.

0. filter bypassed

  1. filter enabled

Definition at line 275 of file lis3dh.h.

◆ LIS3DH_CTRL_REG2_HPM0_MASK

#define LIS3DH_CTRL_REG2_HPM0_MASK   (1 << 6)

High pass filter mode selection first bit.

Default value: 0

See also
Refer to Table 29, "High pass filter mode configuration"

Definition at line 244 of file lis3dh.h.

◆ LIS3DH_CTRL_REG2_HPM1_MASK

#define LIS3DH_CTRL_REG2_HPM1_MASK   (1 << 7)

High pass filter mode selection second bit.

Default value: 0

See also
Refer to Table 29, "High pass filter mode configuration"

Definition at line 236 of file lis3dh.h.

◆ LIS3DH_CTRL_REG3_I1_AOI1_MASK

#define LIS3DH_CTRL_REG3_I1_AOI1_MASK   (1 << 6)

AOI1 interrupt on INT1.

Default value 0.

0. Disable

  1. Enable

Definition at line 306 of file lis3dh.h.

◆ LIS3DH_CTRL_REG3_I1_AOI2_MASK

#define LIS3DH_CTRL_REG3_I1_AOI2_MASK   (1 << 5)

AOI2 interrupt on INT1.

Default value 0.

0. Disable

  1. Enable

Definition at line 315 of file lis3dh.h.

◆ LIS3DH_CTRL_REG3_I1_CLICK_MASK

#define LIS3DH_CTRL_REG3_I1_CLICK_MASK   (1 << 7)

CLICK interrupt on INT1.

Default value 0.

0. Disable

  1. Enable

Definition at line 297 of file lis3dh.h.

◆ LIS3DH_CTRL_REG3_I1_DRDY1_MASK

#define LIS3DH_CTRL_REG3_I1_DRDY1_MASK   (1 << 4)

DRDY1 interrupt on INT1.

Default value 0.

0. Disable

  1. Enable

Definition at line 324 of file lis3dh.h.

◆ LIS3DH_CTRL_REG3_I1_DRDY2_MASK

#define LIS3DH_CTRL_REG3_I1_DRDY2_MASK   (1 << 3)

DRDY2 interrupt on INT1.

Default value 0.

0. Disable

  1. Enable

Definition at line 333 of file lis3dh.h.

◆ LIS3DH_CTRL_REG3_I1_OVERRUN_MASK

#define LIS3DH_CTRL_REG3_I1_OVERRUN_MASK   (1 << 1)

FIFO Overrun interrupt on INT1.

Default value 0.

0. Disable

  1. Enable

Definition at line 351 of file lis3dh.h.

◆ LIS3DH_CTRL_REG3_I1_WTM_MASK

#define LIS3DH_CTRL_REG3_I1_WTM_MASK   (1 << 2)

FIFO Watermark interrupt on INT1.

Default value 0.

0. Disable

  1. Enable

Definition at line 342 of file lis3dh.h.

◆ LIS3DH_CTRL_REG4_BDU_MASK

#define LIS3DH_CTRL_REG4_BDU_MASK   (1 << 7)

Block data update (BDU) bit mask.

Default value of BDU: 0

0. continuous update

  1. output registers not updated until MSB and LSB reading

Definition at line 366 of file lis3dh.h.

◆ LIS3DH_CTRL_REG4_BLE_MASK

#define LIS3DH_CTRL_REG4_BLE_MASK   (1 << 6)

Big/little endian bit mask.

Default value of BLE: 0.

0. Data LSB @ lower address

  1. Data MSB @ lower address

Definition at line 383 of file lis3dh.h.

◆ LIS3DH_CTRL_REG4_FS_MASK

#define LIS3DH_CTRL_REG4_FS_MASK
Value:
LIS3DH_CTRL_REG4_FS0_MASK)
#define LIS3DH_CTRL_REG4_FS1_MASK
Full scale selection mask second bit.
Definition: lis3dh.h:395

Full scale selection mask.

Definition at line 403 of file lis3dh.h.

◆ LIS3DH_CTRL_REG4_HR_MASK

#define LIS3DH_CTRL_REG4_HR_MASK   (1 << 3)

High resolution output mode.

Default value: 0

0. High resolution disable

  1. High resolution enable

Definition at line 429 of file lis3dh.h.

◆ LIS3DH_CTRL_REG4_SIM_MASK

#define LIS3DH_CTRL_REG4_SIM_MASK   (1 << 0)

SPI serial interface mode selection.

Default value: 0

0. 4-wire interface

  1. 3-wire interface

Definition at line 453 of file lis3dh.h.

◆ LIS3DH_CTRL_REG4_ST1_MASK

#define LIS3DH_CTRL_REG4_ST1_MASK   (1 << 2)

Self test enable second bit mask.

Default value of self test: 00

  • 00: Self test disabled
  • Other: See Table 34
See also
Table 34

Definition at line 440 of file lis3dh.h.

◆ LIS3DH_CTRL_REG5_D4D_I1_MASK

#define LIS3DH_CTRL_REG5_D4D_I1_MASK   (1 << 2)

4D enable

4D detection is enabled on INT1 when 6D bit on INT1_CFG is set to 1.

Definition at line 489 of file lis3dh.h.

◆ LIS3DH_CTRL_REG5_FIFO_EN_MASK

#define LIS3DH_CTRL_REG5_FIFO_EN_MASK   (1 << 6)

FIFO enable.

Default value: 0

0. FIFO disable

  1. FIFO enable

Definition at line 471 of file lis3dh.h.

◆ LIS3DH_CTRL_REG5_LIR_I1_MASK

#define LIS3DH_CTRL_REG5_LIR_I1_MASK   (1 << 3)

Latch interrupt request on INT1.

Latch interrupt request on INT1_SRC register, with INT1_SRC register cleared by reading INT1_SRC itself.

Default value: 0

0. interrupt request not latched

  1. interrupt request latched

Definition at line 483 of file lis3dh.h.

◆ LIS3DH_CTRL_REG5_REBOOT_MASK

#define LIS3DH_CTRL_REG5_REBOOT_MASK   (1 << 7)

Reboot memory content.

Default value: 0

0. normal mode

  1. reboot memory content

Definition at line 462 of file lis3dh.h.

◆ LIS3DH_FIFO_CTRL_REG_FM_MASK

#define LIS3DH_FIFO_CTRL_REG_FM_MASK
Value:
(LIS3DH_FIFO_CTRL_REG_FM1_MASK | \
LIS3DH_FIFO_CTRL_REG_FM0_MASK)

Definition at line 577 of file lis3dh.h.

◆ LIS3DH_FIFO_CTRL_REG_FTH_MASK

#define LIS3DH_FIFO_CTRL_REG_FTH_MASK
Value:
(LIS3DH_FIFO_CTRL_REG_FTH0_MASK | \
LIS3DH_FIFO_CTRL_REG_FTH1_MASK | \
LIS3DH_FIFO_CTRL_REG_FTH2_MASK | \
LIS3DH_FIFO_CTRL_REG_FTH3_MASK | \
LIS3DH_FIFO_CTRL_REG_FTH4_MASK)

Definition at line 586 of file lis3dh.h.

◆ LIS3DH_FIFO_SRC_REG_FSS_MASK

#define LIS3DH_FIFO_SRC_REG_FSS_MASK
Value:
(LIS3DH_FIFO_SRC_REG_FSS0_MASK | \
LIS3DH_FIFO_SRC_REG_FSS1_MASK | \
LIS3DH_FIFO_SRC_REG_FSS2_MASK | \
LIS3DH_FIFO_SRC_REG_FSS3_MASK | \
LIS3DH_FIFO_SRC_REG_FSS4_MASK)

Definition at line 606 of file lis3dh.h.

◆ LIS3DH_ODR_LP5000HZ

#define LIS3DH_ODR_LP5000HZ   (0x09 << LIS3DH_CTRL_REG1_ODR_SHIFT)

Low power mode 5000 Hz.

Note
Normal mode 1250 Hz and Low power mode 5000 Hz share the same setting

Definition at line 719 of file lis3dh.h.

◆ LIS3DH_ODR_NP1250Hz

#define LIS3DH_ODR_NP1250Hz   (0x09 << LIS3DH_CTRL_REG1_ODR_SHIFT)

Normal mode 1250 Hz.

Note
Normal mode 1250 Hz and Low power mode 5000 Hz share the same setting

Definition at line 714 of file lis3dh.h.

◆ LIS3DH_STATUS_REG_XDA_MASK

#define LIS3DH_STATUS_REG_XDA_MASK   (1 << 0)

X axis new data available.

Default value: 0

0. a new data for the X-axis is not yet available

  1. a new data for the X-axis is available

Definition at line 567 of file lis3dh.h.

◆ LIS3DH_STATUS_REG_XOR_MASK

#define LIS3DH_STATUS_REG_XOR_MASK   (1 << 4)

X axis data overrun.

Default value: 0

0. no overrun has occurred

  1. a new data for the X-axis has overwritten the previous one

Definition at line 531 of file lis3dh.h.

◆ LIS3DH_STATUS_REG_YDA_MASK

#define LIS3DH_STATUS_REG_YDA_MASK   (1 << 1)

Y axis new data available.

Default value: 0

0. a new data for the Y-axis is not yet available

  1. a new data for the Y-axis is available

Definition at line 558 of file lis3dh.h.

◆ LIS3DH_STATUS_REG_YOR_MASK

#define LIS3DH_STATUS_REG_YOR_MASK   (1 << 5)

Y axis data overrun.

Default value: 0

0. no overrun has occurred

  1. a new data for the Y-axis has overwritten the previous one

Definition at line 522 of file lis3dh.h.

◆ LIS3DH_STATUS_REG_ZDA_MASK

#define LIS3DH_STATUS_REG_ZDA_MASK   (1 << 2)

Z axis new data available.

Default value: 0

0. a new data for the Z-axis is not yet available

  1. a new data for the Z-axis is available

Definition at line 549 of file lis3dh.h.

◆ LIS3DH_STATUS_REG_ZOR_MASK

#define LIS3DH_STATUS_REG_ZOR_MASK   (1 << 6)

Z axis data overrun.

Default value: 0

0. no overrun has occurred

  1. a new data for the Z-axis has overwritten the previous one

Definition at line 513 of file lis3dh.h.

◆ LIS3DH_STATUS_REG_ZYXDA_MASK

#define LIS3DH_STATUS_REG_ZYXDA_MASK   (1 << 3)

X, Y or Z axis new data available.

Default value: 0

0. a new set of data is not yet available

  1. a new set of data is available

Definition at line 540 of file lis3dh.h.

◆ LIS3DH_STATUS_REG_ZYXOR_MASK

#define LIS3DH_STATUS_REG_ZYXOR_MASK   (1 << 7)

X, Y or Z axis data overrun.

Default value: 0

0. no overrun has occurred

  1. a new set of data has overwritten the previous ones

Definition at line 504 of file lis3dh.h.

◆ LIS3DH_TEMP_CFG_REG_ADC_PD_MASK

#define LIS3DH_TEMP_CFG_REG_ADC_PD_MASK   (1 << 7)

ADC enable.

Default value: 0

0: ADC disabled; 1: ADC enabled

Definition at line 100 of file lis3dh.h.

◆ LIS3DH_TEMP_CFG_REG_TEMP_EN_MASK

#define LIS3DH_TEMP_CFG_REG_TEMP_EN_MASK   (1 << 6)

Temperature sensor (T) enable.

Default value: 0

0: T disabled; 1: T enabled

Definition at line 108 of file lis3dh.h.

◆ LIS3DH_WHO_AM_I_RESPONSE

#define LIS3DH_WHO_AM_I_RESPONSE   (0x33)

Identifier register value.

The WHO_AM_I register should contain this value in order to correctly identify the chip.

Definition at line 40 of file lis3dh.h.

Function Documentation

◆ lis3dh_get_fifo_level()

int lis3dh_get_fifo_level ( const lis3dh_t dev)

Get the current number of elements in the FIFO.

Parameters
[in]devDevice descriptor of sensor
Returns
number of elements in device FIFO on success
-1 on error

◆ lis3dh_init()

int lis3dh_init ( lis3dh_t dev,
const lis3dh_params_t params 
)

Initialize a LIS3DH sensor instance.

Parameters
[in]devDevice descriptor of sensor to initialize
[in]paramsConfiguration parameters
Returns
0 on success
-1 on error

◆ lis3dh_read_aux_adc1()

int lis3dh_read_aux_adc1 ( const lis3dh_t dev,
int16_t *  out 
)

Read auxiliary ADC channel 1 data from the accelerometer.

Parameters
[in]devDevice descriptor of sensor
[out]outThe value of ADC1 (OUT_1_{L,H}) will be written to this buffer
Returns
0 on success
-1 on error

◆ lis3dh_read_aux_adc2()

int lis3dh_read_aux_adc2 ( const lis3dh_t dev,
int16_t *  out 
)

Read auxiliary ADC channel 2 data from the accelerometer.

Parameters
[in]devDevice descriptor of sensor
[out]outThe value of ADC2 (OUT_2_{L,H}) will be written to this buffer
Returns
0 on success
-1 on error

◆ lis3dh_read_aux_adc3()

int lis3dh_read_aux_adc3 ( const lis3dh_t dev,
int16_t *  out 
)

Read auxiliary ADC channel 3 data from the accelerometer.

Parameters
[in]devDevice descriptor of sensor
[out]outThe value of ADC3 (OUT_3_{L,H}) will be written to this buffer
Note
The internal temperature sensor is connected to the third channel on the auxiliary ADC when the TEMP_EN bit of TEMP_CFG_REG is set.
Returns
0 on success
-1 on error

◆ lis3dh_read_xyz()

int lis3dh_read_xyz ( const lis3dh_t dev,
lis3dh_data_t acc_data 
)

Read 3D acceleration data from the accelerometer.

Parameters
[in]devDevice descriptor of sensor
[out]acc_dataAccelerometer data output buffer
Returns
0 on success
-1 on error

◆ lis3dh_set_aux_adc()

int lis3dh_set_aux_adc ( const lis3dh_t dev,
const uint8_t  enable,
const uint8_t  temperature 
)

Turn on/off power to the auxiliary ADC in LIS3DH.

Parameters
[in]devDevice descriptor of sensor
[in]enablePower state of the auxiliary ADC
[in]temperatureIf not zero, switch the ADC mux so that a temperature reading is available on OUT_3_L, OUT_3_H.
Note
This ADC is only used for the temperature reading and the external ADC pins. The accelerometer ADC is turned on by lis3dh_set_odr().
Returns
0 on success
-1 on error

◆ lis3dh_set_axes()

int lis3dh_set_axes ( const lis3dh_t dev,
const uint8_t  axes 
)

Enable/disable accelerometer axes.

Parameters
[in]devDevice descriptor of sensor
[in]axesAn OR-ed combination of LIS3DH_AXES_X, LIS3DH_AXES_Y, LIS3DH_AXES_Z.
Note
The macro LIS3DH_AXES_XYZ is a convenience shortcut to enable all axes.
Returns
0 on success
-1 on error

◆ lis3dh_set_fifo()

int lis3dh_set_fifo ( const lis3dh_t dev,
const uint8_t  mode,
const uint8_t  watermark 
)

Enable/disable the FIFO.

Parameters
[in]devDevice descriptor of sensor
[in]modeFIFO mode, see data sheet for details.
[in]watermarkWatermark level for FIFO level interrupts
Returns
0 on success
-1 on error

◆ lis3dh_set_int1()

int lis3dh_set_int1 ( const lis3dh_t dev,
const uint8_t  mode 
)

Set INT1 pin function.

Set the bits of CTRL_REG3 for choosing sources for the INT1 pin.

Parameters
[in]devDevice descriptor of sensor
[in]modeCTRL_REG3 value, see data sheet for details.
Returns
0 on success
-1 on error

◆ lis3dh_set_odr()

int lis3dh_set_odr ( const lis3dh_t dev,
const uint8_t  odr 
)

Set the output data rate of the sensor.

Parameters
[in]devDevice descriptor of sensor
[in]odrChosen output data rate.
Returns
0 on success
-1 on error

◆ lis3dh_set_scale()

int lis3dh_set_scale ( lis3dh_t dev,
const uint8_t  scale 
)

Set the full scale range of the sensor.

Valid values for scale are 2, 4, 8, 16 and represents the full range of the sensor.

Parameters
[in]devDevice descriptor of sensor
[in]scaleThe chosen sensitivity scale.
Returns
0 on success
-1 on error