STM32 Nucleo-F446

Support for the STM32 Nucleo-F446. More...

Detailed Description

Support for the STM32 Nucleo-F446.

Files
file	boards/nucleo-f446/include/periph_conf.h

Clock settings
Note This is auto-generated from cpu/stm32_common/dist/clk_conf/clk_conf.c
#define	CLOCK_CORECLOCK   (180000000U)
#define	CLOCK_HSE   (8000000U)
#define	CLOCK_LSE   (1)
#define	CLOCK_AHB_DIV   RCC_CFGR_HPRE_DIV1
#define	CLOCK_AHB   (CLOCK_CORECLOCK / 1)
#define	CLOCK_APB1_DIV   RCC_CFGR_PPRE1_DIV4 /* max 45MHz */
#define	CLOCK_APB1   (CLOCK_CORECLOCK / 4)
#define	CLOCK_APB2_DIV   RCC_CFGR_PPRE2_DIV2 /* max 90MHz */
#define	CLOCK_APB2   (CLOCK_CORECLOCK / 2)
#define	CLOCK_PLL_M   (4)
#define	CLOCK_PLL_N   (180)
#define	CLOCK_PLL_P   (2)
#define	CLOCK_PLL_Q   (0)
#define	CLOCK_ENABLE_PLL_SAI   (1)
#define	CLOCK_PLL_SAI_M   (4)
#define	CLOCK_PLL_SAI_N   (192)
#define	CLOCK_PLL_SAI_P   (8)
#define	CLOCK_PLL_SAI_Q   (0)
#define	CLOCK_USE_ALT_48MHZ   (1)

Timer configuration
static const timer_conf_t	timer_config []
#define	TIMER_0_ISR   isr_tim5
#define	TIMER_NUMOF   (sizeof(timer_config) / sizeof(timer_config[0]))

UART configuration
static const uart_conf_t	uart_config []
#define	UART_0_ISR   (isr_usart2)
#define	UART_0_DMA_ISR   (isr_dma1_stream6)
#define	UART_1_ISR   (isr_usart3)
#define	UART_1_DMA_ISR   (isr_dma1_stream5)
#define	UART_2_ISR   (isr_usart1)
#define	UART_2_DMA_ISR   (isr_dma1_stream4)
#define	UART_NUMOF   (sizeof(uart_config) / sizeof(uart_config[0]))

PWM configuration
static const pwm_conf_t	pwm_config []
#define	PWM_NUMOF   (sizeof(pwm_config) / sizeof(pwm_config[0]))

QDEC configuration
static const qdec_conf_t	qdec_config []
#define	QDEC_0_ISR   isr_tim3
#define	QDEC_1_ISR   isr_tim4
#define	QDEC_NUMOF   (sizeof(qdec_config) / sizeof(qdec_config[0]))

SPI configuration
Note The spi_divtable is auto-generated from cpu/stm32_common/dist/spi_divtable/spi_divtable.c
static const uint8_t	spi_divtable [2][5]
static const spi_conf_t	spi_config []
#define	SPI_NUMOF   (sizeof(spi_config) / sizeof(spi_config[0]))

I2C configuration
#define	I2C_NUMOF   (1U)
#define	I2C_0_EN   1
#define	I2C_IRQ_PRIO   1
#define	I2C_APBCLK   (CLOCK_APB1)
#define	I2C_0_DEV   I2C1
#define	I2C_0_CLKEN()   (periph_clk_en(APB1, RCC_APB1ENR_I2C1EN))
#define	I2C_0_CLKDIS()   (periph_clk_dis(APB1, RCC_APB1ENR_I2C1EN))
#define	I2C_0_EVT_IRQ   I2C1_EV_IRQn
#define	I2C_0_EVT_ISR   isr_i2c1_ev
#define	I2C_0_ERR_IRQ   I2C1_ER_IRQn
#define	I2C_0_ERR_ISR   isr_i2c1_er
#define	I2C_0_SCL_PORT   GPIOB
#define	I2C_0_SCL_PIN   8
#define	I2C_0_SCL_AF   4
#define	I2C_0_SCL_CLKEN()   (periph_clk_en(AHB1, RCC_AHB1ENR_GPIOBEN))
#define	I2C_0_SDA_PORT   GPIOB
#define	I2C_0_SDA_PIN   9
#define	I2C_0_SDA_AF   4
#define	I2C_0_SDA_CLKEN()   (periph_clk_en(AHB1, RCC_AHB1ENR_GPIOBEN))

ADC configuration
Note that we do not configure all ADC channels, and not in the STM32F446 order. Instead, we just define 6 ADC channels, for the Nucleo Arduino header pins A0-A5
#define	ADC_NUMOF   (6U)
#define	ADC_CONFIG

Macro Definition Documentation

ADC_CONFIG

#define ADC_CONFIG

Value:

{             \
    {GPIO_PIN(PORT_A, 0), 0, 0}, \
    {GPIO_PIN(PORT_A, 1), 0, 1}, \
    {GPIO_PIN(PORT_A, 4), 0, 4}, \
    {GPIO_PIN(PORT_B, 0), 0, 8}, \
    {GPIO_PIN(PORT_C, 1), 0, 11}, \
    {GPIO_PIN(PORT_C, 0), 0, 10}, \
}

Definition at line 312 of file boards/nucleo-f446/include/periph_conf.h.

Variable Documentation

pwm_config

const pwm_conf_t pwm_config[]

static

Initial value:

= {
    {
        .dev      = TIM2,
        .rcc_mask = RCC_APB1ENR_TIM2EN,
        .chan     = { { .pin = GPIO_PIN(PORT_A, 15), .cc_chan = 0},
                      { .pin = GPIO_PIN(PORT_B,  3), .cc_chan = 1},
                      { .pin = GPIO_PIN(PORT_B, 10), .cc_chan = 2},
                      { .pin = GPIO_PIN(PORT_B,  2), .cc_chan = 3} },
        .af       = GPIO_AF1,
        .bus      = APB1
    },
    {
        .dev      = TIM8,
        .rcc_mask = RCC_APB2ENR_TIM8EN,
        .chan     = { { .pin = GPIO_PIN(PORT_C, 6), .cc_chan = 0},
                      { .pin = GPIO_PIN(PORT_C, 7), .cc_chan = 1},
                      { .pin = GPIO_PIN(PORT_C, 8), .cc_chan = 2},
                      { .pin = GPIO_PIN(PORT_C, 9), .cc_chan = 3} },
        .af       = GPIO_AF3,
        .bus      = APB2
    },
}

Definition at line 153 of file boards/nucleo-f446/include/periph_conf.h.

qdec_config

const qdec_conf_t qdec_config[]

static

Initial value:

= {
    {
        .dev      = TIM3,
        .max      = 0xffffffff,
        .rcc_mask = RCC_APB1ENR_TIM3EN,
        .chan     = { { .pin = GPIO_PIN(PORT_A, 6), .cc_chan = 0 },
                      { .pin = GPIO_PIN(PORT_A, 7), .cc_chan = 1 } },
        .af       = GPIO_AF2,
        .bus      = APB1,
        .irqn     = TIM3_IRQn
    },
    {
        .dev      = TIM4,
        .max      = 0xffffffff,
        .rcc_mask = RCC_APB1ENR_TIM4EN,
        .chan     = { { .pin = GPIO_PIN(PORT_B, 6), .cc_chan = 0 },
                      { .pin = GPIO_PIN(PORT_B, 7), .cc_chan = 1 } },
        .af       = GPIO_AF2,
        .bus      = APB1,
        .irqn     = TIM4_IRQn
    },
}

Definition at line 183 of file boards/nucleo-f446/include/periph_conf.h.

spi_divtable

const uint8_t spi_divtable[2][5]

static

Initial value:

= {
    {       
        7,  
        7,  
        6,  
        3,  
        2   
    },
    {       
        7,  
        7,  
        7,  
        4,  
        3   
    }
}

Definition at line 219 of file boards/nucleo-f446/include/periph_conf.h.

timer_config

const timer_conf_t timer_config[]

static

Initial value:

= {
    {
        .dev      = TIM5,
        .max      = 0xffffffff,
        .rcc_mask = RCC_APB1ENR_TIM5EN,
        .bus      = APB1,
        .irqn     = TIM5_IRQn
    }
}

Definition at line 75 of file boards/nucleo-f446/include/periph_conf.h.