periph_cpu.h
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1 /*
2  * Copyright (C) 2015 Freie Universit├Ąt Berlin
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser
5  * General Public License v2.1. See the file LICENSE in the top level
6  * directory for more details.
7  */
8 
19 #ifndef PERIPH_CPU_H
20 #define PERIPH_CPU_H
21 
22 #include "cpu.h"
23 
24 #ifdef __cplusplus
25 extern "C" {
26 #endif
27 
31 #define TIMER_UNDEF (0xffffffff)
32 
37 #define HAVE_TIMER_T
38 typedef uint32_t tim_t;
44 #define TIMER_CHANNEL_NUMOF (3)
45 
49 #define CPUID_ADDR (&DEVINFO->UNIQUEL)
50 
53 #define CPUID_LEN (8U)
54 
61 typedef struct {
62  TIMER_TypeDef *prescaler;
63  TIMER_TypeDef *timer;
64  uint8_t pre_cmu;
66  uint8_t irqn;
67 } timer_conf_t;
68 
73 #define HAVE_GPIO_T
74 typedef uint32_t gpio_t;
80 #define GPIO_UNDEF (0xffffffff)
81 
86 #define GPIO_PIN(x, y) ((x << 4) | y)
87 
91 enum {
92  PA = 0,
93  PB = 1,
94  PC = 2,
95  PD = 3,
96  PE = 4,
97  PF = 5
98 };
99 
100 #ifndef DOXYGEN
101 
105 #define HAVE_GPIO_MODE_T
106 typedef enum {
107  GPIO_IN = _GPIO_P_MODEL_MODE0_INPUT,
108  GPIO_IN_PD = _GPIO_P_MODEL_MODE0_INPUTPULL,
109  GPIO_IN_PU = _GPIO_P_MODEL_MODE0_INPUTPULL,
110  GPIO_OUT = _GPIO_P_MODEL_MODE0_PUSHPULL,
111  GPIO_OD = _GPIO_P_MODEL_MODE0_WIREDAND,
112  GPIO_OD_PU = _GPIO_P_MODEL_MODE0_WIREDANDPULLUP
113 } gpio_mode_t;
120 #define HAVE_GPIO_FLANK_T
121 typedef enum {
122  GPIO_FALLING = 2,
123  GPIO_RISING = 1,
124  GPIO_BOTH = 3
125 } gpio_flank_t;
127 #endif /* ndef DOXYGEN */
128 
132 typedef struct {
133  USART_TypeDef *dev;
134  gpio_t rx_pin;
135  gpio_t tx_pin;
136  uint8_t loc;
137  uint8_t cmu;
138  uint8_t irq;
139 } uart_conf_t;
140 
141 #ifdef __cplusplus
142 }
143 #endif
144 
145 #endif /* PERIPH_CPU_H */
146 
configure as output in push-pull mode
Definition: gpio.h:117
emit interrupt on rising flank
Definition: gpio.h:131
port A
Definition: periph_cpu.h:92
port B
Definition: periph_cpu.h:93
port C
Definition: periph_cpu.h:94
uint8_t irq
the devices base IRQ channel
Definition: periph_cpu.h:138
unsigned int tim_t
Default timer type.
Definition: timer.h:70
TIMER_TypeDef * timer
the higher numbered timer
Definition: periph_cpu.h:63
uint8_t pre_cmu
prescale timer bit in CMU register, the timer bit is deducted from this
Definition: periph_cpu.h:64
uint8_t irqn
number of the higher timer IRQ channel
Definition: periph_cpu.h:66
uint8_t loc
location of USART pins (AF)
Definition: periph_cpu.h:136
emit interrupt on both flanks
Definition: gpio.h:132
gpio_flank_t
Definition of possible active flanks for external interrupt mode.
Definition: gpio.h:129
port D
Definition: periph_cpu.h:95
unsigned int gpio_t
GPIO type identifier.
Definition: gpio.h:86
emit interrupt on falling flank
Definition: gpio.h:130
configure as input with pull-up resistor
Definition: gpio.h:116
UART device configuration.
Definition: periph_cpu.h:166
gpio_mode_t
Available pin modes.
Definition: gpio.h:113
configure as input without pull resistor
Definition: gpio.h:114
configure as output in open-drain mode without pull resistor
Definition: gpio.h:118
configure as input with pull-down resistor
Definition: gpio.h:115
uint8_t cmu
the device CMU channel
Definition: periph_cpu.h:137
port F
Definition: periph_cpu.h:97
configure as output in open-drain mode with pull resistor enabled
Definition: gpio.h:120
Timer configuration.
Definition: periph_cpu.h:288
TIMER_TypeDef * prescaler
the lower numbered neighboring timer
Definition: periph_cpu.h:62
port E
Definition: periph_cpu.h:96
USART_TypeDef * dev
USART device used.
Definition: periph_cpu.h:133