irq_arch.h File Reference

Implementation of the kernels irq interface. More...

Detailed Description

Implementation of the kernels irq interface.

Author
Gunar Schorcht gunar.nosp@m.@sch.nosp@m.orcht.nosp@m..net

Definition in file irq_arch.h.

#include "irq.h"
#include "sched.h"
#include "thread.h"
+ Include dependency graph for irq_arch.h:

Go to the source code of this file.

Variables

volatile uint32_t irq_interrupt_nesting
 Indicates the interrupt nesting depth. More...
 

CPU interrupt numbers

All interrupts that are used for RIOT-OS are preallocated and fix.

The allocated interrupts are all level interrupts, most of them with low priority.

#define CPU_INUM_GPIO   2
 Level interrupt with low priority 1.
 
#define CPU_INUM_CAN   3
 Level interrupt with low priority 1.
 
#define CPU_INUM_UART   5
 Level interrupt with low priority 1.
 
#define CPU_INUM_RTC   9
 Level interrupt with low priority 1.
 
#define CPU_INUM_I2C   12
 Level interrupt with low priority 1.
 
#define CPU_INUM_WDT   13
 Level interrupt with low priority 1.
 
#define CPU_INUM_SOFTWARE   17
 Level interrupt with low priority 1.
 
#define CPU_INUM_ETH   18
 Level interrupt with low priority 1.
 
#define CPU_INUM_TIMER   19
 Level interrupt with medium priority 2.
 

Macros to enter and exit an ISR

Since all the stuff is done in _frxt_int_enter and _frxt_int_exit, these macros are doing nothing and are kept only for source code compatibility.

#define irq_isr_enter()
 
#define irq_isr_exit()
 

Macros to enter and exit a critical region

Note
: since they use a local variable they can be used only in same function
#define critical_enter()   int _irq_state = irq_disable()
 
#define critical_exit()   irq_restore(_irq_state)
 

Macros to enter and exit a critical region with state variable

#define critical_enter_var(m)   m = irq_disable()
 
#define critical_exit_var(m)   irq_restore(m)
 

Variable Documentation

◆ irq_interrupt_nesting

volatile uint32_t irq_interrupt_nesting

Indicates the interrupt nesting depth.

The variable is increment on entry into and decremented on exit from an ISR.