cfg_clock_168_8_common.h
Go to the documentation of this file.
1 /*
2  * Copyright (C) 2018 Freie Universit├Ąt Berlin
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser
5  * General Public License v2.1. See the file LICENSE in the top level
6  * directory for more details.
7  */
8 
19 #ifndef F4_CFG_CLOCK_168_8_COMMON_H
20 #define F4_CFG_CLOCK_168_8_COMMON_H
21 
22 #ifdef __cplusplus
23 extern "C" {
24 #endif
25 
33 /* give the target core clock (HCLK) frequency [in Hz],
34  * maximum: 168MHz */
35 #define CLOCK_CORECLOCK (168000000U)
36 /* 0: no external high speed crystal available
37  * else: actual crystal frequency [in Hz] */
38 #define CLOCK_HSE (8000000U)
39 /* peripheral clock setup */
40 #define CLOCK_AHB_DIV RCC_CFGR_HPRE_DIV1
41 #define CLOCK_AHB (CLOCK_CORECLOCK / 1)
42 #define CLOCK_APB1_DIV RCC_CFGR_PPRE1_DIV4 /* max 42MHz */
43 #define CLOCK_APB1 (CLOCK_CORECLOCK / 4)
44 #define CLOCK_APB2_DIV RCC_CFGR_PPRE2_DIV2 /* max 84MHz */
45 #define CLOCK_APB2 (CLOCK_CORECLOCK / 2)
46 
47 /* Main PLL factors */
48 #define CLOCK_PLL_M (4)
49 #define CLOCK_PLL_N (168)
50 #define CLOCK_PLL_P (2)
51 #define CLOCK_PLL_Q (7)
52 
54 #ifdef __cplusplus
55 }
56 #endif
57 
58 #endif /* F4_CFG_CLOCK_168_8_COMMON_H */
59