cfg_clock_168_8_0.h
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1 /*
2  * Copyright (C) 2018 Freie Universit├Ąt Berlin
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser
5  * General Public License v2.1. See the file LICENSE in the top level
6  * directory for more details.
7  */
8 
19 #ifndef F4_CFG_CLOCK_168_8_0_H
20 #define F4_CFG_CLOCK_168_8_0_H
21 
23 
24 #ifdef __cplusplus
25 extern "C" {
26 #endif
27 
34 #define CLOCK_LSE (0)
35 
36 #ifdef __cplusplus
37 }
38 #endif
39 
40 #endif /* F4_CFG_CLOCK_168_8_0_H */
41 
Configure STM32F4 clock to 168MHz using PLL.