cc26x0_vims.h
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1 /*
2  * Copyright (C) 2016 Leon George
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser
5  * General Public License v2.1. See the file LICENSE in the top level
6  * directory for more details.
7  */
8 
17 #ifndef CC26x0_VIMS_H
18 #define CC26x0_VIMS_H
19 
20 #ifdef __cplusplus
21 extern "C" {
22 #endif
23 
27 typedef struct {
28  reg32_t __reserved1[7];
29  reg32_t STAT;
30  reg32_t CTL;
31  reg32_t __reserved2;
32  reg32_t SYSCODE_START;
33  reg32_t FLASH_SIZE;
34  reg32_t __reserved3[3];
35  reg32_t FWLOCK;
36  reg32_t FWFLAG;
37  reg32_t __reserved4[0x3EF];
38  reg32_t EFUSE;
39  reg32_t EFUSEADDR;
40  reg32_t DATAUPPER;
41  reg32_t DATALOWER;
42  reg32_t EFUSECFG;
43  reg32_t EFUSESTAT;
44  reg32_t ACC;
45  reg32_t BOUNDARY;
46  reg32_t EFUSEFLAG;
47  reg32_t EFUSEKEY;
48  reg32_t EFUSERELEASE;
49  reg32_t EFUSEPINS;
50  reg32_t EFUSECRA;
51  reg32_t EFUSEREAD;
52  reg32_t EFUSEPROGRAM;
53  reg32_t EFUSEERROR;
54  reg32_t SINGLEBIT;
55  reg32_t TWOBIT;
56  reg32_t SELFTESTCYC;
57  reg32_t SELFTESTSIGN;
58  reg32_t __reserved5[0x3ec];
59  reg32_t FRDCTL;
60  reg32_t FSPRD;
61  reg32_t FEDACCTL1;
62  reg32_t __reserved6[4];
63  reg32_t FEDACSTAT;
64  reg32_t __reserved7[4];
65  reg32_t FBPROT;
66  reg32_t FBSE;
67  reg32_t FBBUSY;
68  reg32_t FBAC;
69  reg32_t FBFALLBACK;
70  reg32_t FBPRDY;
71  reg32_t FPAC1;
72  reg32_t FPAC2;
73  reg32_t FMAC;
74  reg32_t FMSTAT;
75  reg32_t __reserved8[3];
76  reg32_t FLOCK;
77  reg32_t __reserved9[6];
78  reg32_t FVREADCT;
79  reg32_t FVHVCT1;
80  reg32_t FVHVCT2;
81  reg32_t FVHVCT3;
82  reg32_t FVNVCT;
83  reg32_t FVSLP;
84  reg32_t FVWLCT;
85  reg32_t FEFUSECTL;
86  reg32_t FEFUSESTAT;
87  reg32_t FEFUSEDATA;
88  reg32_t FSEQPMP;
89  reg32_t __reserved10[21];
90  reg32_t FBSTROBES;
91  reg32_t FPSTROBES;
92  reg32_t FBMODE;
93  reg32_t FTCR;
94  reg32_t FADDR;
95  reg32_t __reserved11[2];
96  reg32_t FTCTL;
97  reg32_t FWPWRITE0;
98  reg32_t FWPWRITE1;
99  reg32_t FWPWRITE2;
100  reg32_t FWPWRITE3;
101  reg32_t FWPWRITE4;
102  reg32_t FWPWRITE5;
103  reg32_t FWPWRITE6;
104  reg32_t FWPWRITE7;
105  reg32_t FWPWRITE_ECC;
106  reg32_t FSWSTAT;
107  reg32_t __reserved12[0x2E];
108  reg32_t FSM_GLBCTL;
109  reg32_t FSM_STATE;
110  reg32_t FSM_STAT;
111  reg32_t FSM_CMD;
112  reg32_t FSM_PE_OSU;
113  reg32_t FSM_VSTAT;
114  reg32_t FSM_PE_VSU;
115  reg32_t FSM_CMP_VSU;
116  reg32_t FSM_EX_VAL;
117  reg32_t FSM_RD_H;
118  reg32_t FSM_P_OH;
119  reg32_t FSM_ERA_OH;
120  reg32_t FSM_SAV_PPUL;
121  reg32_t FSM_PE_VH;
122  reg32_t __reserved13[2];
123  reg32_t FSM_PRG_PW;
124  reg32_t FSM_ERA_PW;
125  reg32_t __reserved14[3];
126  reg32_t FSM_SAV_ERA_PUL;
127  reg32_t FSM_TIMER;
128  reg32_t FSM_MODE;
129  reg32_t FSM_PGM;
130  reg32_t FSM_ERA;
131  reg32_t FSM_PRG_PUL;
132  reg32_t FSM_ERA_PUL;
133  reg32_t FSM_STEP_SIZE;
134  reg32_t FSM_PUL_CNTR;
136  reg32_t FSM_ST_MACHINE;
137  reg32_t FSM_FLES;
138  reg32_t __reserved15;
139  reg32_t FSM_WR_ENA;
140  reg32_t FSM_ACC_PP;
141  reg32_t FSM_ACC_EP;
142  reg32_t __reserved16[3];
143  reg32_t FSM_ADDR;
144  reg32_t FSM_SECTOR;
145  reg32_t FMC_REV_ID;
146  reg32_t FSM_ERR_ADDR;
147  reg32_t FSM_PGM_MAXPUL;
148  reg32_t FSM_EXECUTE;
149  reg32_t __reserved17[2];
150  reg32_t FSM_SECTOR1;
151  reg32_t FSM_SECTOR2;
152  reg32_t __reserved18[6];
153  reg32_t FSM_BSLE0;
154  reg32_t FSM_BSLE1;
155  reg32_t __reserved19[2];
156  reg32_t FSM_BSLP0;
157  reg32_t FSM_BSLP1;
158  reg32_t __reserved20[0x42];
159  reg32_t FCFG_BANK;
160  reg32_t FCFG_WRAPPER;
161  reg32_t FCFG_BNK_TYPE;
162  reg32_t __reserved21;
163  reg32_t FCFG_B0_START;
164  reg32_t FCFG_B1_START;
165  reg32_t FCFG_B2_START;
166  reg32_t FCFG_B3_START;
167  reg32_t FCFG_B4_START;
168  reg32_t FCFG_B5_START;
169  reg32_t FCFG_B6_START;
170  reg32_t FCFG_B7_START;
171  reg32_t FCFG_B0_SSIZE0;
172 } flash_regs_t;
173 
177 #define FLASH_BASEADDR 0x40030000
179 
180 #define FLASH ((flash_regs_t *)(FLASH_BASEADDR + 0x4))
186 typedef struct {
187  reg32_t STAT;
188  reg32_t CTL;
189 } vims_regs_t;
190 
194 #define VIMS_BASE 0x40034000
196 
197 #define VIMS ((vims_regs_t *)(VIMS_BASE + 0x4))
203 #define VIMS_CTL_STATS_CLR 0x80000000
204 #define VIMS_CTL_STATS_CLR_m 0x80000000
205 
206 #define VIMS_CTL_STATS_EN 0x40000000
207 #define VIMS_CTL_STATS_EN_m 0x40000000
208 
209 #define VIMS_CTL_DYN_CG_EN 0x20000000
210 #define VIMS_CTL_DYN_CG_EN_m 0x20000000
211 
212 #define VIMS_CTL_IDCODE_LB_DIS 0x00000020
213 #define VIMS_CTL_IDCODE_LB_DIS_m 0x00000020
214 
215 #define VIMS_CTL_SYSBUS_LB_DIS 0x00000010
216 #define VIMS_CTL_SYSBUS_LB_DIS_m 0x00000010
217 
218 #define VIMS_CTL_ARB_CFG 0x00000008
219 #define VIMS_CTL_ARB_CFG_m 0x00000008
220 
221 #define VIMS_CTL_PREF_EN 0x00000004
222 #define VIMS_CTL_PREF_EN_m 0x00000004
223 
224 #define VIMS_CTL_MODE_GPRAM 0x00000000
225 #define VIMS_CTL_MODE_CACHE 0x00000001
226 #define VIMS_CTL_MODE_SPLIT 0x00000002
227 #define VIMS_CTL_MODE_OFF 0x00000003
228 #define VIMS_CTL_MODE_m 0x00000003
229 
231 #ifdef __cplusplus
232 }
233 #endif
234 
235 #endif /* CC26x0_VIMS_H */
236 
reg32_t FBPRDY
FMC bank/pump ready.
Definition: cc26x0_vims.h:70
reg32_t FCFG_WRAPPER
FMC flash wrapper configuration.
Definition: cc26x0_vims.h:160
reg32_t FCFG_B5_START
FMC flash bank 5 starting address.
Definition: cc26x0_vims.h:168
VIMS registers.
Definition: cc26x0_vims.h:186
reg32_t FBSE
FMC sector enable.
Definition: cc26x0_vims.h:66
reg32_t FEFUSECTL
FMC efuse control.
Definition: cc26x0_vims.h:85
reg32_t FBAC
FMC bank access control.
Definition: cc26x0_vims.h:68
reg32_t FSM_ERA
FMC FSM erase bits.
Definition: cc26x0_vims.h:130
reg32_t FSM_STEP_SIZE
FMC FSM EC step size.
Definition: cc26x0_vims.h:133
reg32_t FVREADCT
FMC VREADCT trim.
Definition: cc26x0_vims.h:78
reg32_t FADDR
FMC bank address.
Definition: cc26x0_vims.h:94
reg32_t FMAC
FMC module access control.
Definition: cc26x0_vims.h:73
reg32_t EFUSEPINS
efuse pins
Definition: cc26x0_vims.h:49
reg32_t FSM_P_OH
FMC FSM program hold.
Definition: cc26x0_vims.h:118
reg32_t FPAC2
FMC pump access control 2.
Definition: cc26x0_vims.h:72
reg32_t FSM_STAT
FMC FSM status.
Definition: cc26x0_vims.h:110
reg32_t FCFG_B1_START
FMC flash bank 1 starting address.
Definition: cc26x0_vims.h:164
reg32_t FSM_PRG_PW
FMC FSM program pulse width.
Definition: cc26x0_vims.h:123
reg32_t FSM_PUL_CNTR
FMC FSM pulse counter.
Definition: cc26x0_vims.h:134
reg32_t TWOBIT
two-bit error status
Definition: cc26x0_vims.h:55
reg32_t DATALOWER
efuse data - lower
Definition: cc26x0_vims.h:41
reg32_t __reserved21
meh
Definition: cc26x0_vims.h:162
reg32_t FBBUSY
FMC bank busy.
Definition: cc26x0_vims.h:67
reg32_t EFUSEKEY
efuse key
Definition: cc26x0_vims.h:47
reg32_t FCFG_B7_START
FMC flash bank 7 starting address.
Definition: cc26x0_vims.h:170
reg32_t FVNVCT
FMC VNVCT trim.
Definition: cc26x0_vims.h:82
reg32_t EFUSECRA
efuse column repair address
Definition: cc26x0_vims.h:50
reg32_t STAT
FMC and efuse status.
Definition: cc26x0_vims.h:29
reg32_t FCFG_B0_START
FMC flash bank 0 starting address.
Definition: cc26x0_vims.h:163
reg32_t FPAC1
FMC pump access control 1.
Definition: cc26x0_vims.h:71
reg32_t SINGLEBIT
single-bit error status
Definition: cc26x0_vims.h:54
reg32_t FEFUSESTAT
FMC efuse status.
Definition: cc26x0_vims.h:86
reg32_t FSM_RD_H
FMC FSM read mode hold.
Definition: cc26x0_vims.h:117
reg32_t FSM_PE_VH
FMC FSM program/erase verify hold.
Definition: cc26x0_vims.h:121
reg32_t FBFALLBACK
FMC bank fallback power.
Definition: cc26x0_vims.h:69
reg32_t __reserved15
meh
Definition: cc26x0_vims.h:138
reg32_t CTL
control
Definition: cc26x0_vims.h:188
reg32_t FSM_CMP_VSU
FMC FSM compare verify setup.
Definition: cc26x0_vims.h:115
reg32_t FBPROT
FMC bank protection.
Definition: cc26x0_vims.h:65
reg32_t FSM_SECTOR2
FMC FSM sector erased 2.
Definition: cc26x0_vims.h:151
reg32_t FBSTROBES
FMC bank signal strobe.
Definition: cc26x0_vims.h:90
reg32_t FCFG_B0_SSIZE0
FMC flash bank 0 sector size.
Definition: cc26x0_vims.h:171
reg32_t CTL
config
Definition: cc26x0_vims.h:30
reg32_t FBMODE
FMC bank and pump mode.
Definition: cc26x0_vims.h:92
reg32_t EFUSECFG
OCP sysconf.
Definition: cc26x0_vims.h:42
reg32_t EFUSEADDR
efuse address
Definition: cc26x0_vims.h:39
reg32_t FSM_ERA_OH
FMC FSM erase operation hold.
Definition: cc26x0_vims.h:119
reg32_t FSM_BSLE0
FMC FSM bank sector lock erase 0.
Definition: cc26x0_vims.h:153
reg32_t FSM_BSLE1
FMC FSM bank sector lock erase 1.
Definition: cc26x0_vims.h:154
reg32_t __reserved2
meh
Definition: cc26x0_vims.h:31
reg32_t FSM_BSLP1
FMC FSM bank sector lock program 1.
Definition: cc26x0_vims.h:157
reg32_t FSM_ADDR
FMC FSM address.
Definition: cc26x0_vims.h:143
reg32_t FLOCK
FMC flash lock.
Definition: cc26x0_vims.h:76
reg32_t FRDCTL
FMC read control.
Definition: cc26x0_vims.h:59
reg32_t FSM_PE_OSU
FMC FSM program/erase operation setup.
Definition: cc26x0_vims.h:112
reg32_t SYSCODE_START
syscode start address offset config
Definition: cc26x0_vims.h:32
reg32_t FSM_BSLP0
FMC FSM bank sector lock program 0.
Definition: cc26x0_vims.h:156
reg32_t FSM_SECTOR
FMC sectors erased.
Definition: cc26x0_vims.h:144
reg32_t FVHVCT1
FMC VHVCT1 trim.
Definition: cc26x0_vims.h:79
reg32_t FSM_FLES
FMC FSM FLES memory control bits.
Definition: cc26x0_vims.h:137
reg32_t FCFG_BNK_TYPE
FMC flash bank type.
Definition: cc26x0_vims.h:161
reg32_t FSM_SECTOR1
FMC FSM sector erased 1.
Definition: cc26x0_vims.h:150
reg32_t FVHVCT3
FMC VHVCT3 trim.
Definition: cc26x0_vims.h:81
reg32_t FSM_SAV_PPUL
FMC FSM saved program pulses.
Definition: cc26x0_vims.h:120
reg32_t STAT
status
Definition: cc26x0_vims.h:187
reg32_t FVSLP
FMC VSL_P trim.
Definition: cc26x0_vims.h:83
reg32_t FSM_ERR_ADDR
FSM error address.
Definition: cc26x0_vims.h:146
reg32_t FWPWRITE2
FMC flash wide programming write data 2.
Definition: cc26x0_vims.h:99
reg32_t FWPWRITE3
FMC flash wide programming write data 3.
Definition: cc26x0_vims.h:100
reg32_t FSM_SAV_ERA_PUL
FMC FSM saved erased pulses.
Definition: cc26x0_vims.h:126
reg32_t FSM_CMD
FMC FSM command.
Definition: cc26x0_vims.h:111
reg32_t FSM_ACC_EP
FMC FSM accumulate erase pulses.
Definition: cc26x0_vims.h:141
reg32_t FSM_EC_STEP_HEIGHT
FMC FSM EC step height.
Definition: cc26x0_vims.h:135
reg32_t FSM_ST_MACHINE
FMC FSM ST MACHINE.
Definition: cc26x0_vims.h:136
reg32_t FSM_TIMER
FMC FSM timer.
Definition: cc26x0_vims.h:127
reg32_t FSM_EX_VAL
FMC FSM EXECUTEZ to valid data.
Definition: cc26x0_vims.h:116
reg32_t SELFTESTSIGN
self-test signature
Definition: cc26x0_vims.h:57
reg32_t FCFG_B4_START
FMC flash bank 4 starting address.
Definition: cc26x0_vims.h:167
reg32_t ACC
arbitrary instruction cound
Definition: cc26x0_vims.h:44
reg32_t EFUSERELEASE
efuese release
Definition: cc26x0_vims.h:48
reg32_t EFUSE
efuse instruction
Definition: cc26x0_vims.h:38
reg32_t FMSTAT
FMC module status.
Definition: cc26x0_vims.h:74
reg32_t FCFG_B2_START
FMC flash bank 2 starting address.
Definition: cc26x0_vims.h:165
reg32_t FSM_PGM
FMC FSM program bits.
Definition: cc26x0_vims.h:129
FLASH registers.
Definition: cc26x0_vims.h:27
reg32_t FCFG_B6_START
FMC flash bank 6 starting address.
Definition: cc26x0_vims.h:169
reg32_t FSM_ERA_PUL
FMC FSM maximum erase pulses.
Definition: cc26x0_vims.h:132
reg32_t FWPWRITE1
FMC flash wide programming write data 1.
Definition: cc26x0_vims.h:98
reg32_t EFUSEFLAG
efuse key loaded flag
Definition: cc26x0_vims.h:46
reg32_t FWPWRITE6
FMC flash wide programming write data 6.
Definition: cc26x0_vims.h:103
reg32_t FSM_EXECUTE
FMC FSM command execute.
Definition: cc26x0_vims.h:148
reg32_t FWPWRITE5
FMC flash wide programming write data 5.
Definition: cc26x0_vims.h:102
reg32_t FSM_ERA_PW
FMC FSM erase pulse width.
Definition: cc26x0_vims.h:124
reg32_t FWPWRITE_ECC
FMC flash wide programming ECC.
Definition: cc26x0_vims.h:105
reg32_t FTCTL
FMC test control.
Definition: cc26x0_vims.h:96
reg32_t FLASH_SIZE
flash size config
Definition: cc26x0_vims.h:33
reg32_t FSPRD
FMC read margin control.
Definition: cc26x0_vims.h:60
reg32_t EFUSEERROR
efuse error
Definition: cc26x0_vims.h:53
reg32_t FWPWRITE0
FMC flash wide programming write data 0.
Definition: cc26x0_vims.h:97
reg32_t FPSTROBES
FMC pump signal strobe.
Definition: cc26x0_vims.h:91
reg32_t FSEQPMP
FMC sequential pump information.
Definition: cc26x0_vims.h:88
reg32_t FSM_GLBCTL
FMC FSM global controll.
Definition: cc26x0_vims.h:108
reg32_t EFUSEREAD
efuse read
Definition: cc26x0_vims.h:51
reg32_t FTCR
FMC test command control.
Definition: cc26x0_vims.h:93
reg32_t FSM_WR_ENA
FMC FSM register write enable.
Definition: cc26x0_vims.h:139
reg32_t FSM_PE_VSU
FMC FSM program/erase verify setup.
Definition: cc26x0_vims.h:114
reg32_t EFUSESTAT
system status
Definition: cc26x0_vims.h:43
reg32_t FWPWRITE7
FMC flash wide programming write data 7.
Definition: cc26x0_vims.h:104
reg32_t FSM_PGM_MAXPUL
FMC FSM maximum program pulse.
Definition: cc26x0_vims.h:147
reg32_t FVWLCT
FMC VWLCT trim.
Definition: cc26x0_vims.h:84
reg32_t BOUNDARY
boundary test register to drive I/O
Definition: cc26x0_vims.h:45
reg32_t FCFG_BANK
FMC flash configuration bank.
Definition: cc26x0_vims.h:159
reg32_t FSM_PRG_PUL
FMC FSM maximum programming pulses.
Definition: cc26x0_vims.h:131
reg32_t FWPWRITE4
FMC flash wide programming write data 4.
Definition: cc26x0_vims.h:101
reg32_t FEFUSEDATA
FMC efuse data.
Definition: cc26x0_vims.h:87
reg32_t SELFTESTCYC
self-test cycles
Definition: cc26x0_vims.h:56
reg32_t FEDACSTAT
FMC error status.
Definition: cc26x0_vims.h:63
reg32_t FMC_REV_ID
FMC revision identification.
Definition: cc26x0_vims.h:145
reg32_t FSWSTAT
FMC software interface status.
Definition: cc26x0_vims.h:106
reg32_t EFUSEPROGRAM
efuse program
Definition: cc26x0_vims.h:52
reg32_t FSM_ACC_PP
FMC FSM accumulate program pulses.
Definition: cc26x0_vims.h:140
reg32_t FSM_VSTAT
FMC FSM voltage status setup.
Definition: cc26x0_vims.h:113
reg32_t DATAUPPER
efuse data - upper
Definition: cc26x0_vims.h:40
reg32_t FWLOCK
firmware lock
Definition: cc26x0_vims.h:35
reg32_t FEDACCTL1
FMC error correction control 1.
Definition: cc26x0_vims.h:61
reg32_t FSM_MODE
FMC FSM MODE.
Definition: cc26x0_vims.h:128
reg32_t FCFG_B3_START
FMC flash bank 3 starting address.
Definition: cc26x0_vims.h:166
reg32_t FWFLAG
firmware flags
Definition: cc26x0_vims.h:36
reg32_t FVHVCT2
FMC VHVCT2 trim.
Definition: cc26x0_vims.h:80
reg32_t FSM_STATE
FMC FSM state status.
Definition: cc26x0_vims.h:109