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cc26x0_i2c.h
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1 /*
2  * Copyright (C) 2016 Leon George
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser
5  * General Public License v2.1. See the file LICENSE in the top level
6  * directory for more details.
7  */
8 
19 #ifndef CC26x0_I2C_H
20 #define CC26x0_I2C_H
21 
22 #include "cc26x0.h"
23 
24 #ifdef __cplusplus
25 extern "C" {
26 #endif
27 
28 
32 typedef struct {
33  reg32_t SOAR;
34  union {
35  reg32_t SSTAT;
36  reg32_t SCTL;
37  };
38  reg32_t SDR;
39  reg32_t SIMR;
40  reg32_t SRIS;
41  reg32_t SMIS;
42  reg32_t SICR;
43  reg32_t __reserved[0x1F9];
44  reg32_t MSA;
45  union {
46  reg32_t MSTAT;
47  reg32_t MCTRL;
48  };
49  reg32_t MDR;
50  reg32_t MTPR;
51  reg32_t MIMR;
52  reg32_t MRIS;
53  reg32_t MMIS;
54  reg32_t MICR;
55  reg32_t MCR;
56 } i2c_regs_t;
57 
61 #define I2C_BASE (PERIPH_BASE + 0x2000)
64 #define I2C ((i2c_regs_t *) (I2C_BASE))
66 #ifdef __cplusplus
67 }
68 #endif
69 
70 #endif /* CC26x0_I2C_H */
71 
reg32_t SIMR
slave interrupt mask
Definition: cc26x0_i2c.h:39
reg32_t MIMR
master interrupt mask
Definition: cc26x0_i2c.h:51
I2C registers.
Definition: cc26x0_i2c.h:32
reg32_t MDR
master data
Definition: cc26x0_i2c.h:49
reg32_t MRIS
master raw interrupt status
Definition: cc26x0_i2c.h:52
reg32_t SOAR
slave own address
Definition: cc26x0_i2c.h:33
reg32_t SCTL
slave control
Definition: cc26x0_i2c.h:36
reg32_t MTPR
master timer period
Definition: cc26x0_i2c.h:50
reg32_t MMIS
master masked interrupt statues
Definition: cc26x0_i2c.h:53
reg32_t MCR
master configuration
Definition: cc26x0_i2c.h:55
reg32_t MSTAT
master status
Definition: cc26x0_i2c.h:46
reg32_t MCTRL
master control
Definition: cc26x0_i2c.h:47
reg32_t SRIS
slave raw interrupt status
Definition: cc26x0_i2c.h:40
reg32_t MICR
master interrupt clear
Definition: cc26x0_i2c.h:54
reg32_t SICR
slave interrupt clear
Definition: cc26x0_i2c.h:42
CC26x0 MCU interrupt definitions.
reg32_t SMIS
slave masked interrupt status
Definition: cc26x0_i2c.h:41
reg32_t SDR
slave data
Definition: cc26x0_i2c.h:38
reg32_t SSTAT
slave status
Definition: cc26x0_i2c.h:35
reg32_t MSA
master slave address
Definition: cc26x0_i2c.h:44