cc26x0_fcfg.h
Go to the documentation of this file.
1 /*
2  * Copyright (C) 2016 Leon George
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser General
5  * Public License v2.1. See the file LICENSE in the top level directory for more
6  * details.
7  */
16 #ifndef CC26X0_FCFG_H
17 #define CC26X0_FCFG_H
18 
19 #include <cc26xx_cc13xx.h>
20 
21 #ifdef __cplusplus
22 extern "C" {
23 #endif
24 
28 #define FCFG_BASE 0x50001000
30 
31 
34 typedef struct {
35  uint8_t __reserved1[0xA0];
36  /* TODO does it pad here? */
37  reg32_t MISC_CONF_1;
38  reg32_t __reserved2[8];
45  reg32_t CONFIG_SYNTH_DIV5;
47  reg32_t CONFIG_SYNTH_DIV10;
49  reg32_t CONFIG_SYNTH_DIV15;
50  reg32_t CONFIG_SYNTH_DIV30;
57  reg32_t __reserved3[3];
58  reg32_t SHDW_DIE_ID_0;
59  reg32_t SHDW_DIE_ID_1;
60  reg32_t SHDW_DIE_ID_2;
61  reg32_t SHDW_DIE_ID_3;
62  reg32_t __reserved4[4];
63  reg32_t SHDW_OSC_BIAS_LDO_TRIM;
64  reg32_t SHDW_ANA_TRIM;
65  reg32_t __reserved5[9];
66  reg32_t FLASH_NUMBER;
67  reg32_t FLASH_COORDINATE;
68  reg32_t FLASH_E_P;
69  reg32_t FLASH_C_E_P_R;
70  reg32_t FLASH_P_R_PV;
71  reg32_t FLASH_EH_SEQ;
72  reg32_t FLASH_VHV_E;
73  reg32_t FLASH_PP;
74  reg32_t FLASH_PROG_EP;
75  reg32_t FLASH_ERA_PW;
76  reg32_t FLASH_VHV;
77  reg32_t FLASH_VHV_PV;
78  reg32_t FLASH_V;
79  reg32_t __reserved6[0x3E];
80  reg32_t USER_ID;
81  reg32_t __reserved7[6];
82  reg32_t FLASH_OTP_DATA3;
83  reg32_t ANA2_TRIM;
84  reg32_t LDO_TRIM;
85  reg32_t __reserved8[0xB];
86  reg32_t MAC_BLE_0;
87  reg32_t MAC_BLE_1;
88  reg32_t MAC_15_4_0;
89  reg32_t MAC_15_4_1;
90  reg32_t __reserved9[4];
91  reg32_t FLASH_OTP_DATA4;
92  reg32_t MISC_TRIM;
93  reg32_t RCOSC_HF_TEMPCOMP;
94  reg32_t __reserved10;
95  reg32_t ICEPICK_DEVICE_ID;
96  reg32_t FCFG1_REVISION;
97  reg32_t MISC_OTP_DATA;
98  reg32_t __reserved11[8];
99  reg32_t IOCONF;
100  reg32_t __reserved12;
101  reg32_t CONFIG_IF_ADC;
102  reg32_t CONFIG_OSC_TOP;
104  reg32_t CONFIG_SYNTH;
105  reg32_t SOC_ADC_ABS_GAIN;
106  reg32_t SOC_ADC_REL_GAIN;
107  reg32_t __reserved13;
108  reg32_t SOC_ADC_OFFSET_INT;
109  reg32_t SOC_ADC_REF_TRIM_AND_OFFSET_EXT;
110  reg32_t AMPCOMP_TH1;
111  reg32_t AMPCOMP_TH2;
112  reg32_t AMPCOMP_CTRL1;
113  reg32_t ANABYPASS_VALUE2;
114  reg32_t CONFIG_MISC_ADC;
115  reg32_t __reserved14;
116  reg32_t VOLT_TRIM;
117  reg32_t OSC_CONF;
118  reg32_t __reserved15;
119  reg32_t CAP_TRIM;
120  reg32_t MISC_OTP_DATA_1;
121  reg32_t PWD_CURR_20C;
122  reg32_t PWD_CURR_35C;
123  reg32_t PWD_CURR_50C;
124  reg32_t PWD_CURR_65C;
125  reg32_t PWD_CURR_80C;
126  reg32_t PWD_CURR_95C;
127  reg32_t PWD_CURR_110C;
128  reg32_t PWD_CURR_125C;
129 } fcfg_regs_t;
130 
131 #define FCFG ((fcfg_regs_t *) (FCFG_BASE))
133 #ifdef __cplusplus
134 } /* end extern "C" */
135 #endif
136 
137 #endif /* CC26X0_FCFG_H */
138 
reg32_t CONFIG_RF_FRONTEND_DIV12
config of RF frontend in divide-by-12 mode
Definition: cc26x0_fcfg.h:42
reg32_t CONFIG_SYNTH_DIV12
config of synthesizer in divide-by-12-mode
Definition: cc26x0_fcfg.h:48
reg32_t CONFIG_RF_FRONTEND_DIV5
config of RF frontend in divide-by-5 mode
Definition: cc26x0_fcfg.h:39
reg32_t CONFIG_SYNTH
config of synthesizer in dividy-by-2-mode
Definition: cc26x0_fcfg.h:104
reg32_t CAP_TRIM
capacitor trim (it says &#39;capasitor&#39; in the manual - if you know what that is ;-)
Definition: cc26x0_fcfg.h:119
reg32_t CONFIG_RF_FRONTEND_DIV30
config of RF frontend in divide-by-30 mode
Definition: cc26x0_fcfg.h:44
reg32_t CONFIG_MISC_ADC_DIV30
config of IFADC in divide-by-30-mode
Definition: cc26x0_fcfg.h:56
reg32_t CONFIG_RF_FRONTEND_DIV10
config of RF frontend in divide-by-10 mode
Definition: cc26x0_fcfg.h:41
reg32_t CONFIG_RF_FRONTEND
config of RF frontend in dividy-by-2-mode
Definition: cc26x0_fcfg.h:103
reg32_t CONFIG_RF_FRONTEND_DIV6
config of RF frontend in divide-by-6 mode
Definition: cc26x0_fcfg.h:40
reg32_t CONFIG_MISC_ADC
config of IFADC in divide-by-2-mode
Definition: cc26x0_fcfg.h:114
reg32_t CONFIG_MISC_ADC_DIV6
config of IFADC in divide-by-6-mode
Definition: cc26x0_fcfg.h:52
reg32_t CONFIG_MISC_ADC_DIV15
config of IFADC in divide-by-15-mode
Definition: cc26x0_fcfg.h:55
reg32_t CONFIG_SYNTH_DIV6
config of synthesizer in divide-by-5-mode
Definition: cc26x0_fcfg.h:46
CC13x2 MCU interrupt definitions.
reg32_t CONFIG_MISC_ADC_DIV12
config of IFADC in divide-by-12-mode
Definition: cc26x0_fcfg.h:54
reg32_t CONFIG_MISC_ADC_DIV10
config of IFADC in divide-by-10-mode
Definition: cc26x0_fcfg.h:53
reg32_t CONFIG_MISC_ADC_DIV5
config of IFADC in divide-by-5-mode
Definition: cc26x0_fcfg.h:51
reg32_t CONFIG_RF_FRONTEND_DIV15
config of RF frontend in divide-by-15 mode
Definition: cc26x0_fcfg.h:43
FCFG registers.
Definition: cc13x2_fcfg.h:34