cc26x0_aux.h
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1 /*
2  * Copyright (C) 2016 Leon George
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser General
5  * Public License v2.1. See the file LICENSE in the top level directory for more
6  * details.
7  */
16 #ifndef CC26X0_AUX_H
17 #define CC26X0_AUX_H
18 
19 #include <stdbool.h>
20 
21 #include "cc26x0.h"
22 
23 #ifdef __cplusplus
24 extern "C" {
25 #endif
26 
27 
31 typedef struct {
32  reg32_t GPIODOUT;
33  reg32_t IOMODE;
34  reg32_t GPIODIN;
35  reg32_t GPIODOUTSET;
36  reg32_t GPIODOUTCLR;
37  reg32_t GPIODOUTTGL;
38  reg32_t GPIODIE;
40 
44 #define AUX_AIODIO0_BASE 0x400C1000
45 #define AUX_AIODIO1_BASE 0x400C2000
48 #define AUX_AIODIO0 ((aux_aiodio_regs_t *) (AUX_AIODIO0_BASE))
49 #define AUX_AIODIO1 ((aux_aiodio_regs_t *) (AUX_AIODIO1_BASE))
55 typedef struct {
56  reg32_t CTL;
57  reg32_t STAT;
58  reg32_t RESULT;
59  reg32_t SATCFG;
60  reg32_t TRIGSRC;
61  reg32_t TRIGCNT;
62  reg32_t TRIGCNTLOAD;
63  reg32_t TRIGCNTCFG;
64  reg32_t PRECTL;
65  reg32_t PRECNT;
67 
71 #define AUX_TDC_BASE 0x400C4000
74 #define AUX_TDC ((aux_tdc_regs_t *) (AUX_TDC_BASE))
80 typedef struct {
81  reg32_t VECCFG0;
82  reg32_t VECCFG1;
83  reg32_t SCEWEVSEL;
84  reg32_t EVTOAONFLAGS;
85  reg32_t EVTOAONPOL;
86  reg32_t DMACTL;
87  reg32_t SWEVSET;
88  reg32_t EVSTAT0;
89  reg32_t EVSTAT1;
90  reg32_t EVTOMCUPOL;
91  reg32_t EVTOMCUFLAGS;
92  reg32_t COMBEVTOMCUMASK;
93  reg32_t __reserved;
94  reg32_t VECFLAGS;
95  reg32_t EVTOMCUFLAGSCLR;
96  reg32_t EVTOAONFLAGSCLR;
97  reg32_t VECFLAGSCLR;
99 
103 #define AUX_EVCTL_BASE 0x400C5000
106 #define AUX_EVCTL ((aux_evctl_regs_t *) (AUX_EVCTL_BASE))
112 typedef struct {
113  reg32_t MODCLKEN0;
114  reg32_t PWROFFREQ;
115  reg32_t PWRDWNREQ;
116  reg32_t PWRDWNACK;
117  reg32_t CLKLFREQ;
118  reg32_t CLKLFACK;
119  reg32_t __reserved1[4];
120  reg32_t WUEVFLAGS;
121  reg32_t WUEVCLR;
122  reg32_t ADCCLKCTL;
123  reg32_t TDCCLKCTL;
124  reg32_t REFCLKCTL;
125  reg32_t RTCSUBSECINC0;
126  reg32_t RTCSUBSECINC1;
127  reg32_t RTCSUBSECINCCTL;
128  reg32_t MCUBUSCTL;
129  reg32_t MCUBUSSTAT;
130  reg32_t AONCTLSTAT;
131  reg32_t AUXIOLATCH;
132  reg32_t MODCLKEN1;
134 
139 #define MODCLKEN0_SMPH_EN 0x00000001 /* enable clock for AUX_SMPH */
140 #define MODCLKEN0_AIODIO0_EN 0x00000002 /* enable clock for AUX_AIODIO0 */
141 #define MODCLKEN0_AIODIO1_EN 0x00000004 /* enable clock for AUX_AIODIO1 */
142 #define MODCLKEN0_TIMER_EN 0x00000008 /* enable clock for AUX_TIMER */
143 #define MODCLKEN0_ANAIF_EN 0x00000010 /* enable clock for AUX_ANAIF */
144 #define MODCLKEN0_TDC_EN 0x00000020 /* enable clock for AUX_TDC */
145 #define MODCLKEN0_AUX_DDI0_OSC_EN 0x00000040 /* enable clock for AUX_DDI0_OSC */
146 #define MODCLKEN0_AUX_ADI4_EN 0x00000080 /* enable clock for AUX_ADI4 */
147 
152 #define AUX_WUC_BASE 0x400C6000
155 #define AUX_WUC ((aux_wuc_regs_t *) (AUX_WUC_BASE))
161 typedef struct {
162  reg32_t T0CFG;
163  reg32_t T1CFG;
164  reg32_t T0CTL;
165  reg32_t T0TARGET;
166  reg32_t T1TARGET;
167  reg32_t T1CTL;
169 
173 #define AUX_TIMER_BASE 0x400C7000
176 #define AUX_TIMER ((aux_timer_regs_t *) (AUX_TIMER_BASE))
182 typedef struct {
183  reg32_t SMPH0;
184  reg32_t SMPH1;
185  reg32_t SMPH2;
186  reg32_t SMPH3;
187  reg32_t SMPH4;
188  reg32_t SMPH5;
189  reg32_t SMPH6;
190  reg32_t SMPH7;
191  reg32_t AUTOTAKE;
193 
197 #define AUX_SMPH_BASE 0x400C8000
198 /* @} */
199 
200 #define AUX_SMPH ((aux_smph_regs_t *) (AUX_SMPH_BASE))
206 typedef struct {
207  reg32_t __reserved[4];
208  reg32_t ADCCTL;
209  reg32_t ADCFIFOSTAT;
210  reg32_t ADCFIFO;
211  reg32_t ADCTRIG;
212  reg32_t ISRCCTL;
214 
218 #define AUX_ANAIF_BASE 0x400C9000
221 #define AUX_ANAIF ((aux_anaif_regs_t *) (AUX_ANAIF_BASE))
227 typedef struct {
228  reg8_t MUX0;
229  reg8_t MUX1;
230  reg8_t MUX2;
231  reg8_t MUX3;
232  reg8_t ISRC;
233  reg8_t COMP;
234  reg8_t MUX4;
235  reg8_t ADC0;
236  reg8_t ADC1;
237  reg8_t ADCREF0;
238  reg8_t ADCREF1;
240 
244 #define ADI_4_AUX_BASE 0x400CB000
247 #define ADI_4_AUX ((adi_4_aux_regs_t *) (ADI_4_AUX_BASE))
250 #define ADDI_SEM AUX_SMPH->SMPH0
252 #ifdef __cplusplus
253 } /* end extern "C" */
254 #endif
255 
256 #endif /* CC26X0_AUX_H */
257 
reg8_t ADCREF0
ADC reference 0.
Definition: cc26x0_aux.h:237
reg32_t CTL
control
Definition: cc26x0_aux.h:56
reg32_t ADCFIFOSTAT
ADC fifo status.
Definition: cc26x0_aux.h:209
reg32_t AONCTLSTAT
AON domain control status.
Definition: cc26x0_aux.h:130
reg32_t PRECTL
prescaler control
Definition: cc26x0_aux.h:64
reg32_t EVTOMCUPOL
event to MCU domain polarity
Definition: cc26x0_aux.h:90
reg32_t AUTOTAKE
sticky request for single semaphore
Definition: cc26x0_aux.h:191
reg32_t __reserved
meh
Definition: cc26x0_aux.h:93
reg32_t CLKLFREQ
low frequency clock request
Definition: cc26x0_aux.h:117
reg32_t GPIODOUTSET
gpio data out set
Definition: cc26x0_aux.h:35
reg8_t MUX3
multiplexer 3
Definition: cc26x0_aux.h:231
reg32_t SATCFG
saturaion configuration
Definition: cc26x0_aux.h:59
reg32_t WUEVCLR
wake-up event clear
Definition: cc26x0_aux.h:121
reg8_t ADC0
ADC control 0.
Definition: cc26x0_aux.h:235
reg32_t PWRDWNREQ
power down request
Definition: cc26x0_aux.h:115
reg32_t MODCLKEN1
module clock enable 1
Definition: cc26x0_aux.h:132
reg32_t SMPH3
semaphore 3
Definition: cc26x0_aux.h:186
reg32_t REFCLKCTL
reference clock control
Definition: cc26x0_aux.h:124
reg32_t EVTOAONFLAGSCLR
events to AON domain clear
Definition: cc26x0_aux.h:96
AUX_AIODIO registers.
Definition: cc26x0_aux.h:31
AUX_SMPH registers.
Definition: cc26x0_aux.h:182
AUX_TDC registers.
Definition: cc26x0_aux.h:55
reg32_t VECFLAGSCLR
vector flags clear
Definition: cc26x0_aux.h:97
reg32_t WUEVFLAGS
wake-up event flags
Definition: cc26x0_aux.h:120
reg32_t GPIODOUT
gpio data out
Definition: cc26x0_aux.h:32
reg32_t STAT
status
Definition: cc26x0_aux.h:57
reg32_t T0CTL
timer 0 control
Definition: cc26x0_aux.h:164
reg32_t DMACTL
direct memoty access control
Definition: cc26x0_aux.h:86
reg32_t TRIGCNTLOAD
trigger counter load
Definition: cc26x0_aux.h:62
reg8_t MUX4
multiplexer 4
Definition: cc26x0_aux.h:234
reg32_t IOMODE
input output mode
Definition: cc26x0_aux.h:33
reg32_t VECCFG1
vector config 1
Definition: cc26x0_aux.h:82
reg32_t PRECNT
prescaler counter
Definition: cc26x0_aux.h:65
reg32_t SMPH2
semaphore 2
Definition: cc26x0_aux.h:185
reg32_t EVTOMCUFLAGS
event to MCU domain flags
Definition: cc26x0_aux.h:91
reg32_t ADCCTL
ADC control.
Definition: cc26x0_aux.h:208
reg32_t EVTOMCUFLAGSCLR
events to MCU domain flags clear
Definition: cc26x0_aux.h:95
reg32_t CLKLFACK
low frequency clock acknowledgement
Definition: cc26x0_aux.h:118
reg32_t T1CFG
timer 1 config
Definition: cc26x0_aux.h:163
reg32_t SWEVSET
software event set
Definition: cc26x0_aux.h:87
reg32_t EVTOAONFLAGS
events to AON domain flags
Definition: cc26x0_aux.h:84
reg32_t COMBEVTOMCUMASK
combined event to MCU domain mask
Definition: cc26x0_aux.h:92
reg32_t GPIODIE
gpio data input enable
Definition: cc26x0_aux.h:38
reg32_t EVSTAT0
event status 0
Definition: cc26x0_aux.h:88
reg32_t VECFLAGS
vector flags
Definition: cc26x0_aux.h:94
reg32_t EVSTAT1
event status 1
Definition: cc26x0_aux.h:89
reg32_t SMPH5
semaphore 5
Definition: cc26x0_aux.h:188
reg32_t VECCFG0
vector config 0
Definition: cc26x0_aux.h:81
reg32_t MCUBUSSTAT
MCU bus status.
Definition: cc26x0_aux.h:129
reg32_t RTCSUBSECINCCTL
real time counter sub second increment control
Definition: cc26x0_aux.h:127
reg32_t RTCSUBSECINC0
real time counter sub second increment 0
Definition: cc26x0_aux.h:125
reg32_t GPIODIN
gpio data in
Definition: cc26x0_aux.h:34
reg32_t AUXIOLATCH
AUX input output latch.
Definition: cc26x0_aux.h:131
reg8_t MUX1
multiplexer 1
Definition: cc26x0_aux.h:229
reg32_t RESULT
result
Definition: cc26x0_aux.h:58
reg32_t TDCCLKCTL
TDC clock control.
Definition: cc26x0_aux.h:123
reg32_t ADCTRIG
ADC trigger.
Definition: cc26x0_aux.h:211
reg8_t ADC1
ADC control 1.
Definition: cc26x0_aux.h:236
reg32_t SMPH1
semaphore 1
Definition: cc26x0_aux.h:184
reg32_t TRIGCNT
trigger counter
Definition: cc26x0_aux.h:61
reg8_t COMP
comparator
Definition: cc26x0_aux.h:233
reg32_t PWROFFREQ
power off request
Definition: cc26x0_aux.h:114
reg32_t MCUBUSCTL
MCU bus control.
Definition: cc26x0_aux.h:128
reg32_t SMPH0
semaphore 0
Definition: cc26x0_aux.h:183
reg32_t SMPH4
semaphore 4
Definition: cc26x0_aux.h:187
reg32_t ADCCLKCTL
ADC clock control.
Definition: cc26x0_aux.h:122
AUX_ANAIF registers.
Definition: cc26x0_aux.h:206
reg32_t MODCLKEN0
module clock enable
Definition: cc26x0_aux.h:113
AUX_TIMER registers.
Definition: cc26x0_aux.h:161
reg32_t T0TARGET
timer 0 target
Definition: cc26x0_aux.h:165
reg32_t T1CTL
timer 1 control
Definition: cc26x0_aux.h:167
AUX_WUC registers.
Definition: cc26x0_aux.h:112
reg32_t SMPH6
semaphore 6
Definition: cc26x0_aux.h:189
reg32_t SMPH7
semaphore 7
Definition: cc26x0_aux.h:190
reg8_t ISRC
current source
Definition: cc26x0_aux.h:232
reg8_t MUX2
multiplexer 2
Definition: cc26x0_aux.h:230
reg32_t RTCSUBSECINC1
real time counter sub second increment 1
Definition: cc26x0_aux.h:126
reg32_t EVTOAONPOL
events to AON domain polarity
Definition: cc26x0_aux.h:85
AUX_EVCTL registers.
Definition: cc26x0_aux.h:80
reg32_t T1TARGET
timer 1 target
Definition: cc26x0_aux.h:166
CC26x0 MCU interrupt definitions.
reg32_t GPIODOUTTGL
gpio data out toggle
Definition: cc26x0_aux.h:37
reg32_t ADCFIFO
ADC fifo.
Definition: cc26x0_aux.h:210
ADI_4_AUX registers.
Definition: cc26x0_aux.h:227
reg8_t ADCREF1
ADC reference 1.
Definition: cc26x0_aux.h:238
reg32_t PWRDWNACK
power down acknowledgement
Definition: cc26x0_aux.h:116
reg8_t MUX0
multiplexer 0
Definition: cc26x0_aux.h:228
reg32_t ISRCCTL
current source control
Definition: cc26x0_aux.h:212
reg32_t T0CFG
timer 0 config
Definition: cc26x0_aux.h:162
reg32_t SCEWEVSEL
sensor controller engine wait event selection
Definition: cc26x0_aux.h:83
reg32_t TRIGCNTCFG
trigger counter config
Definition: cc26x0_aux.h:63
reg32_t TRIGSRC
trigger source
Definition: cc26x0_aux.h:60
reg32_t GPIODOUTCLR
gpio data out clear
Definition: cc26x0_aux.h:36