cc2538_gpio.h
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1 /*
2  * Copyright (C) 2014 Loci Controls Inc.
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser
5  * General Public License v2.1. See the file LICENSE in the top level
6  * directory for more details.
7  */
8 
24 #ifndef CC2538_GPIO_H
25 #define CC2538_GPIO_H
26 
27 #include <stdint.h>
28 
29 #include "cc2538.h"
30 
31 #ifdef __cplusplus
32 extern "C" {
33 #endif
34 
39 enum {
40  PORT_A = 0,
41  PORT_B = 1,
42  PORT_C = 2,
43  PORT_D = 3,
44 };
47 #define GPIO_PORT_SHIFT 3
48 #define GPIO_BITS_PER_PORT ( 1 << GPIO_PORT_SHIFT )
49 #define GPIO_BIT_MASK ( GPIO_BITS_PER_PORT - 1 )
58 #define GPIO_PIN_MASK(n) ( 1 << (n) )
59 
67 #define GPIO_NUM_TO_PORT_NUM(gpio_num) ( (gpio_num) >> GPIO_PORT_SHIFT )
68 
76 #define GPIO_BIT_NUM(gpio_num) ( (gpio_num) & GPIO_BIT_MASK )
77 
86 #define GPIO_PXX_TO_NUM(port_num, bit_num) ( ((port_num) << GPIO_PORT_SHIFT) | (bit_num) )
87 
95 #define GPIO_NUM_TO_DEV(gpio_num) ( GPIO_A + GPIO_NUM_TO_PORT_NUM(gpio_num) )
96 
102 #define gpio_hardware_control(gpio_num) ( GPIO_NUM_TO_DEV(gpio_num)->AFSEL |= GPIO_PIN_MASK(GPIO_BIT_NUM(gpio_num)) )
103 
109 #define gpio_software_control(gpio_num) ( GPIO_NUM_TO_DEV(gpio_num)->AFSEL &= ~GPIO_PIN_MASK(GPIO_BIT_NUM(gpio_num)) )
110 
116 #define gpio_dir_output(gpio_num) ( GPIO_NUM_TO_DEV(gpio_num)->DIR |= GPIO_PIN_MASK(GPIO_BIT_NUM(gpio_num)) )
117 
123 #define gpio_dir_input(gpio_num) ( GPIO_NUM_TO_DEV(gpio_num)->DIR &= ~GPIO_PIN_MASK(GPIO_BIT_NUM(gpio_num)) )
124 
130 #define cc2538_gpio_read(gpio_num) ( (GPIO_NUM_TO_DEV(gpio_num)->DATA >> GPIO_BIT_NUM(gpio_num)) & 1 )
131 
137 #define cc2538_gpio_set(gpio_num) ( GPIO_NUM_TO_DEV(gpio_num)->DATA |= GPIO_PIN_MASK(GPIO_BIT_NUM(gpio_num)) )
138 
144 #define cc2538_gpio_clear(gpio_num) ( GPIO_NUM_TO_DEV(gpio_num)->DATA &= ~GPIO_PIN_MASK(GPIO_BIT_NUM(gpio_num)) )
145 
151 #define cc2538_gpio_toggle(gpio_num) ( GPIO_NUM_TO_DEV(gpio_num)->DATA ^= GPIO_PIN_MASK(GPIO_BIT_NUM(gpio_num)) )
152 
156 enum {
157  GPIO_PA0 = GPIO_PXX_TO_NUM(PORT_A, 0),
158  GPIO_PA1 = GPIO_PXX_TO_NUM(PORT_A, 1),
159  GPIO_PA2 = GPIO_PXX_TO_NUM(PORT_A, 2),
160  GPIO_PA3 = GPIO_PXX_TO_NUM(PORT_A, 3),
161  GPIO_PA4 = GPIO_PXX_TO_NUM(PORT_A, 4),
162  GPIO_PA5 = GPIO_PXX_TO_NUM(PORT_A, 5),
163  GPIO_PA6 = GPIO_PXX_TO_NUM(PORT_A, 6),
164  GPIO_PA7 = GPIO_PXX_TO_NUM(PORT_A, 7),
165  GPIO_PB0 = GPIO_PXX_TO_NUM(PORT_B, 0),
166  GPIO_PB1 = GPIO_PXX_TO_NUM(PORT_B, 1),
167  GPIO_PB2 = GPIO_PXX_TO_NUM(PORT_B, 2),
168  GPIO_PB3 = GPIO_PXX_TO_NUM(PORT_B, 3),
169  GPIO_PB4 = GPIO_PXX_TO_NUM(PORT_B, 4),
170  GPIO_PB5 = GPIO_PXX_TO_NUM(PORT_B, 5),
171  GPIO_PB6 = GPIO_PXX_TO_NUM(PORT_B, 6),
172  GPIO_PB7 = GPIO_PXX_TO_NUM(PORT_B, 7),
173  GPIO_PC0 = GPIO_PXX_TO_NUM(PORT_C, 0),
174  GPIO_PC1 = GPIO_PXX_TO_NUM(PORT_C, 1),
175  GPIO_PC2 = GPIO_PXX_TO_NUM(PORT_C, 2),
176  GPIO_PC3 = GPIO_PXX_TO_NUM(PORT_C, 3),
177  GPIO_PC4 = GPIO_PXX_TO_NUM(PORT_C, 4),
178  GPIO_PC5 = GPIO_PXX_TO_NUM(PORT_C, 5),
179  GPIO_PC6 = GPIO_PXX_TO_NUM(PORT_C, 6),
180  GPIO_PC7 = GPIO_PXX_TO_NUM(PORT_C, 7),
181  GPIO_PD0 = GPIO_PXX_TO_NUM(PORT_D, 0),
182  GPIO_PD1 = GPIO_PXX_TO_NUM(PORT_D, 1),
183  GPIO_PD2 = GPIO_PXX_TO_NUM(PORT_D, 2),
184  GPIO_PD3 = GPIO_PXX_TO_NUM(PORT_D, 3),
185  GPIO_PD4 = GPIO_PXX_TO_NUM(PORT_D, 4),
186  GPIO_PD5 = GPIO_PXX_TO_NUM(PORT_D, 5),
187  GPIO_PD6 = GPIO_PXX_TO_NUM(PORT_D, 6),
188  GPIO_PD7 = GPIO_PXX_TO_NUM(PORT_D, 7),
189 };
195 typedef struct {
196  cc2538_reg_t RESERVED1[255];
207  cc2538_reg_t RESERVED2[63];
210  cc2538_reg_t RESERVED3[118];
213  cc2538_reg_t RESERVED4[2];
215  cc2538_reg_t RESERVED5[1];
219  cc2538_reg_t RESERVED6[567];
220 } cc2538_gpio_t;
221 
225 typedef struct {
226  cc2538_reg_t SEL[32];
227  cc2538_reg_t OVER[32];
228 } cc2538_ioc_t;
229 
234 #define IOC_SEL_UART0_TXD (0)
235 #define IOC_SEL_UART1_RTS (1)
236 #define IOC_SEL_UART1_TXD (2)
237 #define IOC_SEL_SSI0_TXD (3)
238 #define IOC_SEL_SSI0_CLKOUT (4)
239 #define IOC_SEL_SSI0_FSSOUT (5)
240 #define IOC_SEL_SSI0_STXSER_EN (6)
241 #define IOC_SEL_SSI1_TXD (7)
242 #define IOC_SEL_SSI1_CLKOUT (8)
243 #define IOC_SEL_SSI1_FSSOUT (9)
244 #define IOC_SEL_SSI1_STXSER_EN (10)
245 #define IOC_SEL_I2C_CMSSDA (11)
246 #define IOC_SEL_I2C_CMSSCL (12)
247 #define IOC_SEL_GPT0_ICP1 (13)
248 #define IOC_SEL_GPT0_ICP2 (14)
249 #define IOC_SEL_GPT1_ICP1 (15)
250 #define IOC_SEL_GPT1_ICP2 (16)
251 #define IOC_SEL_GPT2_ICP1 (17)
252 #define IOC_SEL_GPT2_ICP2 (18)
253 #define IOC_SEL_GPT3_ICP1 (19)
254 #define IOC_SEL_GPT3_ICP2 (20)
261 #define IOC_OVERRIDE_OE 0x00000008
262 #define IOC_OVERRIDE_PUE 0x00000004
263 #define IOC_OVERRIDE_PDE 0x00000002
264 #define IOC_OVERRIDE_ANA 0x00000001
265 #define IOC_OVERRIDE_DIS 0x00000000
272 #define GPIO_A ((cc2538_gpio_t *)0x400d9000)
273 #define GPIO_B ((cc2538_gpio_t *)0x400da000)
274 #define GPIO_C ((cc2538_gpio_t *)0x400db000)
275 #define GPIO_D ((cc2538_gpio_t *)0x400dc000)
282 #define IOC ((cc2538_ioc_t *)0x400d4000)
285 #ifdef __cplusplus
286 } /* end extern "C" */
287 #endif
288 
289 #endif /* CC2538_GPIO_H */
290 
PC3.
Definition: cc2538_gpio.h:176
PD4.
Definition: cc2538_gpio.h:185
PB6.
Definition: cc2538_gpio.h:171
PB1.
Definition: cc2538_gpio.h:166
PB3.
Definition: cc2538_gpio.h:168
cc2538_reg_t IRQ_DETECT_ACK
GPIO_A IRQ Detect ACK register.
Definition: cc2538_gpio.h:216
PD0.
Definition: cc2538_gpio.h:181
cc2538_reg_t IC
GPIO_A Interrupt Clear register.
Definition: cc2538_gpio.h:205
PC4.
Definition: cc2538_gpio.h:177
PC1.
Definition: cc2538_gpio.h:174
PA0.
Definition: cc2538_gpio.h:157
cc2538_reg_t GPIOLOCK
GPIO_A Lock register.
Definition: cc2538_gpio.h:208
PD1.
Definition: cc2538_gpio.h:182
#define GPIO_PXX_TO_NUM(port_num, bit_num)
Generate a GPIO number given a port and bit number.
Definition: cc2538_gpio.h:86
cc2538_reg_t P_EDGE_CTRL
GPIO_A The Port Edge Control register.
Definition: cc2538_gpio.h:212
PC6.
Definition: cc2538_gpio.h:179
PA5.
Definition: cc2538_gpio.h:162
PB4.
Definition: cc2538_gpio.h:169
PC2.
Definition: cc2538_gpio.h:175
cc2538_reg_t RIS
GPIO_A Raw Interrupt Status register.
Definition: cc2538_gpio.h:203
PA7.
Definition: cc2538_gpio.h:164
cc2538_reg_t PMUX
GPIO_A The PMUX register.
Definition: cc2538_gpio.h:211
CC2538 MCU interrupt and register definitions.
cc2538_reg_t PI_IEN
GPIO_A The Power-up Interrupt Enable register.
Definition: cc2538_gpio.h:214
PC7.
Definition: cc2538_gpio.h:180
cc2538_reg_t MIS
GPIO_A Masked Interrupt Status register.
Definition: cc2538_gpio.h:204
PB5.
Definition: cc2538_gpio.h:170
cc2538_reg_t DIR
GPIO_A data direction register.
Definition: cc2538_gpio.h:198
cc2538_reg_t IBE
GPIO_A Interrupt Both-Edges register.
Definition: cc2538_gpio.h:200
PD2.
Definition: cc2538_gpio.h:183
PB0.
Definition: cc2538_gpio.h:165
cc2538_reg_t DATA
GPIO_A Data Register.
Definition: cc2538_gpio.h:197
PD6.
Definition: cc2538_gpio.h:187
PD5.
Definition: cc2538_gpio.h:186
cc2538_reg_t AFSEL
GPIO_A Alternate Function / mode control select register.
Definition: cc2538_gpio.h:206
PA1.
Definition: cc2538_gpio.h:158
PA4.
Definition: cc2538_gpio.h:161
cc2538_reg_t IRQ_DETECT_UNMASK
GPIO_A IRQ Detect ACK for masked interrupts.
Definition: cc2538_gpio.h:218
PB2.
Definition: cc2538_gpio.h:167
cc2538_reg_t IEV
GPIO_A Interrupt Event Register.
Definition: cc2538_gpio.h:201
cc2538_reg_t GPIOCR
GPIO_A Commit Register.
Definition: cc2538_gpio.h:209
PA2.
Definition: cc2538_gpio.h:159
PD7.
Definition: cc2538_gpio.h:188
PA6.
Definition: cc2538_gpio.h:163
cc2538_reg_t IE
GPIO_A Interrupt mask register.
Definition: cc2538_gpio.h:202
cc2538_reg_t IS
GPIO_A Interrupt Sense register.
Definition: cc2538_gpio.h:199
IOC port component registers.
Definition: cc2538_gpio.h:225
volatile uint32_t cc2538_reg_t
Least-significant 32 bits of the IEEE address.
Definition: cc2538.h:124
cc2538_reg_t USB_IRQ_ACK
GPIO_A IRQ Detect ACK for USB.
Definition: cc2538_gpio.h:217
PC0.
Definition: cc2538_gpio.h:173
GPIO port component registers.
Definition: cc2538_gpio.h:195
PA3.
Definition: cc2538_gpio.h:160
PC5.
Definition: cc2538_gpio.h:178
PB7.
Definition: cc2538_gpio.h:172
PD3.
Definition: cc2538_gpio.h:184