Driver for the cc2538 GPIO controller. More...

Detailed Description

Driver for the cc2538 GPIO controller.

Header file with register and macro declarations for the cc2538 GPIO module

Author
Ian Martin ian@l.nosp@m.ocic.nosp@m.ontro.nosp@m.ls.c.nosp@m.om

Definition in file cc2538_gpio.h.

#include <stdint.h>
#include "cc2538.h"
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Go to the source code of this file.

Data Structures

struct  cc2538_gpio_t
 GPIO port component registers. More...
 
struct  cc2538_ioc_t
 IOC port component registers. More...
 

Macros

#define GPIO_PORT_SHIFT   3
 Right-shift amount to obtain the port number from a GPIO number.
 
#define GPIO_BITS_PER_PORT   ( 1 << GPIO_PORT_SHIFT )
 Number of bits per GPIO port (8)
 
#define GPIO_BIT_MASK   ( GPIO_BITS_PER_PORT - 1 )
 Mask to obtain the bit number from a GPIO number.
 
#define PIN_MASK(n)   ( 1 << (n) )
 Generate a bit mask in which only the specified bit is high. More...
 
#define GPIO_NUM_TO_PORT_NUM(gpio_num)   ( (gpio_num) >> GPIO_PORT_SHIFT )
 Extract the GPIO port number (0-3) from a GPIO number (0-31) More...
 
#define GPIO_BIT_NUM(gpio_num)   ( (gpio_num) & GPIO_BIT_MASK )
 Extract the GPIO port bit number (0-7) from a GPIO number (0-31) More...
 
#define GPIO_PXX_TO_NUM(port_num, bit_num)   ( ((port_num) << GPIO_PORT_SHIFT) | (bit_num) )
 Generate a GPIO number given a port and bit number. More...
 
#define GPIO_NUM_TO_DEV(gpio_num)   ( GPIO_A + GPIO_NUM_TO_PORT_NUM(gpio_num) )
 Obtain the GPIO port instance given a GPIO number (0-31) More...
 
#define gpio_hardware_control(gpio_num)   ( GPIO_NUM_TO_DEV(gpio_num)->AFSEL |= PIN_MASK(GPIO_BIT_NUM(gpio_num)) )
 Enable hardware (peripheral) control for a given GPIO pin number. More...
 
#define gpio_software_control(gpio_num)   ( GPIO_NUM_TO_DEV(gpio_num)->AFSEL &= ~PIN_MASK(GPIO_BIT_NUM(gpio_num)) )
 Enable software control for a given GPIO pin number. More...
 
#define gpio_dir_output(gpio_num)   ( GPIO_NUM_TO_DEV(gpio_num)->DIR |= PIN_MASK(GPIO_BIT_NUM(gpio_num)) )
 Configure the given GPIO as an output. More...
 
#define gpio_dir_input(gpio_num)   ( GPIO_NUM_TO_DEV(gpio_num)->DIR &= ~PIN_MASK(GPIO_BIT_NUM(gpio_num)) )
 Configure the given GPIO as an input. More...
 
#define cc2538_gpio_read(gpio_num)   ( (GPIO_NUM_TO_DEV(gpio_num)->DATA >> GPIO_BIT_NUM(gpio_num)) & 1 )
 Read the value of the given pin. More...
 
#define cc2538_gpio_clear(gpio_num)   ( GPIO_NUM_TO_DEV(gpio_num)->DATA &= ~PIN_MASK(GPIO_BIT_NUM(gpio_num)) )
 Set a specific GPIO output pin low. More...
 
#define GPIO_BASE   (0x400d9000)
 GPIO port instance base address.
 
#define IOC   ((cc2538_ioc_t *)0x400d4000)
 IOC instance definition.
 
GPIO shift and masking
#define GPIO_PORTNUM_SHIFT   (12U)
 bit shift for GPIO port
 
#define GPIO_PORTNUM_MASK   (0x00007000)
 bit mask for GPIO port [0-3]
 
#define GPIO_PIN_MASK   (0x00000007)
 bit mask for GPIO pin [0-7]
 
#define GPIO_PORT_MASK   (0xfffff000)
 bit mask for GPIO port addr
 
GPIO instance definitions
Deprecated:
will be removed after adaption of periph drivers
#define GPIO_A   ((cc2538_gpio_t *)0x400d9000)
 GPIO Port A instance.
 
#define GPIO_B   ((cc2538_gpio_t *)0x400da000)
 GPIO Port B instance.
 
#define GPIO_C   ((cc2538_gpio_t *)0x400db000)
 GPIO Port C instance.
 
#define GPIO_D   ((cc2538_gpio_t *)0x400dc000)
 GPIO Port D instance.
 
Values for IOC_PXX_OVER
Deprecated:
will be removed after adaption of periph drivers, use cc2538_ioc_over_t instead
#define IOC_OVERRIDE_OE   0x00000008
 Output Enable.
 
#define IOC_OVERRIDE_PUE   0x00000004
 Pull Up Enable.
 
#define IOC_OVERRIDE_PDE   0x00000002
 Pull Down Enable.
 
#define IOC_OVERRIDE_ANA   0x00000001
 Analog Enable.
 
#define IOC_OVERRIDE_DIS   0x00000000
 Override Disabled.
 
Port control register addresses
Deprecated:
will be removed after adaption of periph drivers, use IOC->OVER and IOC->SEL instead
#define IOC_PXX_OVER   (IOC->OVER)
 
#define IOC_PXX_SEL   (IOC->SEL)
 

Enumerations

enum  cc2538_ioc_over_t {
  OVERRIDE_DISABLE = 0x0, OVERRIDE_ANALOG = 0x1, OVERRIDE_PULLDOWN = 0x2, OVERRIDE_PULLUP = 0x4,
  OVERRIDE_ENABLE = 0x8
}
 Values to override pin configuration.
 
Numeric representation of the four GPIO ports
enum  { PORT_A = 0, PORT_B = 1, PORT_C = 2, PORT_D = 3 }
 
Unique names for each GPIO port/pin combination
Deprecated:
will be removed after adaption of periph drivers, use GPIO_PIN macro instead
enum  {
  GPIO_PA0 = GPIO_PXX_TO_NUM(PORT_A, 0), GPIO_PA1 = GPIO_PXX_TO_NUM(PORT_A, 1), GPIO_PA2 = GPIO_PXX_TO_NUM(PORT_A, 2), GPIO_PA3 = GPIO_PXX_TO_NUM(PORT_A, 3),
  GPIO_PA4 = GPIO_PXX_TO_NUM(PORT_A, 4), GPIO_PA5 = GPIO_PXX_TO_NUM(PORT_A, 5), GPIO_PA6 = GPIO_PXX_TO_NUM(PORT_A, 6), GPIO_PA7 = GPIO_PXX_TO_NUM(PORT_A, 7),
  GPIO_PB0 = GPIO_PXX_TO_NUM(PORT_B, 0), GPIO_PB1 = GPIO_PXX_TO_NUM(PORT_B, 1), GPIO_PB2 = GPIO_PXX_TO_NUM(PORT_B, 2), GPIO_PB3 = GPIO_PXX_TO_NUM(PORT_B, 3),
  GPIO_PB4 = GPIO_PXX_TO_NUM(PORT_B, 4), GPIO_PB5 = GPIO_PXX_TO_NUM(PORT_B, 5), GPIO_PB6 = GPIO_PXX_TO_NUM(PORT_B, 6), GPIO_PB7 = GPIO_PXX_TO_NUM(PORT_B, 7),
  GPIO_PC0 = GPIO_PXX_TO_NUM(PORT_C, 0), GPIO_PC1 = GPIO_PXX_TO_NUM(PORT_C, 1), GPIO_PC2 = GPIO_PXX_TO_NUM(PORT_C, 2), GPIO_PC3 = GPIO_PXX_TO_NUM(PORT_C, 3),
  GPIO_PC4 = GPIO_PXX_TO_NUM(PORT_C, 4), GPIO_PC5 = GPIO_PXX_TO_NUM(PORT_C, 5), GPIO_PC6 = GPIO_PXX_TO_NUM(PORT_C, 6), GPIO_PC7 = GPIO_PXX_TO_NUM(PORT_C, 7),
  GPIO_PD0 = GPIO_PXX_TO_NUM(PORT_D, 0), GPIO_PD1 = GPIO_PXX_TO_NUM(PORT_D, 1), GPIO_PD2 = GPIO_PXX_TO_NUM(PORT_D, 2), GPIO_PD3 = GPIO_PXX_TO_NUM(PORT_D, 3),
  GPIO_PD4 = GPIO_PXX_TO_NUM(PORT_D, 4), GPIO_PD5 = GPIO_PXX_TO_NUM(PORT_D, 5), GPIO_PD6 = GPIO_PXX_TO_NUM(PORT_D, 6), GPIO_PD7 = GPIO_PXX_TO_NUM(PORT_D, 7)
}
 
Peripheral Signal Select Values (for IOC_Pxx_SEL registers)
enum  cc2538_ioc_sel_t {
  UART0_TXD = 0, UART1_RTS, UART1_TXD, SSI0_TXD,
  SSI0_CLK_OUT, SSI0_FSS_OUT, SSI0_TX_SER, SSI1_TXD,
  SSI1_CLK_OUT, SSI1_FSS_OUT, SSI1_TX_SER, I2C_SDA_OUT,
  I2C_SCL_OUT, GPT0_ICP1, GPT0_ICP2, GPT1_ICP1,
  GPT1_ICP2, GPT2_ICP1, GPT2_ICP2, GPT3_ICP1,
  GPT3_ICP2
}
 
Pin select for periphical functions
enum  cc2538_ioc_pin_t {
  UART0_RXD = 0, UART1_CTS, UART1_RXD, SSI0_CLK,
  SSI0_RXD, SSI0_FSS_IN, SSI0_CLK_IN, SSI1_CLK,
  SSI1_RXD, SSI1_FSS_IN, SSI1_CLK_IN, I2C_SDA_IN,
  I2C_SCL_IN, GPT0_OCP1, GPT0_OCP2, GPT1_OCP1,
  GPT1_OCP2, GPT2_OCP1, GPT2_OCP2, GPT3_OCP1,
  GPT3_OCP2
}