cc2538/include/periph_cpu.h
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1 /*
2  * Copyright (C) 2015-2016 Freie Universit├Ąt Berlin
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser
5  * General Public License v2.1. See the file LICENSE in the top level
6  * directory for more details.
7  */
8 
19 #ifndef PERIPH_CPU_H
20 #define PERIPH_CPU_H
21 
22 #include <stdint.h>
23 
24 #include "cpu.h"
25 
26 #ifdef __cplusplus
27 extern "C" {
28 #endif
29 
33 #define CPUID_ADDR (&IEEE_ADDR_MSWORD)
34 
37 #define CPUID_LEN (8U)
38 
43 #define HAVE_GPIO_T
44 typedef uint32_t gpio_t;
53 #define GPIO_PIN(port, pin) (gpio_t)(((uint32_t)GPIO_A + (port << 12)) | pin)
54 
58 #define GPIO_UNDEF 99
59 
63 typedef struct {
64  gpio_t scl_pin;
65  gpio_t sda_pin;
66 } i2c_conf_t;
67 
72 #define PERIPH_SPI_NEEDS_INIT_CS
73 #define PERIPH_SPI_NEEDS_TRANSFER_BYTE
74 #define PERIPH_SPI_NEEDS_TRANSFER_REG
75 #define PERIPH_SPI_NEEDS_TRANSFER_REGS
76 
82 #define HAVE_GPIO_MODE_T
83 typedef enum {
84  GPIO_IN = ((uint8_t)0x00),
87  GPIO_OUT = ((uint8_t)IOC_OVERRIDE_OE),
88  GPIO_OD = (0xff),
89  GPIO_OD_PU = (0xff)
90 } gpio_mode_t;
97 #define HAVE_SPI_MODE_T
98 typedef enum {
99  SPI_MODE_0 = 0,
100  SPI_MODE_1 = (SSI_CR0_SPH),
101  SPI_MODE_2 = (SSI_CR0_SPO),
102  SPI_MODE_3 = (SSI_CR0_SPO | SSI_CR0_SPH)
103 } spi_mode_t;
110 #define HAVE_SPI_CLK_T
111 typedef enum {
117 } spi_clk_t;
123 typedef struct {
124  uint8_t cpsr;
125  uint8_t scr;
127 
132 typedef struct {
134  gpio_t mosi_pin;
135  gpio_t miso_pin;
136  gpio_t sck_pin;
137  gpio_t cs_pin;
138 } spi_conf_t;
144 typedef struct {
146  uint_fast8_t channels;
147  uint_fast8_t cfg;
148 } timer_conf_t;
149 
150 #ifdef __cplusplus
151 }
152 #endif
153 
154 #include "periph/dev_enums.h"
155 
156 #endif /* PERIPH_CPU_H */
157 
uint_fast8_t channels
number of channels
CPOL=0, CPHA=1.
GPTIMER component registers.
I2C configuration options.
gpio_t cs_pin
pin used for CS
gpio_t miso_pin
pin used for MISO
gpio_t scl_pin
pin used for SCL
CPOL=0, CPHA=0.
drive the SPI bus with 100KHz
drive the SPI bus with 400KHz
#define IOC_OVERRIDE_PUE
Pull Up Enable.
Definition: cc2538_gpio.h:262
uint_fast8_t cfg
timer config word
Device enumerations for backward compatibility with existing peripheral driver implementations.
#define IOC_OVERRIDE_PDE
Pull Down Enable.
Definition: cc2538_gpio.h:263
CPOL=1, CPHA=1.
unsigned int gpio_t
GPIO type identifier.
Definition: gpio.h:69
Datafields for static SPI clock configuration values.
gpio_t sck_pin
pin used for SCK
drive the SPI bus with 5MHz
drive the SPI bus with 10MHz
drive the SPI bus with 1MHz
input, pull-up
#define IOC_OVERRIDE_OE
Output Enable.
Definition: cc2538_gpio.h:261
input, no pull
uint8_t scr
SCR clock divider.
not supported
gpio_t sda_pin
pin used for SDA
CPOL=1, CPHA=0.
SPI configuration data structure.
input, pull-down
cc2538_gptimer_t * dev
timer device
uint8_t cpsr
CPSR clock divider.
Timer configuration data.
gpio_t mosi_pin
pin used for MOSI
SSI component registers.
Definition: cc2538_ssi.h:31
cc2538_ssi_t * dev
SSI device.