periph_cpu.h
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1 /*
2  * Copyright (C) 2015-2016 Freie Universit├Ąt Berlin
3  * 2017 HAW Hamburg
4  *
5  * This file is subject to the terms and conditions of the GNU Lesser
6  * General Public License v2.1. See the file LICENSE in the top level
7  * directory for more details.
8  */
9 
21 #ifndef PERIPH_CPU_H
22 #define PERIPH_CPU_H
23 
24 #include <stdint.h>
25 #include <stdio.h>
26 
27 #include "vendor/hw_soc_adc.h"
28 
29 #include "cpu.h"
30 #include "vendor/hw_ssi.h"
31 #include "vendor/hw_uart.h"
32 
33 #ifdef __cplusplus
34 extern "C" {
35 #endif
36 
40 #define CPUID_ADDR (&IEEE_ADDR_MSWORD)
41 
45 #define CPUID_LEN (8U)
46 
51 #define HAVE_GPIO_T
52 typedef uint32_t gpio_t;
59 #define PROVIDES_PM_SET_LOWEST_CORTEXM
60 
65 #define GPIO_UNDEF (0xffffffff)
66 
70 #define GPIO_MUX_NONE (0xff)
71 
77 #define GPIO_PIN(port, pin) (gpio_t)(((uint32_t)GPIO_BASE + \
78  (port << GPIO_PORTNUM_SHIFT)) | pin)
79 
87 void gpio_init_af(gpio_t pin, uint8_t sel, uint8_t over);
88 
97 void gpio_init_mux(gpio_t pin, uint8_t over, uint8_t sel, uint8_t func);
98 
103 #define PERIPH_I2C_NEED_READ_REG
104 #define PERIPH_I2C_NEED_READ_REGS
105 #define PERIPH_I2C_NEED_WRITE_REG
106 #define PERIPH_I2C_NEED_WRITE_REGS
107 
109 #ifndef DOXYGEN
110 
114 #define HAVE_I2C_SPEED_T
115 typedef enum {
116  I2C_SPEED_LOW = 0x01,
117  I2C_SPEED_NORMAL = 100000U,
118  I2C_SPEED_FAST = 400000U,
119  I2C_SPEED_FAST_PLUS = 0x02,
120  I2C_SPEED_HIGH = 0x03,
121 } i2c_speed_t;
123 #endif /* ndef DOXYGEN */
124 
128 typedef struct {
130  gpio_t scl_pin;
131  gpio_t sda_pin;
132 } i2c_conf_t;
133 
138 #define PERIPH_SPI_NEEDS_INIT_CS
139 #define PERIPH_SPI_NEEDS_TRANSFER_BYTE
140 #define PERIPH_SPI_NEEDS_TRANSFER_REG
141 #define PERIPH_SPI_NEEDS_TRANSFER_REGS
142 
144 #ifndef DOXYGEN
145 
149 #define HAVE_GPIO_MODE_T
150 typedef enum {
151  GPIO_IN = ((uint8_t)OVERRIDE_DISABLE),
152  GPIO_IN_ANALOG = ((uint8_t)OVERRIDE_ANALOG),
153  GPIO_IN_PD = ((uint8_t)OVERRIDE_PULLDOWN),
154  GPIO_IN_PU = ((uint8_t)OVERRIDE_PULLUP),
155  GPIO_OUT = ((uint8_t)OVERRIDE_ENABLE),
156  GPIO_OD = (0xff),
157  GPIO_OD_PU = (0xff)
158 } gpio_mode_t;
160 #endif /* ndef DOXYGEN */
161 
166 typedef struct {
168  gpio_t rx_pin;
169  gpio_t tx_pin;
170  gpio_t cts_pin;
171  gpio_t rts_pin;
172 } uart_conf_t;
175 #ifndef DOXYGEN
176 
180 #define HAVE_UART_PARITY_T
181 typedef enum {
182  UART_PARITY_NONE = 0,
183  UART_PARITY_EVEN = (UART_LCRH_PEN | UART_LCRH_EPS),
184  UART_PARITY_ODD = UART_LCRH_PEN,
185  UART_PARITY_MARK = (UART_LCRH_PEN | UART_LCRH_SPS),
186  UART_PARITY_SPACE = (UART_LCRH_PEN | UART_LCRH_EPS | UART_LCRH_SPS)
187 } uart_parity_t;
194 #define HAVE_UART_DATA_BITS_T
195 typedef enum {
196  UART_DATA_BITS_5 = (0 << UART_LCRH_WLEN_S),
197  UART_DATA_BITS_6 = (1 << UART_LCRH_WLEN_S),
198  UART_DATA_BITS_7 = (2 << UART_LCRH_WLEN_S),
199  UART_DATA_BITS_8 = (3 << UART_LCRH_WLEN_S),
207 #define HAVE_UART_STOP_BITS_T
208 typedef enum {
209  UART_STOP_BITS_1 = 0,
210  UART_STOP_BITS_2 = UART_LCRH_STP2,
218 #define HAVE_SPI_MODE_T
219 typedef enum {
220  SPI_MODE_0 = 0,
221  SPI_MODE_1 = (SSI_CR0_SPH),
222  SPI_MODE_2 = (SSI_CR0_SPO),
223  SPI_MODE_3 = (SSI_CR0_SPO | SSI_CR0_SPH)
224 } spi_mode_t;
231 #define HAVE_SPI_CLK_T
232 typedef enum {
233  SPI_CLK_100KHZ = 0,
234  SPI_CLK_400KHZ = 1,
235  SPI_CLK_1MHZ = 2,
236  SPI_CLK_5MHZ = 3,
237  SPI_CLK_10MHZ = 4
238 } spi_clk_t;
240 #endif /* ndef DOXYGEN */
241 
245 typedef struct {
246  uint8_t cpsr;
247  uint8_t scr;
249 
250 #ifndef BOARD_HAS_SPI_CLK_CONF
251 
258 static const spi_clk_conf_t spi_clk_config[] = {
259  { .cpsr = 64, .scr = 4 }, /* 100khz */
260  { .cpsr = 16, .scr = 4 }, /* 400khz */
261  { .cpsr = 32, .scr = 0 }, /* 1.0MHz */
262  { .cpsr = 2, .scr = 2 }, /* 5.3MHz */
263  { .cpsr = 2, .scr = 1 } /* 8.0MHz */
264 };
265 #endif /* BOARD_HAS_SPI_CLK_CONF */
266 
271 typedef struct {
272  uint8_t num;
273  gpio_t mosi_pin;
274  gpio_t miso_pin;
275  gpio_t sck_pin;
276  gpio_t cs_pin;
277 } spi_conf_t;
286 typedef struct {
287  uint_fast8_t chn;
288  uint_fast8_t cfg;
289 } timer_conf_t;
290 
291 #ifndef DOXYGEN
292 
296 #define HAVE_ADC_RES_T
297 typedef enum {
298  ADC_RES_6BIT = (0xa00),
299  ADC_RES_7BIT = (0 << 4),
300  ADC_RES_8BIT = (0xb00),
301  ADC_RES_9BIT = (1 << 4),
302  ADC_RES_10BIT = (2 << 4),
303  ADC_RES_12BIT = (3 << 4),
304  ADC_RES_14BIT = (0xc00),
305  ADC_RES_16BIT = (0xd00),
306 } adc_res_t;
308 #endif /* ndef DOXYGEN */
309 
313 typedef gpio_t adc_conf_t;
314 
319 #define SOC_ADC_ADCCON3_EREF_INT (0 << SOC_ADC_ADCCON3_EREF_S)
320 #define SOC_ADC_ADCCON3_EREF_EXT (1 << SOC_ADC_ADCCON3_EREF_S)
321 #define SOC_ADC_ADCCON3_EREF_AVDD5 (2 << SOC_ADC_ADCCON3_EREF_S)
322 #define SOC_ADC_ADCCON3_EREF_DIFF (3 << SOC_ADC_ADCCON3_EREF_S)
329 #define SOCADC_7_BIT_RSHIFT (9U)
330 #define SOCADC_9_BIT_RSHIFT (7U)
331 #define SOCADC_10_BIT_RSHIFT (6U)
332 #define SOCADC_12_BIT_RSHIFT (4U)
335 #ifdef __cplusplus
336 }
337 #endif
338 
339 #endif /* PERIPH_CPU_H */
340 
fast mode: ~400 kbit/s
Definition: i2c.h:184
CPOL=0, CPHA=1.
Definition: spi.h:159
configure as output in push-pull mode
Definition: gpio.h:117
uart_data_bits_t
Definition of possible data bits lengths in a UART frame.
Definition: uart.h:141
high speed mode: ~3400 kbit/s
Definition: i2c.h:186
cc2538_uart_t * dev
pointer to the used UART device
Definition: periph_cpu.h:167
I2C configuration options.
Definition: periph_cpu.h:128
gpio_t cs_pin
pin used for CS
Definition: periph_cpu.h:276
ADC resolution: 12 bit.
Definition: adc.h:96
odd parity
Definition: uart.h:131
static const spi_clk_conf_t spi_clk_config[]
Pre-calculated clock divider values based on a CLOCK_CORECLOCK (32MHz)
Definition: periph_cpu.h:258
adc_res_t
Possible ADC resolution settings.
Definition: adc.h:92
mark parity
Definition: uart.h:132
uint8_t num
number of SSI device, i.e.
Definition: periph_cpu.h:272
gpio_t miso_pin
pin used for MISO
Definition: periph_cpu.h:274
uart_stop_bits_t
Definition of possible stop bits lengths in a UART frame.
Definition: uart.h:153
gpio_t scl_pin
pin used for SCL
Definition: periph_cpu.h:130
CPOL=0, CPHA=0.
Definition: spi.h:158
i2c_speed_t
Default mapping of I2C bus speed values.
Definition: i2c.h:181
drive the SPI bus with 100KHz
Definition: spi.h:174
space parity
Definition: uart.h:133
drive the SPI bus with 400KHz
Definition: spi.h:175
gpio_t rx_pin
pin used for RX
Definition: periph_cpu.h:168
no parity
Definition: uart.h:129
5 data bits
Definition: uart.h:142
spi_mode_t
Available SPI modes, defining the configuration of clock polarity and clock phase.
Definition: spi.h:157
uint_fast8_t cfg
timer config word
Definition: periph_cpu.h:288
gpio_t rts_pin
RTS pin - set to GPIO_UNDEF when not using.
Definition: periph_cpu.h:171
ADC resolution: 14 bit.
Definition: adc.h:97
uart_parity_t
Definition of possible parity modes.
Definition: uart.h:128
1 stop bit
Definition: uart.h:154
even parity
Definition: uart.h:130
ADC resolution: 10 bit.
Definition: adc.h:95
7 data bits
Definition: uart.h:144
spi_clk_t
Available SPI clock speeds.
Definition: spi.h:173
CPOL=1, CPHA=1.
Definition: spi.h:161
2 stop bits
Definition: uart.h:155
unsigned int gpio_t
GPIO type identifier.
Definition: gpio.h:86
gpio_t adc_conf_t
ADC configuration wrapper.
Definition: periph_cpu.h:313
ADC resolution: 16 bit.
Definition: adc.h:98
Datafields for static SPI clock configuration values.
Definition: periph_cpu.h:245
gpio_t sck_pin
pin used for SCK
Definition: periph_cpu.h:275
drive the SPI bus with 5MHz
Definition: spi.h:177
ADC resolution: 8 bit.
Definition: adc.h:94
uint_fast8_t chn
number of channels
Definition: periph_cpu.h:287
gpio_t tx_pin
pin used for TX
Definition: periph_cpu.h:169
ADC resolution: 6 bit.
Definition: adc.h:93
drive the SPI bus with 10MHz
Definition: spi.h:178
i2c_speed_t speed
baudrate used for the bus
Definition: periph_cpu.h:129
drive the SPI bus with 1MHz
Definition: spi.h:176
8 data bits
Definition: uart.h:145
6 data bits
Definition: uart.h:143
configure as input with pull-up resistor
Definition: gpio.h:116
void gpio_init_af(gpio_t pin, uint8_t sel, uint8_t over)
Configure an alternate function for the given pin.
void gpio_init_mux(gpio_t pin, uint8_t over, uint8_t sel, uint8_t func)
Configure an alternate function for the given pin.
UART device configuration.
Definition: periph_cpu.h:166
gpio_mode_t
Available pin modes.
Definition: gpio.h:113
configure as input without pull resistor
Definition: gpio.h:114
uint8_t scr
SCR clock divider.
Definition: periph_cpu.h:247
gpio_t cts_pin
CTS pin - set to GPIO_UNDEF when not using.
Definition: periph_cpu.h:170
UART component registers.
Definition: cc2538_uart.h:32
low speed mode: ~10 kbit/s
Definition: i2c.h:182
configure as output in open-drain mode without pull resistor
Definition: gpio.h:118
gpio_t sda_pin
pin used for SDA
Definition: periph_cpu.h:131
CPOL=1, CPHA=0.
Definition: spi.h:160
SPI configuration structure type.
Definition: periph_cpu.h:271
normal mode: ~100 kbit/s
Definition: i2c.h:183
configure as input with pull-down resistor
Definition: gpio.h:115
configure as output in open-drain mode with pull resistor enabled
Definition: gpio.h:120
uint8_t cpsr
CPSR clock divider.
Definition: periph_cpu.h:246
Timer configuration.
Definition: periph_cpu.h:286
gpio_t mosi_pin
pin used for MOSI
Definition: periph_cpu.h:273
fast plus mode: ~1000 kbit/s
Definition: i2c.h:185