cc2538/include/periph_cpu.h File Reference

CPU specific definitions for internal peripheral handling. More...

Detailed Description

CPU specific definitions for internal peripheral handling.

Author
Hauke Petersen hauke.nosp@m..pet.nosp@m.ersen.nosp@m.@fu-.nosp@m.berli.nosp@m.n.de
Sebastian Meiling s@mln.nosp@m.g.ne.nosp@m.t

Definition in file cc2538/include/periph_cpu.h.

#include <stdint.h>
#include <stdio.h>
#include "cpu.h"
#include "periph/dev_enums.h"
+ Include dependency graph for cc2538/include/periph_cpu.h:

Go to the source code of this file.

Data Structures

struct  i2c_conf_t
 I2C configuration options. More...
 
struct  spi_clk_conf_t
 Datafields for static SPI clock configuration values. More...
 
struct  spi_conf_t
 SPI module configuration options. More...
 
struct  timer_conf_t
 Timer configuration. More...
 

Macros

#define GPIO_UNDEF   (0xffffffff)
 Define custom value to speficy undefined or unused GPIOs.
 
#define GPIO_PIN(port, pin)
 Define a custom GPIO_PIN macro. More...
 
#define SOC_ADC_ADCCON1_EOC_MASK   (0x80)
 Mask to check end-of-conversion (EOC) bit.
 
#define CPUID_ADDR   (&IEEE_ADDR_MSWORD)
 Starting offset of CPU_ID.
 
#define CPUID_LEN   (8U)
 Length of the CPU_ID in octets.
 
Power management configuration
declare needed generic SPI functions
SOC_ADC_ADCCON3 register bit masks
#define SOC_ADC_ADCCON3_EREF   (0x000000C0)
 Reference voltage for extra.
 
#define SOC_ADC_ADCCON3_EDIV   (0x00000030)
 Decimation rate for extra.
 
#define SOC_ADC_ADCCON3_ECH   (0x0000000F)
 Single channel select.
 
SOC_ADC_ADCCONx registers field values
#define SOC_ADC_ADCCON_REF_INT   (0 << 6)
 Internal reference.
 
#define SOC_ADC_ADCCON_REF_EXT   (1 << 6)
 External reference on AIN7 pin.
 
#define SOC_ADC_ADCCON_REF_AVDD5   (2 << 6)
 AVDD5 pin.
 
#define SOC_ADC_ADCCON_REF_DIFF   (3 << 6)
 External reference on AIN6-AIN7 differential input.
 
#define SOC_ADC_ADCCON_CH_GND   (0xC)
 GND.
 
Masks for ADC raw data
#define SOC_ADC_ADCL_MASK   (0x000000FC)
 
#define SOC_ADC_ADCH_MASK   (0x000000FF)
 
Bit shift for data per ADC resolution
#define SOCADC_7_BIT_RSHIFT   (9U)
 Mask for getting data( 7 bits ENOB)
 
#define SOCADC_9_BIT_RSHIFT   (7U)
 Mask for getting data( 9 bits ENOB)
 
#define SOCADC_10_BIT_RSHIFT   (6U)
 Mask for getting data(10 bits ENOB)
 
#define SOCADC_12_BIT_RSHIFT   (4U)
 Mask for getting data(12 bits ENOB)
 

Typedefs

typedef gpio_t adc_conf_t
 ADC configuration wrapper.
 

Functions

void gpio_init_af (gpio_t pin, uint8_t sel, uint8_t over)
 Configure an alternate function for the given pin. More...
 

Define a custom type for GPIO pins

#define HAVE_GPIO_T
 
typedef uint32_t gpio_t
 

Override the default GPIO mode settings

#define HAVE_GPIO_MODE_T
 
enum  gpio_mode_t {
  GPIO_IN = ((uint8_t)OVERRIDE_DISABLE), GPIO_IN_ANALOG = ((uint8_t)OVERRIDE_ANALOG), GPIO_IN_PD = ((uint8_t)OVERRIDE_PULLDOWN), GPIO_IN_PU = ((uint8_t)OVERRIDE_PULLUP),
  GPIO_OUT = ((uint8_t)OVERRIDE_ENABLE), GPIO_OD = (0xff), GPIO_OD_PU = (0xff), GPIO_IN,
  GPIO_IN_PD, GPIO_IN_PU, GPIO_OUT, GPIO_OD,
  GPIO_OD_PU
}
 

Override SPI mode settings

#define HAVE_SPI_MODE_T
 
enum  spi_mode_t {
  SPI_MODE_0 = SPI_MODE_SEL(0, 0), SPI_MODE_1 = SPI_MODE_SEL(0, 1), SPI_MODE_2 = SPI_MODE_SEL(1, 0), SPI_MODE_3 = SPI_MODE_SEL(1, 1),
  SPI_MODE_0 = 0, SPI_MODE_1 = (SSI_CR0_SPH), SPI_MODE_2 = (SSI_CR0_SPO), SPI_MODE_3 = (SSI_CR0_SPO | SSI_CR0_SPH),
  SPI_MODE_0 = SSI_FRF_MOTO_MODE_0, SPI_MODE_1 = SSI_FRF_MOTO_MODE_1, SPI_MODE_2 = SSI_FRF_MOTO_MODE_2, SPI_MODE_3 = SSI_FRF_MOTO_MODE_0,
  SPI_MODE_0 = 0, SPI_MODE_1 = SPI_CONFIG_CPHA_Msk, SPI_MODE_2 = SPI_CONFIG_CPOL_Msk, SPI_MODE_3 = (SPI_CONFIG_CPOL_Msk | SPI_CONFIG_CPHA_Msk),
  SPI_MODE_0 = 0x0, SPI_MODE_1 = 0x1, SPI_MODE_2 = 0x2, SPI_MODE_3 = 0x3,
  SPI_MODE_0 = (SPI_CSR_NCPHA), SPI_MODE_1 = (0), SPI_MODE_2 = (SPI_CSR_CPOL | SPI_CSR_NCPHA), SPI_MODE_3 = (SPI_CSR_CPOL),
  SPI_MODE_0 = 0, SPI_MODE_1, SPI_MODE_2, SPI_MODE_3
}
 

Override SPI clock settings

@

#define HAVE_SPI_CLK_T
 
enum  spi_clk_t {
  SPI_CLK_100KHZ = SPI_CLK_SEL(0, 1, 1), SPI_CLK_400KHZ = SPI_CLK_SEL(1, 1, 0), SPI_CLK_1MHZ = SPI_CLK_SEL(0, 0, 1), SPI_CLK_5MHZ = SPI_CLK_SEL(0, 0, 0),
  SPI_CLK_10MHZ = SPI_CLK_SEL(1, 0, 0), SPI_CLK_100KHZ = 0, SPI_CLK_400KHZ = 1, SPI_CLK_1MHZ = 2,
  SPI_CLK_5MHZ = 3, SPI_CLK_10MHZ = 4, SPI_CLK_100KHZ = 100000, SPI_CLK_400KHZ = 400000,
  SPI_CLK_1MHZ = 1000000, SPI_CLK_4MHZ = 4000000, SPI_CLK_5MHZ = 5000000, SPI_CLK_10MHZ = 10000000,
  SPI_CLK_100KHZ = 100, SPI_CLK_400KHZ = 400, SPI_CLK_1MHZ = 1000, SPI_CLK_5MHZ = 5000,
  SPI_CLK_10MHZ = 10000, SPI_CLK_100KHZ = SPI_FREQUENCY_FREQUENCY_K125, SPI_CLK_400KHZ = SPI_FREQUENCY_FREQUENCY_K500, SPI_CLK_1MHZ = SPI_FREQUENCY_FREQUENCY_M1,
  SPI_CLK_5MHZ = SPI_FREQUENCY_FREQUENCY_M4, SPI_CLK_10MHZ = SPI_FREQUENCY_FREQUENCY_M8, SPI_CLK_100KHZ = 100000U, SPI_CLK_400KHZ = 400000U,
  SPI_CLK_1MHZ = 1000000U, SPI_CLK_5MHZ = 5000000U, SPI_CLK_10MHZ = 10000000U, SPI_CLK_100KHZ = (100000),
  SPI_CLK_400KHZ = (400000), SPI_CLK_1MHZ = (1000000), SPI_CLK_5MHZ = (5000000), SPI_CLK_10MHZ = (10000000),
  SPI_CLK_100KHZ = 0, SPI_CLK_400KHZ, SPI_CLK_1MHZ, SPI_CLK_5MHZ,
  SPI_CLK_10MHZ
}
 

Override resolution options

#define HAVE_ADC_RES_T
 
enum  adc_res_t {
  ADC_RES_6BIT = (0xa00), ADC_RES_7BIT = (0 << 4), ADC_RES_8BIT = (0xb00), ADC_RES_9BIT = (1 << 4),
  ADC_RES_10BIT = (2 << 4), ADC_RES_12BIT = (3 << 4), ADC_RES_14BIT = (0xc00), ADC_RES_16BIT = (0xd00),
  ADC_RES_6BIT = 0xf0, ADC_RES_8BIT = 0x00, ADC_RES_10BIT = 0x02, ADC_RES_12BIT = 0xf1,
  ADC_RES_14BIT = 0xf2, ADC_RES_16BIT = 0xf3, ADC_RES_6BIT = 0xf0, ADC_RES_8BIT = 0x00,
  ADC_RES_10BIT = 0x01, ADC_RES_12BIT = 0x02, ADC_RES_14BIT = 0xf1, ADC_RES_16BIT = 0xf2,
  ADC_RES_6BIT = 0x1, ADC_RES_8BIT = 0x2, ADC_RES_10BIT = ADC_MR_LOWRES_BITS_10, ADC_RES_12BIT = ADC_MR_LOWRES_BITS_12,
  ADC_RES_14BIT = 0x4, ADC_RES_16BIT = 0x8, ADC_RES_6BIT = 0xff, ADC_RES_8BIT = ADC_CTRLB_RESSEL_8BIT,
  ADC_RES_10BIT = ADC_CTRLB_RESSEL_10BIT, ADC_RES_12BIT = ADC_CTRLB_RESSEL_12BIT, ADC_RES_14BIT = 0xfe, ADC_RES_16BIT = 0xfd,
  ADC_RES_6BIT = 0xff, ADC_RES_8BIT = ADC_CTRLC_RESSEL_8BIT, ADC_RES_10BIT = ADC_CTRLC_RESSEL_10BIT, ADC_RES_12BIT = ADC_CTRLC_RESSEL_12BIT,
  ADC_RES_14BIT = 0xfe, ADC_RES_16BIT = 0xfd, ADC_RES_6BIT = 0x03000000, ADC_RES_8BIT = 0x02000000,
  ADC_RES_10BIT = 0x01000000, ADC_RES_12BIT = 0x00000000, ADC_RES_14BIT = 1, ADC_RES_16BIT = 2,
  ADC_RES_6BIT = (0x3 << 3), ADC_RES_8BIT = (0x2 << 3), ADC_RES_10BIT = (0x1 << 3), ADC_RES_12BIT = (0x0 << 3),
  ADC_RES_14BIT = (0xfe), ADC_RES_16BIT = (0xff), ADC_RES_6BIT = 0, ADC_RES_8BIT,
  ADC_RES_10BIT, ADC_RES_12BIT, ADC_RES_14BIT, ADC_RES_16BIT
}
 

Macro Definition Documentation

◆ GPIO_PIN

#define GPIO_PIN (   port,
  pin 
)
Value:
(gpio_t)(((uint32_t)GPIO_BASE + \
(port << GPIO_PORTNUM_SHIFT)) | pin)
unsigned int gpio_t
GPIO type identifier.
Definition: gpio.h:69
#define GPIO_BASE
GPIO port instance base address.
Definition: cc2538_gpio.h:214
#define GPIO_PORTNUM_SHIFT
bit shift for GPIO port
Definition: cc2538_gpio.h:220

Define a custom GPIO_PIN macro.

For the CC2538, we use OR the gpio ports base register address with the actual pin number.

Definition at line 69 of file cc2538/include/periph_cpu.h.

Enumeration Type Documentation

◆ adc_res_t

enum adc_res_t
Enumerator
ADC_RES_6BIT 

not supported by hardware

ADC_RES_7BIT 

ADC resolution: 7 bit.

ADC_RES_8BIT 

not supported by hardware

ADC_RES_9BIT 

ADC resolution: 9 bit.

ADC_RES_10BIT 

ADC resolution: 10 bit.

ADC_RES_12BIT 

ADC resolution: 12 bit.

ADC_RES_14BIT 

not supported by hardware

ADC_RES_16BIT 

not supported by hardware

ADC_RES_6BIT 

ADC resolution: 6 bit (not supported)

ADC_RES_8BIT 

ADC resolution: 8 bit.

ADC_RES_10BIT 

ADC resolution: 10 bit.

ADC_RES_12BIT 

ADC resolution: 12 bit (not supported)

ADC_RES_14BIT 

ADC resolution: 14 bit (not supported)

ADC_RES_16BIT 

ADC resolution: 16 bit (not supported)

ADC_RES_6BIT 

not supported by hardware

ADC_RES_8BIT 

ADC resolution: 8 bit.

ADC_RES_10BIT 

ADC resolution: 10 bit.

ADC_RES_12BIT 

ADC resolution: 12 bit.

ADC_RES_14BIT 

supported with oversampling, not implemented

ADC_RES_16BIT 

not supported by hardware

ADC_RES_6BIT 

not applicable

ADC_RES_8BIT 

not applicable

ADC_RES_10BIT 

ADC resolution: 10 bit.

ADC_RES_12BIT 

ADC resolution: 12 bit.

ADC_RES_14BIT 

not applicable

ADC_RES_16BIT 

not applicable

ADC_RES_6BIT 

not supported

ADC_RES_8BIT 

ADC resolution: 8 bit.

ADC_RES_10BIT 

ADC resolution: 10 bit.

ADC_RES_12BIT 

ADC resolution: 12 bit.

ADC_RES_14BIT 

not supported

ADC_RES_16BIT 

not supported

ADC_RES_6BIT 

not supported

ADC_RES_8BIT 

ADC resolution: 8 bit.

ADC_RES_10BIT 

ADC resolution: 10 bit.

ADC_RES_12BIT 

ADC resolution: 12 bit.

ADC_RES_14BIT 

not supported

ADC_RES_16BIT 

not supported

ADC_RES_6BIT 

ADC resolution: 6 bit.

ADC_RES_8BIT 

ADC resolution: 8 bit.

ADC_RES_10BIT 

ADC resolution: 10 bit.

ADC_RES_12BIT 

ADC resolution: 12 bit.

ADC_RES_14BIT 

ADC resolution: 14 bit (not supported)

ADC_RES_16BIT 

ADC resolution: 16 bit (not supported)

ADC_RES_6BIT 

ADC resolution: 6 bit.

ADC_RES_8BIT 

ADC resolution: 8 bit.

ADC_RES_10BIT 

ADC resolution: 10 bit.

ADC_RES_12BIT 

ADC resolution: 12 bit.

ADC_RES_14BIT 

not applicable

ADC_RES_16BIT 

not applicable

ADC_RES_6BIT 

ADC resolution: 6 bit.

ADC_RES_8BIT 

ADC resolution: 8 bit.

ADC_RES_10BIT 

ADC resolution: 10 bit.

ADC_RES_12BIT 

ADC resolution: 12 bit.

ADC_RES_14BIT 

ADC resolution: 14 bit.

ADC_RES_16BIT 

ADC resolution: 16 bit.

Definition at line 179 of file cc2538/include/periph_cpu.h.

◆ gpio_mode_t

Enumerator
GPIO_IN 

input, no pull

GPIO_IN_ANALOG 

input, analog

GPIO_IN_PD 

input, pull-down

GPIO_IN_PU 

input, pull-up

GPIO_OUT 

output

GPIO_OD 

not supported

GPIO_OD_PU 

not supported

GPIO_IN 

configure as input without pull resistor

GPIO_IN_PD 

configure as input with pull-down resistor

GPIO_IN_PU 

configure as input with pull-up resistor

GPIO_OUT 

configure as output in push-pull mode

GPIO_OD 

configure as output in open-drain mode without pull resistor

GPIO_OD_PU 

configure as output in open-drain mode with pull resistor enabled

Definition at line 104 of file cc2538/include/periph_cpu.h.

◆ spi_clk_t

enum spi_clk_t
Enumerator
SPI_CLK_100KHZ 

16/128 -> 125KHz

SPI_CLK_400KHZ 

16/32 -> 500KHz

SPI_CLK_1MHZ 

16/16 -> 1MHz

SPI_CLK_5MHZ 

16/4 -> 4MHz

SPI_CLK_10MHZ 

16/2 -> 8MHz

SPI_CLK_100KHZ 

drive the SPI bus with 100KHz

SPI_CLK_400KHZ 

drive the SPI bus with 400KHz

SPI_CLK_1MHZ 

drive the SPI bus with 1MHz

SPI_CLK_5MHZ 

drive the SPI bus with 5MHz

SPI_CLK_10MHZ 

drive the SPI bus with 10MHz

SPI_CLK_100KHZ 

drive the SPI bus with 100KHz

SPI_CLK_400KHZ 

drive the SPI bus with 400KHz

SPI_CLK_1MHZ 

drive the SPI bus with 1MHz

SPI_CLK_4MHZ 

drive the SPI bus with 4MHz

SPI_CLK_5MHZ 

drive the SPI bus with 5MHz

SPI_CLK_10MHZ 

drive the SPI bus with 10MHz

SPI_CLK_100KHZ 

drive the SPI bus with 100KHz

SPI_CLK_400KHZ 

drive the SPI bus with 400KHz

SPI_CLK_1MHZ 

drive the SPI bus with 1MHz

SPI_CLK_5MHZ 

drive the SPI bus with 5MHz

SPI_CLK_10MHZ 

drive the SPI bus with 10MHz

SPI_CLK_100KHZ 

100KHz

SPI_CLK_400KHZ 

400KHz

SPI_CLK_1MHZ 

1MHz

SPI_CLK_5MHZ 

5MHz

SPI_CLK_10MHZ 

10MHz

SPI_CLK_100KHZ 

drive the SPI bus with 100KHz

SPI_CLK_400KHZ 

drive the SPI bus with 400KHz

SPI_CLK_1MHZ 

drive the SPI bus with 1MHz

SPI_CLK_5MHZ 

drive the SPI bus with 5MHz

SPI_CLK_10MHZ 

drive the SPI bus with 10MHz

SPI_CLK_100KHZ 

100KHz

SPI_CLK_400KHZ 

400KHz

SPI_CLK_1MHZ 

1MHz

SPI_CLK_5MHZ 

5MHz

SPI_CLK_10MHZ 

10MHz

SPI_CLK_100KHZ 

drive the SPI bus with 100KHz

SPI_CLK_400KHZ 

drive the SPI bus with 400KHz

SPI_CLK_1MHZ 

drive the SPI bus with 1MHz

SPI_CLK_5MHZ 

drive the SPI bus with 5MHz

SPI_CLK_10MHZ 

drive the SPI bus with 10MHz

Definition at line 133 of file cc2538/include/periph_cpu.h.

◆ spi_mode_t

enum spi_mode_t
Enumerator
SPI_MODE_0 

mode 0

SPI_MODE_1 

mode 1

SPI_MODE_2 

mode 2

SPI_MODE_3 

mode 3

SPI_MODE_0 

CPOL=0, CPHA=0.

SPI_MODE_1 

CPOL=0, CPHA=1.

SPI_MODE_2 

CPOL=1, CPHA=0.

SPI_MODE_3 

CPOL=1, CPHA=1.

SPI_MODE_0 

CPOL=0, CPHA=0.

SPI_MODE_1 

CPOL=0, CPHA=1.

SPI_MODE_2 

CPOL=1, CPHA=0.

SPI_MODE_3 

CPOL=1, CPHA=1.

SPI_MODE_0 

CPOL=0, CPHA=0.

SPI_MODE_1 

CPOL=0, CPHA=1.

SPI_MODE_2 

CPOL=1, CPHA=0.

SPI_MODE_3 

CPOL=1, CPHA=1.

SPI_MODE_0 

CPOL=0, CPHA=0.

SPI_MODE_1 

CPOL=0, CPHA=1.

SPI_MODE_2 

CPOL=1, CPHA=0.

SPI_MODE_3 

CPOL=1, CPHA=1.

SPI_MODE_0 

CPOL=0, CPHA=0.

SPI_MODE_1 

CPOL=0, CPHA=1.

SPI_MODE_2 

CPOL=1, CPHA=0.

SPI_MODE_3 

CPOL=1, CPHA=1.

SPI_MODE_0 

CPOL=0, CPHA=0.

SPI_MODE_1 

CPOL=0, CPHA=1.

SPI_MODE_2 

CPOL=1, CPHA=0.

SPI_MODE_3 

CPOL=1, CPHA=1.

Definition at line 120 of file cc2538/include/periph_cpu.h.

Function Documentation

◆ gpio_init_af()

void gpio_init_af ( gpio_t  pin,
uint8_t  sel,
uint8_t  over 
)

Configure an alternate function for the given pin.

Parameters
[in]pingpio pin
[in]selSelect pin peripheral function
[in]overOverride pin configuration