boards/weio/include/periph_conf.h
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1 /*
2  * Copyright (C) 2014 Freie Universit├Ąt Berlin
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser General
5  * Public License v2.1. See the file LICENSE in the top level directory for more
6  * details.
7  */
8 
20 #ifndef PERIPH_CONF_H
21 #define PERIPH_CONF_H
22 
23 #include "periph_cpu.h"
24 
25 #ifdef __cplusplus
26 extern "C" {
27 #endif
28 
33 #define CLOCK_CORECLOCK (48000000U)
34 
40 #define TIMER_NUMOF (1U)
41 #define TIMER_0_EN 1
42 #define TIMER_IRQ_PRIO 1
43 
44 /* Timer 0 configuration */
45 #define TIMER_0_DEV LPC_CT32B1
46 #define TIMER_0_CHANNELS 4
47 #define TIMER_0_FREQ (48000000ul)
48 #define TIMER_0_MAX_VALUE (0xffffffff)
49 #define TIMER_0_CLKEN() (LPC_SYSCON->SYSAHBCLKCTRL |= (1 << 10))
50 #define TIMER_0_CLKDIS() (LPC_SYSCON->SYSAHBCLKCTRL &= ~(1 << 10))
51 #define TIMER_0_ISR isr_ct32b1
52 #define TIMER_0_IRQ TIMER_32_1_IRQn
53 /* @} */
54 
59 #define UART_NUMOF (1U)
60 #define UART_0_EN 1
61 #define UART_IRQ_PRIO 2
62 
63 /* UART 0 device configuration */
64 #define UART_0_DEV LPC_USART
65 #define UART_0_CLKSEL() (LPC_SYSCON->UARTCLKDIV = (1)) /* PCLK := CCLK / 1 */
66 #define UART_0_CLKEN() (LPC_SYSCON->SYSAHBCLKCTRL |= (1 << 12))
67 #define UART_0_CLKDIS() (LPC_SYSCON->SYSAHBCLKCTRL &= ~(1 << 12))
68 #define UART_0_IRQ UART_IRQn
69 #define UART_0_ISR isr_usart0
70 /* UART 0 pin configuration */
71 #define UART_0_TX_PINSEL (LPC_IOCON->PIO0_19)
72 #define UART_0_RX_PINSEL (LPC_IOCON->PIO0_18)
73 #define UART_0_TX_PINMODE (LPC_IOCON->PIO0_19)
74 #define UART_0_RX_PINMODE (LPC_IOCON->PIO0_18)
75 #define UART_0_TX_PIN (1)
76 #define UART_0_RX_PIN (2)
77 #define UART_0_AF (1)
78 /* @} */
79 
84 static const spi_conf_t spi_config[] = {
85  {
86  .dev = LPC_SSP0,
87  .preset_bit = (1 << 0),
88  .ahb_bit = (1 << 11)
89  },
90  {
91  .dev = LPC_SSP1,
92  .preset_bit = (1 << 2),
93  .ahb_bit = (1 << 18)
94  }
95 };
96 
97 #define SPI_NUMOF (sizeof(spi_config) / sizeof(spi_config[0]))
98 /* @} */
99 
104 static const pwm_conf_t pwm_config[] = {
105  {
106  .dev = LPC_CT16B0,
107  .pins = {
108  &LPC_IOCON->PIO1_13,
109  &LPC_IOCON->PIO1_14,
110  &LPC_IOCON->PIO1_15
111  },
112  .clk_bit = BIT7,
113  .af = 0x02
114  },
115  {
116  .dev = LPC_CT32B0,
117  .pins = {
118  &LPC_IOCON->PIO1_24,
119  &LPC_IOCON->PIO1_25,
120  &LPC_IOCON->PIO1_26
121  },
122  .clk_bit = BIT9,
123  .af = 0x01
124  }
125 };
126 
127 #define PWM_NUMOF (sizeof(pwm_config) / sizeof(pwm_config[0]))
128 /* @} */
129 
130 #ifdef __cplusplus
131 }
132 #endif
133 
134 #endif /* PERIPH_CONF_H */
135 
PWM configuration structure.
LPC_CTxxBx_Type * dev
PWM device.
SPI module configuration options.
cc2538_ssi_t * dev
SSI device.