boards/stm32f0discovery/include/periph_conf.h
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1 /*
2  * Copyright (C) 2014 Freie Universit├Ąt Berlin
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser General
5  * Public License v2.1. See the file LICENSE in the top level directory for more
6  * details.
7  */
8 
19 #ifndef PERIPH_CONF_H
20 #define PERIPH_CONF_H
21 
22 #include "periph_cpu.h"
23 
24 #ifdef __cplusplus
25 extern "C" {
26 #endif
27 
32 #define CLOCK_HSE (8000000U) /* external oscillator */
33 #define CLOCK_CORECLOCK (48000000U) /* desired core clock frequency */
34 
35 /* the actual PLL values are automatically generated */
36 #define CLOCK_PLL_MUL (CLOCK_CORECLOCK / CLOCK_HSE)
37 
38 /* bus clocks for simplified peripheral initialization, UPDATE MANUALLY! */
39 #define CLOCK_AHB (CLOCK_CORECLOCK / 1)
40 #define CLOCK_APB2 (CLOCK_CORECLOCK / 1)
41 #define CLOCK_APB1 (CLOCK_CORECLOCK / 1)
42 
48 static const timer_conf_t timer_config[] = {
49  {
50  .dev = TIM2,
51  .max = 0xffffffff,
52  .rcc_mask = RCC_APB1ENR_TIM2EN,
53  .bus = APB1,
54  .irqn = TIM2_IRQn
55  }
56 };
57 
58 #define TIMER_0_ISR isr_tim2
59 
60 #define TIMER_NUMOF (sizeof(timer_config) / sizeof(timer_config[0]))
61 
67 static const uart_conf_t uart_config[] = {
68  {
69  .dev = USART1,
70  .rcc_mask = RCC_APB2ENR_USART1EN,
71  .rx_pin = GPIO_PIN(PORT_B, 7),
72  .tx_pin = GPIO_PIN(PORT_B, 6),
73  .rx_af = GPIO_AF0,
74  .tx_af = GPIO_AF0,
75  .bus = APB2,
76  .irqn = USART1_IRQn,
77  },
78  {
79  .dev = USART2,
80  .rcc_mask = RCC_APB1ENR_USART2EN,
81  .rx_pin = GPIO_PIN(PORT_A, 3),
82  .tx_pin = GPIO_PIN(PORT_A, 2),
83  .rx_af = GPIO_AF1,
84  .tx_af = GPIO_AF1,
85  .bus = APB1,
86  .irqn = USART2_IRQn
87  }
88 };
89 
90 #define UART_0_ISR (isr_usart1)
91 #define UART_1_ISR (isr_usart2)
92 
93 #define UART_NUMOF (sizeof(uart_config) / sizeof(uart_config[0]))
94 
103 #define ADC_CONFIG { \
104  { GPIO_PIN(PORT_C, 0), 10 },\
105  { GPIO_PIN(PORT_C, 1), 11 },\
106  { GPIO_PIN(PORT_C, 2), 12 },\
107  { GPIO_PIN(PORT_C, 3), 13 },\
108  { GPIO_PIN(PORT_C, 4), 14 },\
109  { GPIO_PIN(PORT_C, 5), 15 } \
110 }
111 
112 #define ADC_NUMOF (6)
113 
119 #define DAC_NUMOF (0)
120 
126 static const uint8_t spi_divtable[2][5] = {
127  { /* for APB1 @ 48000000Hz */
128  7, /* -> 187500Hz */
129  6, /* -> 375000Hz */
130  5, /* -> 750000Hz */
131  2, /* -> 6000000Hz */
132  1 /* -> 12000000Hz */
133  },
134  { /* for APB2 @ 48000000Hz */
135  7, /* -> 187500Hz */
136  6, /* -> 375000Hz */
137  5, /* -> 750000Hz */
138  2, /* -> 6000000Hz */
139  1 /* -> 12000000Hz */
140  }
141 };
142 
143 static const spi_conf_t spi_config[] = {
144  {
145  .dev = SPI1,
146  .mosi_pin = GPIO_PIN(PORT_A, 7),
147  .miso_pin = GPIO_PIN(PORT_A, 6),
148  .sclk_pin = GPIO_PIN(PORT_A, 5),
149  .cs_pin = GPIO_UNDEF,
150  .af = GPIO_AF0,
151  .rccmask = RCC_APB2ENR_SPI1EN,
152  .apbbus = APB2
153  },
154  {
155  .dev = SPI2,
156  .mosi_pin = GPIO_PIN(PORT_B, 15),
157  .miso_pin = GPIO_PIN(PORT_B, 14),
158  .sclk_pin = GPIO_PIN(PORT_B, 13),
159  .cs_pin = GPIO_UNDEF,
160  .af = GPIO_AF0,
161  .rccmask = RCC_APB1ENR_SPI2EN,
162  .apbbus = APB1
163  }
164 };
165 
166 #define SPI_NUMOF (sizeof(spi_config) / sizeof(spi_config[0]))
167 
169 #ifdef __cplusplus
170 }
171 #endif
172 
173 #endif /* PERIPH_CONF_H */
USART_TypeDef * dev
USART device used.
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
use alternate function 1
use alternate function 0
UART device configuration.
#define GPIO_UNDEF
Define a custom GPIO_UNDEF value.
SPI configuration data structure.
cc2538_gptimer_t * dev
timer device
Timer configuration data.
cc2538_ssi_t * dev
SSI device.