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periph_conf.h
Go to the documentation of this file.
1/*
2 * Copyright (C) 2016 Inria
3 *
4 * This file is subject to the terms and conditions of the GNU Lesser
5 * General Public License v2.1. See the file LICENSE in the top level
6 * directory for more details.
7 */
8
22#ifndef PERIPH_CONF_H
23#define PERIPH_CONF_H
24
25/* This board provides an HSE */
26#ifndef CONFIG_BOARD_HAS_HSE
27#define CONFIG_BOARD_HAS_HSE 1
28#endif
29
30#include "periph_cpu.h"
31#include "clk_conf.h"
32
33#ifdef __cplusplus
34extern "C" {
35#endif
36
41static const timer_conf_t timer_config[] = {
42 {
43 .dev = TIM1,
44 .max = 0x0000ffff,
45 .rcc_mask = RCC_APB2ENR_TIM1EN,
46 .bus = APB2,
47 .irqn = TIM1_CC_IRQn
48 },
49 {
50 .dev = TIM3,
51 .max = 0x0000ffff,
52 .rcc_mask = RCC_APB1ENR_TIM3EN,
53 .bus = APB1,
54 .irqn = TIM3_IRQn
55 },
56};
57
58#define TIMER_0_ISR (isr_tim1_cc)
59#define TIMER_1_ISR (isr_tim3)
60
61#define TIMER_NUMOF ARRAY_SIZE(timer_config)
68static const uart_conf_t uart_config[] = {
69 {
70 .dev = USART1,
71 .rcc_mask = RCC_APB2ENR_USART1EN,
72 .rx_pin = GPIO_PIN(PORT_A, 10),
73 .tx_pin = GPIO_PIN(PORT_A, 9),
74 .rx_af = GPIO_AF1,
75 .tx_af = GPIO_AF1,
76 .bus = APB2,
77 .irqn = USART1_IRQn
78 }
79};
80
81#define UART_0_ISR (isr_usart1)
82
83#define UART_NUMOF ARRAY_SIZE(uart_config)
90static const pwm_conf_t pwm_config[] = {
91 {
92 .dev = TIM3,
93 .rcc_mask = RCC_APB1ENR_TIM3EN,
94 .chan = { { .pin = GPIO_PIN(PORT_A, 6), .cc_chan = 0},
95 { .pin = GPIO_PIN(PORT_A, 7), .cc_chan = 1},
96 { .pin = GPIO_UNDEF, .cc_chan = 0},
97 { .pin = GPIO_UNDEF, .cc_chan = 0} },
98 .af = GPIO_AF1,
99 .bus = APB1
100 }
101};
102
103#define PWM_NUMOF ARRAY_SIZE(pwm_config)
110static const spi_conf_t spi_config[] = {
111 {
112 .dev = SPI1,
113 .mosi_pin = GPIO_PIN(PORT_A, 7),
114 .miso_pin = GPIO_PIN(PORT_A, 6),
115 .sclk_pin = GPIO_PIN(PORT_A, 5),
116 .cs_pin = GPIO_PIN(PORT_B, 1),
117 .mosi_af = GPIO_AF0,
118 .miso_af = GPIO_AF0,
119 .sclk_af = GPIO_AF0,
120 .cs_af = GPIO_AF0,
121 .rccmask = RCC_APB2ENR_SPI1EN,
122 .apbbus = APB2
123 },
124};
125
126#define SPI_NUMOF ARRAY_SIZE(spi_config)
133static const adc_conf_t adc_config[] = {
134 { GPIO_PIN(PORT_A, 0), 0 },
135 { GPIO_PIN(PORT_A, 1), 1 },
136 { GPIO_PIN(PORT_A, 2), 2 },
137 { GPIO_PIN(PORT_A, 3), 3 },
138 { GPIO_PIN(PORT_A, 4), 4 },
139 { GPIO_PIN(PORT_A, 5), 5 }
140};
141
142#define ADC_NUMOF ARRAY_SIZE(adc_config)
145#ifdef __cplusplus
146}
147#endif
148
149#endif /* PERIPH_CONF_H */
@ PORT_B
port B
Definition periph_cpu.h:48
@ PORT_A
port A
Definition periph_cpu.h:47
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition periph_cpu.h:46
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
@ GPIO_AF1
use alternate function 1
Definition cpu_gpio.h:103
@ GPIO_AF0
use alternate function 0
Definition cpu_gpio.h:102
@ APB1
Advanced Peripheral Bus 1
Definition periph_cpu.h:79
@ APB2
Advanced Peripheral Bus 2
Definition periph_cpu.h:80
ADC device configuration.
Definition periph_cpu.h:379
PWM device configuration.
mini_timer_t * dev
Timer used.
SPI device configuration.
Definition periph_cpu.h:337
SPI_t * dev
pointer to the used SPI device
Definition periph_cpu.h:338
Timer device configuration.
Definition periph_cpu.h:264
TC0_t * dev
Pointer to the used as Timer device.
Definition periph_cpu.h:265
UART device configuration.
Definition periph_cpu.h:218
USART_t * dev
pointer to the used UART device
Definition periph_cpu.h:219