periph_conf.h
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1 /*
2  * Copyright (C) 2017 Kees Bakker, SODAQ
3  * 2018 HAW Hamburg
4  *
5  * This file is subject to the terms and conditions of the GNU Lesser
6  * General Public License v2.1. See the file LICENSE in the top level
7  * directory for more details.
8  */
9 
21 #ifndef PERIPH_CONF_H
22 #define PERIPH_CONF_H
23 
24 #include <stdint.h>
25 
26 #include "cpu.h"
27 #include "periph_cpu.h"
28 #include "cfg_clock_default.h"
29 #include "cfg_rtc_default.h"
30 #include "cfg_rtt_default.h"
31 #include "cfg_spi_default.h"
32 #include "cfg_timer_default.h"
33 #include "cfg_usbdev_default.h"
34 
35 #ifdef __cplusplus
36 extern "C" {
37 #endif
38 
44 static const uart_conf_t uart_config[] = {
45  {
46  .dev = &SERCOM5->USART,
47  .rx_pin = GPIO_PIN(PB, 30), /* D0, RX Pin */
48  .tx_pin = GPIO_PIN(PB, 31), /* D1, TX Pin */
49 #ifdef MODULE_PERIPH_UART_HW_FC
50  .rts_pin = GPIO_UNDEF,
51  .cts_pin = GPIO_UNDEF,
52 #endif
53  .mux = GPIO_MUX_D,
54  .rx_pad = UART_PAD_RX_1,
55  .tx_pad = UART_PAD_TX_0,
56  .flags = UART_FLAG_NONE,
57  .gclk_src = SAM0_GCLK_MAIN,
58  },
59  {
60  .dev = &SERCOM0->USART,
61  .rx_pin = GPIO_PIN(PA,5),
62  .tx_pin = GPIO_PIN(PA,6),
63 #ifdef MODULE_PERIPH_UART_HW_FC
64  .rts_pin = GPIO_UNDEF,
65  .cts_pin = GPIO_UNDEF,
66 #endif
67  .mux = GPIO_MUX_D,
68  .rx_pad = UART_PAD_RX_1,
69  .tx_pad = UART_PAD_TX_2,
70  .flags = UART_FLAG_NONE,
71  .gclk_src = SAM0_GCLK_MAIN,
72  },
73 };
74 
75 /* interrupt function name mapping */
76 #define UART_0_ISR isr_sercom5
77 #define UART_1_ISR isr_sercom0
78 
79 #define UART_NUMOF ARRAY_SIZE(uart_config)
80 
87 /* ADC Default values */
88 #define ADC_PRESCALER ADC_CTRLB_PRESCALER_DIV512
89 
90 #define ADC_NEG_INPUT ADC_INPUTCTRL_MUXNEG_GND
91 #define ADC_GAIN_FACTOR_DEFAULT ADC_INPUTCTRL_GAIN_DIV2
92 #define ADC_REF_DEFAULT ADC_REFCTRL_REFSEL_INTVCC1
93 
94 static const adc_conf_chan_t adc_channels[] = {
95  /* port, pin, muxpos */
96  {GPIO_PIN(PB, 0), ADC_INPUTCTRL_MUXPOS_PIN8}, /* A0 */
97  {GPIO_PIN(PB, 1), ADC_INPUTCTRL_MUXPOS_PIN9}, /* A1 */
98  {GPIO_PIN(PB, 2), ADC_INPUTCTRL_MUXPOS_PIN10}, /* A2 */
99  {GPIO_PIN(PB, 3), ADC_INPUTCTRL_MUXPOS_PIN11}, /* A3 */
100  {GPIO_PIN(PA, 8), ADC_INPUTCTRL_MUXPOS_PIN16}, /* A4 */
101  {GPIO_PIN(PA, 9), ADC_INPUTCTRL_MUXPOS_PIN17}, /* A5 */
102  {GPIO_PIN(PA, 10), ADC_INPUTCTRL_MUXPOS_PIN18}, /* GROVE1/A6 */
103  {GPIO_PIN(PA, 11), ADC_INPUTCTRL_MUXPOS_PIN19}, /* GROVE2/A7 */
104  {GPIO_PIN(PB, 5), ADC_INPUTCTRL_MUXPOS_PIN13}, /* BAT_VOLT/A8 */
105  {GPIO_PIN(PA, 2), ADC_INPUTCTRL_MUXPOS_PIN0}, /* D2/DAC */
106  {GPIO_PIN(PA, 3), ADC_INPUTCTRL_MUXPOS_PIN1}, /* AREF */
107 };
108 
109 #define ADC_NUMOF ARRAY_SIZE(adc_channels)
110 
116 static const i2c_conf_t i2c_config[] = {
117  {
118  .dev = &(SERCOM1->I2CM),
119  .speed = I2C_SPEED_NORMAL,
120  .scl_pin = GPIO_PIN(PA, 17),
121  .sda_pin = GPIO_PIN(PA, 16),
122  .mux = GPIO_MUX_C,
123  .gclk_src = SAM0_GCLK_MAIN,
124  .flags = I2C_FLAG_NONE
125  }
126 };
127 #define I2C_NUMOF ARRAY_SIZE(i2c_config)
128 
130 #ifdef __cplusplus
131 }
132 #endif
133 
134 #endif /* PERIPH_CONF_H */
135 
select peripheral function D
cc2538_uart_t * dev
pointer to the used UART device
Definition: periph_cpu.h:167
I2C configuration options.
Definition: periph_cpu.h:128
Default clock configuration for SODAQ boards.
No flags set.
static const gpio_t adc_channels[]
Static array with declared ADC channels.
port A
Definition: periph_cpu.h:87
port B
Definition: periph_cpu.h:88
Default usbdev configuration for SODAQ boards.
select pad 1
select pad 0
No flags set.
ADC Channel Configuration.
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
48 MHz main clock
Definition: periph_cpu.h:59
select peripheral function C
Default RTC configuration for SODAQ boards.
select pad 2
UART device configuration.
Definition: periph_cpu.h:166
I2C_TypeDef * dev
USART device used.
Definition: periph_cpu.h:240
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:35
normal mode: ~100 kbit/s
Definition: i2c.h:183