periph_conf.h
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1 /*
2  * Copyright (C) 2018 HAW Hamburg
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser
5  * General Public License v2.1. See the file LICENSE in the top level
6  * directory for more details.
7  */
8 
20 #ifndef PERIPH_CONF_H
21 #define PERIPH_CONF_H
22 
23 #include <stdint.h>
24 
25 #include "cpu.h"
26 #include "periph_cpu.h"
27 
28 #ifdef __cplusplus
29 extern "C" {
30 #endif
31 
63 #define CLOCK_USE_PLL (1)
64 
65 #if CLOCK_USE_PLL
66 /* edit these values to adjust the PLL output frequency */
67 #define CLOCK_PLL_MUL (47U) /* must be >= 31 & <= 95 */
68 #define CLOCK_PLL_DIV (1U) /* adjust to your needs */
69 #define CLOCK_CORECLOCK (((CLOCK_PLL_MUL + 1) * 1000000U) / CLOCK_PLL_DIV)
70 #else
71 /* edit this value to your needs */
72 #define CLOCK_DIV (1U)
73 /* generate the actual core clock frequency */
74 #define CLOCK_CORECLOCK (8000000 / CLOCK_DIV)
75 #endif
76 
82 static const tc32_conf_t timer_config[] = {
83  { /* Timer 0 - System Clock */
84  .dev = TC3,
85  .irq = TC3_IRQn,
86  .pm_mask = PM_APBCMASK_TC3,
87  .gclk_ctrl = GCLK_CLKCTRL_ID_TCC2_TC3,
88 #if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
89  .gclk_src = SAM0_GCLK_1MHZ,
90 #else
91  .gclk_src = SAM0_GCLK_MAIN,
92 #endif
93  .flags = TC_CTRLA_MODE_COUNT16,
94  },
95  { /* Timer 1 */
96  .dev = TC4,
97  .irq = TC4_IRQn,
98  .pm_mask = PM_APBCMASK_TC4 | PM_APBCMASK_TC5,
99  .gclk_ctrl = GCLK_CLKCTRL_ID_TC4_TC5,
100 #if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
101  .gclk_src = SAM0_GCLK_1MHZ,
102 #else
103  .gclk_src = SAM0_GCLK_MAIN,
104 #endif
105  .flags = TC_CTRLA_MODE_COUNT32,
106  }
107 };
108 
109 #define TIMER_0_MAX_VALUE 0xffff
110 
111 /* interrupt function name mapping */
112 #define TIMER_0_ISR isr_tc3
113 #define TIMER_1_ISR isr_tc4
114 
115 #define TIMER_NUMOF ARRAY_SIZE(timer_config)
116 
122 static const uart_conf_t uart_config[] = {
123  {
124  .dev = &SERCOM3->USART,
125  .rx_pin = GPIO_PIN(PA, 23),
126  .tx_pin = GPIO_PIN(PA, 22),
127 #ifdef MODULE_PERIPH_UART_HW_FC
128  .rts_pin = GPIO_UNDEF,
129  .cts_pin = GPIO_UNDEF,
130 #endif
131  .mux = GPIO_MUX_C,
132  .rx_pad = UART_PAD_RX_1,
133  .tx_pad = UART_PAD_TX_0,
134  .flags = UART_FLAG_NONE,
135  .gclk_src = SAM0_GCLK_MAIN,
136  },
137  {
138  .dev = &SERCOM4->USART,
139  .rx_pin = GPIO_PIN(PB, 9),
140  .tx_pin = GPIO_PIN(PB, 8),
141 #ifdef MODULE_PERIPH_UART_HW_FC
142  .rts_pin = GPIO_UNDEF,
143  .cts_pin = GPIO_UNDEF,
144 #endif
145  .mux = GPIO_MUX_D,
146  .rx_pad = UART_PAD_RX_1,
147  .tx_pad = UART_PAD_TX_0,
148  .flags = UART_FLAG_NONE,
149  .gclk_src = SAM0_GCLK_MAIN,
150  }
151 };
152 
153 /* interrupt function name mapping */
154 #define UART_0_ISR isr_sercom3
155 #define UART_1_ISR isr_sercom4
156 
157 #define UART_NUMOF ARRAY_SIZE(uart_config)
158 
164 static const spi_conf_t spi_config[] = {
165  {
166  .dev = &SERCOM1->SPI,
167  .miso_pin = GPIO_PIN(PA, 19),
168  .mosi_pin = GPIO_PIN(PA, 16),
169  .clk_pin = GPIO_PIN(PA, 17),
170  .miso_mux = GPIO_MUX_C,
171  .mosi_mux = GPIO_MUX_C,
172  .clk_mux = GPIO_MUX_C,
173  .miso_pad = SPI_PAD_MISO_3,
174  .mosi_pad = SPI_PAD_MOSI_0_SCK_1,
175  .gclk_src = SAM0_GCLK_MAIN,
176 #ifdef MODULE_PERIPH_DMA
177  .tx_trigger = SERCOM1_DMAC_ID_TX,
178  .rx_trigger = SERCOM1_DMAC_ID_RX,
179 #endif
180  }
181 };
182 
183 #define SPI_NUMOF ARRAY_SIZE(spi_config)
184 
189 static const i2c_conf_t i2c_config[] = {
190  {
191  .dev = &(SERCOM0->I2CM),
192  .speed = I2C_SPEED_NORMAL,
193  .scl_pin = GPIO_PIN(PA, 8),
194  .sda_pin = GPIO_PIN(PA, 9),
195  .mux = GPIO_MUX_C,
196  .gclk_src = SAM0_GCLK_MAIN,
197  .flags = I2C_FLAG_NONE
198  },
199  {
200  .dev = &(SERCOM2->I2CM),
201  .speed = I2C_SPEED_NORMAL,
202  .scl_pin = GPIO_PIN(PA, 12),
203  .sda_pin = GPIO_PIN(PA, 13),
204  .mux = GPIO_MUX_C,
205  .gclk_src = SAM0_GCLK_MAIN,
206  .flags = I2C_FLAG_NONE
207  }
208 };
209 
210 #define I2C_NUMOF ARRAY_SIZE(i2c_config)
211 
216 #ifndef RTT_FREQUENCY
217 #define RTT_FREQUENCY (32768U) /* in Hz. For changes see `rtc_rtt.c` */
218 #endif
219 
226 /* ADC Default values */
227 #define ADC_PRESCALER ADC_CTRLB_PRESCALER_DIV512
228 
229 #define ADC_NEG_INPUT ADC_INPUTCTRL_MUXNEG_GND
230 #define ADC_GAIN_FACTOR_DEFAULT ADC_INPUTCTRL_GAIN_1X
231 #define ADC_REF_DEFAULT ADC_REFCTRL_REFSEL_INT1V
232 
233 /* Digital pins (1 to 6) on the board can be configured as analog inputs */
234 static const adc_conf_chan_t adc_channels[] = {
235  /* port, pin, muxpos */
236  { GPIO_PIN(PA, 4), ADC_INPUTCTRL_MUXPOS_PIN4 }, /* Digital 1 */
237  { GPIO_PIN(PA, 5), ADC_INPUTCTRL_MUXPOS_PIN5 }, /* Digital 2 */
238  { GPIO_PIN(PA, 6), ADC_INPUTCTRL_MUXPOS_PIN6 }, /* Digital 3 */
239  { GPIO_PIN(PA, 7), ADC_INPUTCTRL_MUXPOS_PIN7 }, /* Digital 4 */
240  { GPIO_PIN(PA, 3), ADC_INPUTCTRL_MUXPOS_PIN1 }, /* Digital 5 */
241  { GPIO_PIN(PA, 2), ADC_INPUTCTRL_MUXPOS_PIN0 }, /* Digital 6 */
242 };
243 
244 #define ADC_NUMOF ARRAY_SIZE(adc_channels)
245 
251 static const sam0_common_usb_config_t sam_usbdev_config[] = {
252  {
253  .dm = GPIO_PIN(PA, 24),
254  .dp = GPIO_PIN(PA, 25),
255  .d_mux = GPIO_MUX_G,
256  .device = &USB->DEVICE,
257  .gclk_src = SAM0_GCLK_MAIN,
258  }
259 };
262 #ifdef __cplusplus
263 }
264 #endif
265 
266 #endif /* PERIPH_CONF_H */
267 
select peripheral function D
48 MHz main clock
Definition: periph_cpu.h:59
cc2538_uart_t * dev
pointer to the used UART device
Definition: periph_cpu.h:167
I2C configuration options.
Definition: periph_cpu.h:128
Tc * dev
pointer to the used Timer device
No flags set.
static const gpio_t adc_channels[]
Static array with declared ADC channels.
port A
Definition: periph_cpu.h:92
port B
Definition: periph_cpu.h:93
SPI_Type * dev
SPI device to use.
Definition: periph_cpu.h:458
select pad 1
select pad 0
gpio_t dm
D- line gpio.
No flags set.
ADC Channel Configuration.
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
select peripheral function C
select peripheral function G
USB peripheral parameters.
use pad 0 for MISO line
UART device configuration.
Definition: periph_cpu.h:166
I2C_TypeDef * dev
USART device used.
Definition: periph_cpu.h:240
1 MHz clock for xTimer
Definition: periph_cpu.h:60
SPI configuration structure type.
Definition: periph_cpu.h:273
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:35
normal mode: ~100 kbit/s
Definition: i2c.h:183
use pad 0 for MOSI, pad 1 for SCK
Timer device configuration.