periph_conf.h File Reference

Configuration of CPU peripherals for SenseBox MCU with SAMD21. More...

Detailed Description

Configuration of CPU peripherals for SenseBox MCU with SAMD21.

Author
Jose Alamos jose..nosp@m.alam.nosp@m.os@ha.nosp@m.w-ha.nosp@m.mburg.nosp@m..de
Leandro Lanzieri leand.nosp@m.ro.l.nosp@m.anzie.nosp@m.ri@h.nosp@m.aw-ha.nosp@m.mbur.nosp@m.g.de

Definition in file periph_conf.h.

#include <stdint.h>
#include "cpu.h"
#include "periph_cpu.h"
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Go to the source code of this file.

External oscillator and clock configuration

For selection of the used CORECLOCK, we have implemented two choices:

  • usage of the PLL fed by the internal 8MHz oscillator divided by 8
  • usage of the internal 8MHz oscillator directly, divided by N if needed

The PLL option allows for the usage of a wider frequency range and a more stable clock with less jitter. This is why we use this option as default.

The target frequency is computed from the PLL multiplier and the PLL divisor. Use the following formula to compute your values:

CORECLOCK = ((PLL_MUL + 1) * 1MHz) / PLL_DIV

NOTE: The PLL circuit does not run with less than 32MHz while the maximum PLL frequency is 96MHz. So PLL_MULL must be between 31 and 95!

The internal Oscillator used directly can lead to a slightly better power efficiency to the cost of a less stable clock. Use this option when you know what you are doing! The actual core frequency is adjusted as follows:

CORECLOCK = 8MHz / DIV

NOTE: A core clock frequency below 1MHz is not recommended

#define CLOCK_USE_PLL   (1)
 
#define CLOCK_PLL_MUL   (47U) /* must be >= 31 & <= 95 */
 
#define CLOCK_PLL_DIV   (1U) /* adjust to your needs */
 
#define CLOCK_CORECLOCK   (((CLOCK_PLL_MUL + 1) * 1000000U) / CLOCK_PLL_DIV)
 

Timer peripheral configuration

#define TIMER_0_MAX_VALUE   0xffff
 
#define TIMER_0_ISR   isr_tc3
 
#define TIMER_1_ISR   isr_tc4
 
#define TIMER_NUMOF   ARRAY_SIZE(timer_config)
 
static const tc32_conf_t timer_config []
 

UART configuration

#define UART_0_ISR   isr_sercom3
 
#define UART_1_ISR   isr_sercom4
 
#define UART_NUMOF   ARRAY_SIZE(uart_config)
 
static const uart_conf_t uart_config []
 

SPI configuration

#define SPI_NUMOF   ARRAY_SIZE(spi_config)
 
static const spi_conf_t spi_config []
 

I2C configuration

#define I2C_NUMOF   ARRAY_SIZE(i2c_config)
 
static const i2c_conf_t i2c_config []
 

RTC configuration

#define RTC_NUMOF   (1U)
 
#define RTC_DEV   RTC->MODE2
 

ADC configuration

#define ADC_0_EN   1
 
#define ADC_0_DEV   ADC
 
#define ADC_0_IRQ   ADC_IRQn
 
#define ADC_0_CLK_SOURCE   0 /* GCLK_GENERATOR_0 */
 
#define ADC_0_PRESCALER   ADC_CTRLB_PRESCALER_DIV512
 
#define ADC_0_NEG_INPUT   ADC_INPUTCTRL_MUXNEG_GND
 
#define ADC_0_GAIN_FACTOR_DEFAULT   ADC_INPUTCTRL_GAIN_1X
 
#define ADC_0_REF_DEFAULT   ADC_REFCTRL_REFSEL_INT1V
 
#define ADC_0_CHANNELS   (6U)
 
#define ADC_NUMOF   ADC_0_CHANNELS
 
static const adc_conf_chan_t adc_channels []
 

USB peripheral configuration

static const sam0_common_usb_config_t sam_usbdev_config []
 

Variable Documentation

◆ adc_channels

const adc_conf_chan_t adc_channels[]
static
Initial value:
= {
{ GPIO_PIN(PA, 4), ADC_INPUTCTRL_MUXPOS_PIN4 },
{ GPIO_PIN(PA, 5), ADC_INPUTCTRL_MUXPOS_PIN5 },
{ GPIO_PIN(PA, 6), ADC_INPUTCTRL_MUXPOS_PIN6 },
{ GPIO_PIN(PA, 7), ADC_INPUTCTRL_MUXPOS_PIN7 },
{ GPIO_PIN(PA, 3), ADC_INPUTCTRL_MUXPOS_PIN1 },
{ GPIO_PIN(PA, 2), ADC_INPUTCTRL_MUXPOS_PIN0 },
}
port A
Definition: periph_cpu.h:87
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:35

Definition at line 230 of file periph_conf.h.

◆ i2c_config

const i2c_conf_t i2c_config[]
static
Initial value:
= {
{
.dev = &(SERCOM0->I2CM),
.speed = I2C_SPEED_NORMAL,
.scl_pin = GPIO_PIN(PA, 8),
.sda_pin = GPIO_PIN(PA, 9),
.mux = GPIO_MUX_C,
.gclk_src = GCLK_CLKCTRL_GEN_GCLK0,
.flags = I2C_FLAG_NONE
},
{
.dev = &(SERCOM2->I2CM),
.speed = I2C_SPEED_NORMAL,
.scl_pin = GPIO_PIN(PA, 12),
.sda_pin = GPIO_PIN(PA, 13),
.mux = GPIO_MUX_C,
.gclk_src = GCLK_CLKCTRL_GEN_GCLK0,
.flags = I2C_FLAG_NONE
}
}
No flags set.
select peripheral function C
port A
Definition: periph_cpu.h:87
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:35
normal mode: ~100kbit/s
Definition: periph_cpu.h:116

Definition at line 180 of file periph_conf.h.

◆ sam_usbdev_config

const sam0_common_usb_config_t sam_usbdev_config[]
static
Initial value:
= {
{
.dm = GPIO_PIN(PA, 24),
.dp = GPIO_PIN(PA, 25),
.d_mux = GPIO_MUX_G,
.device = &USB->DEVICE,
}
}
select peripheral function G
port A
Definition: periph_cpu.h:87
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:35

Definition at line 248 of file periph_conf.h.

◆ spi_config

const spi_conf_t spi_config[]
static
Initial value:
= {
{
.dev = &SERCOM1->SPI,
.miso_pin = GPIO_PIN(PA, 19),
.mosi_pin = GPIO_PIN(PA, 16),
.clk_pin = GPIO_PIN(PA, 17),
.miso_mux = GPIO_MUX_C,
.mosi_mux = GPIO_MUX_C,
.clk_mux = GPIO_MUX_C,
.miso_pad = SPI_PAD_MISO_3,
}
}
select peripheral function C
port A
Definition: periph_cpu.h:87
use pad 0 for MISO line
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:35
use pad 0 for MOSI, pad 1 for SCK

Definition at line 160 of file periph_conf.h.

◆ timer_config

const tc32_conf_t timer_config[]
static
Initial value:
= {
{
.dev = TC3,
.irq = TC3_IRQn,
.pm_mask = PM_APBCMASK_TC3,
.gclk_ctrl = GCLK_CLKCTRL_ID_TCC2_TC3,
.gclk_src = GCLK_CLKCTRL_GEN(1),
.prescaler = TC_CTRLA_PRESCALER_DIV1,
.flags = TC_CTRLA_MODE_COUNT16,
},
{
.dev = TC4,
.irq = TC4_IRQn,
.pm_mask = PM_APBCMASK_TC4 | PM_APBCMASK_TC5,
.gclk_ctrl = GCLK_CLKCTRL_ID_TC4_TC5,
.gclk_src = GCLK_CLKCTRL_GEN(1),
.prescaler = TC_CTRLA_PRESCALER_DIV1,
.flags = TC_CTRLA_MODE_COUNT32,
}
}

Definition at line 82 of file periph_conf.h.

◆ uart_config

const uart_conf_t uart_config[]
static
Initial value:
= {
{
.dev = &SERCOM3->USART,
.rx_pin = GPIO_PIN(PA, 23),
.tx_pin = GPIO_PIN(PA, 22),
.mux = GPIO_MUX_C,
.rx_pad = UART_PAD_RX_1,
.tx_pad = UART_PAD_TX_0,
.flags = UART_FLAG_NONE,
.gclk_src = GCLK_CLKCTRL_GEN_GCLK0,
},
{
.dev = &SERCOM4->USART,
.rx_pin = GPIO_PIN(PB, 9),
.tx_pin = GPIO_PIN(PB, 8),
.mux = GPIO_MUX_D,
.rx_pad = UART_PAD_RX_1,
.tx_pad = UART_PAD_TX_0,
.flags = UART_FLAG_NONE,
.gclk_src = GCLK_CLKCTRL_GEN_GCLK0,
}
}
select peripheral function D
select pad 1
select pad 0
No flags set.
select peripheral function C
port A
Definition: periph_cpu.h:87
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:35
port B
Definition: periph_cpu.h:88

Definition at line 126 of file periph_conf.h.