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periph_conf.h
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1/*
2 * Copyright (C) 2017 Baptiste Clenet <bapclenet@gmail.com>
3 *
4 * This file is subject to the terms and conditions of the GNU Lesser
5 * General Public License v2.1. See the file LICENSE in the top level
6 * directory for more details.
7 */
8
19#ifndef PERIPH_CONF_H
20#define PERIPH_CONF_H
21
22#include "periph_cpu.h"
23
24#ifdef __cplusplus
25extern "C" {
26#endif
27
31#define CLOCK_CORECLOCK (48000000U)
32
37static const tc32_conf_t timer_config[] = {
38 { /* Timer 0 - System Clock */
39 .dev = TC0,
40 .irq = TC0_IRQn,
41 .mclk = &MCLK->APBCMASK.reg,
42 .mclk_mask = MCLK_APBCMASK_TC0 | MCLK_APBCMASK_TC1,
43 .gclk_id = TC0_GCLK_ID,
44 .gclk_src = SAM0_GCLK_TIMER,
45 .flags = TC_CTRLA_MODE_COUNT32,
46 }
47};
48
49/* Timer 0 configuration */
50#define TIMER_0_CHANNELS 2
51#define TIMER_0_ISR isr_tc0
52#define TIMER_NUMOF ARRAY_SIZE(timer_config)
59static const uart_conf_t uart_config[] = {
60 { /* Virtual COM Port */
61 .dev = &SERCOM0->USART,
62 .rx_pin = GPIO_PIN(PA,5),
63 .tx_pin = GPIO_PIN(PA,4),
64#ifdef MODULE_PERIPH_UART_HW_FC
65 .rts_pin = GPIO_UNDEF,
66 .cts_pin = GPIO_UNDEF,
67#endif
68 .mux = GPIO_MUX_D,
69 .rx_pad = UART_PAD_RX_1,
70 .tx_pad = UART_PAD_TX_0,
71 .flags = UART_FLAG_NONE,
72 .gclk_src = SAM0_GCLK_MAIN,
73 }
74};
75
76/* interrupt function name mapping */
77#define UART_0_ISR isr_sercom0
78
79#define UART_NUMOF ARRAY_SIZE(uart_config)
86static const spi_conf_t spi_config[] = {
87 { /* Internal AT86RF212B */
88 .dev = &(SERCOM4->SPI),
89 .miso_pin = GPIO_PIN(PC, 19),
90 .mosi_pin = GPIO_PIN(PB, 30),
91 .clk_pin = GPIO_PIN(PC, 18),
92 .miso_mux = GPIO_MUX_F,
93 .mosi_mux = GPIO_MUX_F,
94 .clk_mux = GPIO_MUX_F,
95 .miso_pad = SPI_PAD_MISO_0,
96 .mosi_pad = SPI_PAD_MOSI_2_SCK_3,
97 .gclk_src = SAM0_GCLK_MAIN,
98#ifdef MODULE_PERIPH_DMA
99 .tx_trigger = SERCOM4_DMAC_ID_TX,
100 .rx_trigger = SERCOM4_DMAC_ID_RX,
101#endif
102 },
103 { /* EXT1 & EXT3 Pin Header */
104 .dev = &(SERCOM5->SPI),
105 .miso_pin = GPIO_PIN(PB, 2),
106 .mosi_pin = GPIO_PIN(PB, 22),
107 .clk_pin = GPIO_PIN(PB, 23),
108 .miso_mux = GPIO_MUX_D,
109 .mosi_mux = GPIO_MUX_D,
110 .clk_mux = GPIO_MUX_D,
111 .miso_pad = SPI_PAD_MISO_0,
112 .mosi_pad = SPI_PAD_MOSI_2_SCK_3,
113 .gclk_src = SAM0_GCLK_MAIN,
114#ifdef MODULE_PERIPH_DMA
115 /* The SAML21 doesn't support DMA triggers on SERCOM5 */
116 .tx_trigger = DMA_TRIGGER_DISABLED,
117 .rx_trigger = DMA_TRIGGER_DISABLED,
118#endif
119 }
120};
121
122#define SPI_NUMOF ARRAY_SIZE(spi_config)
129static const i2c_conf_t i2c_config[] = {
130 { /* EXT1 & EXT3 Pin Header */
131 .dev = &(SERCOM1->I2CM),
132 .speed = I2C_SPEED_NORMAL,
133 .scl_pin = GPIO_PIN(PA, 17),
134 .sda_pin = GPIO_PIN(PA, 16),
135 .mux = GPIO_MUX_C,
136 .gclk_src = SAM0_GCLK_MAIN,
137 .flags = I2C_FLAG_NONE
138 }
139};
140#define I2C_NUMOF ARRAY_SIZE(i2c_config)
147#define EXTERNAL_OSC32_SOURCE 1
148#define INTERNAL_OSC32_SOURCE 0
149#define ULTRA_LOW_POWER_INTERNAL_OSC_SOURCE 0
156#ifndef RTT_FREQUENCY
157#define RTT_FREQUENCY (32768U)
158#endif
166/* ADC Default values */
167#define ADC_PRESCALER ADC_CTRLB_PRESCALER_DIV256
168
169#define ADC_NEG_INPUT ADC_INPUTCTRL_MUXNEG(0x18u)
170#define ADC_REF_DEFAULT ADC_REFCTRL_REFSEL_INTVCC2
171
172static const adc_conf_chan_t adc_channels[] = {
173 /* port, pin, muxpos */
174 { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA06 }, /* EXT1, pin 3 */
175 { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA07 }, /* EXT1, pin 4 */
176 { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA10 },
177 { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA11 },
178 { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA02 }
179};
180
181#define ADC_NUMOF ARRAY_SIZE(adc_channels)
188static const sam0_common_usb_config_t sam_usbdev_config[] = {
189 {
190 .dm = GPIO_PIN(PA, 24),
191 .dp = GPIO_PIN(PA, 25),
192 .d_mux = GPIO_MUX_G,
193 .device = &USB->DEVICE,
194 .gclk_src = SAM0_GCLK_48MHZ,
195 }
196};
199#ifdef __cplusplus
200}
201#endif
202
203#endif /* PERIPH_CONF_H */
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition periph_cpu.h:46
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition periph_cpu.h:278
@ UART_PAD_RX_1
select pad 1
@ PB
port B
@ PC
port C
@ PA
port A
@ I2C_FLAG_NONE
No flags set.
@ SPI_PAD_MISO_0
use pad 0 for MISO line
#define DMA_TRIGGER_DISABLED
Indicates that the peripheral doesn't utilize the DMA controller.
@ UART_FLAG_NONE
No flags set.
@ UART_PAD_TX_0
select pad 0
@ GPIO_MUX_D
select peripheral function D
@ GPIO_MUX_G
select peripheral function G
@ GPIO_MUX_C
select peripheral function C
@ GPIO_MUX_F
select peripheral function F
@ SPI_PAD_MOSI_2_SCK_3
use pad 2 for MOSI, pad 3 for SCK
#define ADC_INPUTCTRL_MUXPOS_PA10
Alias for PIN18.
Definition periph_cpu.h:137
#define ADC_INPUTCTRL_MUXPOS_PA11
Alias for PIN19.
Definition periph_cpu.h:138
#define ADC_INPUTCTRL_MUXPOS_PA07
Alias for PIN7.
Definition periph_cpu.h:126
#define ADC_INPUTCTRL_MUXPOS_PA06
Alias for PIN6.
Definition periph_cpu.h:125
#define ADC_INPUTCTRL_MUXPOS_PA02
ADC pin aliases.
Definition periph_cpu.h:119
#define SAM0_GCLK_MAIN
120 MHz main clock
Definition periph_cpu.h:74
#define SAM0_GCLK_TIMER
4-8 MHz clock for xTimer
Definition periph_cpu.h:79
ADC Channel Configuration.
uint32_t inputctrl
ADC channel pin multiplexer value
I2C configuration structure.
Definition periph_cpu.h:299
TWI_t * dev
Pointer to hardware module registers.
Definition periph_cpu.h:300
USB peripheral parameters.
SPI device configuration.
Definition periph_cpu.h:337
SPI_t * dev
pointer to the used SPI device
Definition periph_cpu.h:338
Timer device configuration.
Tc * dev
pointer to the used Timer device
UART device configuration.
Definition periph_cpu.h:218
USART_t * dev
pointer to the used UART device
Definition periph_cpu.h:219