periph_conf.h
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1 /*
2  * Copyright (C) 2014-2015 Freie Universit├Ąt Berlin
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser
5  * General Public License v2.1. See the file LICENSE in the top level
6  * directory for more details.
7  */
8 
22 #ifndef PERIPH_CONF_H
23 #define PERIPH_CONF_H
24 
25 #include <stdint.h>
26 
27 #include "cpu.h"
28 #include "periph_cpu.h"
29 
30 #ifdef __cplusplus
31 extern "C" {
32 #endif
33 
66 #define CLOCK_USE_PLL (1)
67 
68 #if CLOCK_USE_PLL
69 /* edit these values to adjust the PLL output frequency */
70 #define CLOCK_PLL_MUL (47U) /* must be >= 31 & <= 95 */
71 #define CLOCK_PLL_DIV (1U) /* adjust to your needs */
72 /* generate the actual used core clock frequency */
73 #define CLOCK_CORECLOCK (((CLOCK_PLL_MUL + 1) * 1000000U) / CLOCK_PLL_DIV)
74 #elif CLOCK_USE_XOSC32_DFLL
75  /* Settings for 32 kHz external oscillator and 48 MHz DFLL */
76 #define CLOCK_CORECLOCK (48000000U)
77 #define CLOCK_XOSC32K (32768UL)
78 #define CLOCK_8MHZ (1)
79 #define GEN2_ULP32K (1)
80 #else
81 /* edit this value to your needs */
82 #define CLOCK_DIV (1U)
83 /* generate the actual core clock frequency */
84 #define CLOCK_CORECLOCK (8000000 / CLOCK_DIV)
85 #endif
86 
92 static const tc32_conf_t timer_config[] = {
93  { /* Timer 0 - System Clock */
94  .dev = TC3,
95  .irq = TC3_IRQn,
96  .pm_mask = PM_APBCMASK_TC3,
97  .gclk_ctrl = GCLK_CLKCTRL_ID_TCC2_TC3,
98 #if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
99  .gclk_src = GCLK_CLKCTRL_GEN(1),
100  .prescaler = TC_CTRLA_PRESCALER_DIV1,
101 #else
102  .gclk_src = GCLK_CLKCTRL_GEN(0),
103  .prescaler = TC_CTRLA_PRESCALER_DIV8,
104 #endif
105  .flags = TC_CTRLA_MODE_COUNT16,
106  },
107  { /* Timer 1 */
108  .dev = TC4,
109  .irq = TC4_IRQn,
110  .pm_mask = PM_APBCMASK_TC4 | PM_APBCMASK_TC5,
111  .gclk_ctrl = GCLK_CLKCTRL_ID_TC4_TC5,
112 #if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
113  .gclk_src = GCLK_CLKCTRL_GEN(1),
114  .prescaler = TC_CTRLA_PRESCALER_DIV1,
115 #else
116  .gclk_src = GCLK_CLKCTRL_GEN(0),
117  .prescaler = TC_CTRLA_PRESCALER_DIV8,
118 #endif
119  .flags = TC_CTRLA_MODE_COUNT32,
120  }
121 };
122 
123 #define TIMER_0_MAX_VALUE 0xffff
124 
125 /* interrupt function name mapping */
126 #define TIMER_0_ISR isr_tc3
127 #define TIMER_1_ISR isr_tc4
128 
129 #define TIMER_NUMOF ARRAY_SIZE(timer_config)
130 
136 static const uart_conf_t uart_config[] = {
137  {
138  .dev = &SERCOM0->USART,
139  .rx_pin = GPIO_PIN(PA,5),
140  .tx_pin = GPIO_PIN(PA,4),
141 #ifdef MODULE_SAM0_PERIPH_UART_HW_FC
142  .rts_pin = GPIO_UNDEF,
143  .cts_pin = GPIO_UNDEF,
144 #endif
145  .mux = GPIO_MUX_D,
146  .rx_pad = UART_PAD_RX_1,
147  .tx_pad = UART_PAD_TX_0,
148  .flags = UART_FLAG_NONE,
149  .gclk_src = GCLK_CLKCTRL_GEN_GCLK0
150  },
151  {
152  .dev = &SERCOM5->USART,
153  .rx_pin = GPIO_PIN(PA,23),
154  .tx_pin = GPIO_PIN(PA,22),
155 #ifdef MODULE_SAM0_PERIPH_UART_HW_FC
156  .rts_pin = GPIO_UNDEF,
157  .cts_pin = GPIO_UNDEF,
158 #endif
159  .mux = GPIO_MUX_D,
160  .rx_pad = UART_PAD_RX_1,
161  .tx_pad = UART_PAD_TX_0,
162  .flags = UART_FLAG_NONE,
163  .gclk_src = GCLK_CLKCTRL_GEN_GCLK0
164  }
165 };
166 
167 /* interrupt function name mapping */
168 #define UART_0_ISR isr_sercom0
169 #define UART_1_ISR isr_sercom5
170 
171 #define UART_NUMOF ARRAY_SIZE(uart_config)
172 
178 #define PWM_0_EN 1
179 #define PWM_1_EN 1
180 #define PWM_MAX_CHANNELS 3
181 /* for compatibility with test application */
182 #define PWM_0_CHANNELS PWM_MAX_CHANNELS
183 #define PWM_1_CHANNELS PWM_MAX_CHANNELS
184 
185 /* PWM device configuration */
186 static const pwm_conf_t pwm_config[] = {
187 #if PWM_0_EN
188  {TCC1, {
189  /* GPIO pin, MUX value, TCC channel */
190  { GPIO_PIN(PA, 6), GPIO_MUX_E, 0 },
191  { GPIO_PIN(PA, 7), GPIO_MUX_E, 1 },
192  { GPIO_UNDEF, (gpio_mux_t)0, 2 }
193  }},
194 #endif
195 #if PWM_1_EN
196  {TCC0, {
197  /* GPIO pin, MUX value, TCC channel */
198  { GPIO_PIN(PA, 16), GPIO_MUX_F, 0 },
199  { GPIO_PIN(PA, 18), GPIO_MUX_F, 2 },
200  { GPIO_PIN(PA, 19), GPIO_MUX_F, 3 }
201  }}
202 #endif
203 };
204 
205 /* number of devices that are actually defined */
206 #define PWM_NUMOF (2U)
207 
213 static const spi_conf_t spi_config[] = {
214  {
215  .dev = &SERCOM4->SPI,
216  .miso_pin = GPIO_PIN(PC, 19),
217  .mosi_pin = GPIO_PIN(PB, 30),
218  .clk_pin = GPIO_PIN(PC, 18),
219  .miso_mux = GPIO_MUX_F,
220  .mosi_mux = GPIO_MUX_F,
221  .clk_mux = GPIO_MUX_F,
222  .miso_pad = SPI_PAD_MISO_0,
223  .mosi_pad = SPI_PAD_MOSI_2_SCK_3
224  },
225  {
226  .dev = &SERCOM5->SPI,
227  .miso_pin = GPIO_PIN(PB, 2),
228  .mosi_pin = GPIO_PIN(PB, 22),
229  .clk_pin = GPIO_PIN(PB, 23),
230  .miso_mux = GPIO_MUX_D,
231  .mosi_mux = GPIO_MUX_D,
232  .clk_mux = GPIO_MUX_D,
233  .miso_pad = SPI_PAD_MISO_0,
234  .mosi_pad = SPI_PAD_MOSI_2_SCK_3
235  }
236 };
237 
238 #define SPI_NUMOF ARRAY_SIZE(spi_config)
239 
245 static const i2c_conf_t i2c_config[] = {
246  {
247  .dev = &(SERCOM3->I2CM),
248  .speed = I2C_SPEED_NORMAL,
249  .scl_pin = GPIO_PIN(PA, 17),
250  .sda_pin = GPIO_PIN(PA, 16),
251  .mux = GPIO_MUX_D,
252  .gclk_src = GCLK_CLKCTRL_GEN_GCLK0,
253  .flags = I2C_FLAG_NONE
254  }
255 };
256 #define I2C_NUMOF ARRAY_SIZE(i2c_config)
257 
263 #define RTC_DEV RTC->MODE2
264 
270 #define RTT_DEV RTC->MODE0
271 #define RTT_IRQ RTC_IRQn
272 #define RTT_IRQ_PRIO 10
273 #define RTT_ISR isr_rtc
274 #define RTT_MAX_VALUE (0xffffffff)
275 #define RTT_FREQUENCY (32768U) /* in Hz. For changes see `rtt.c` */
276 #define RTT_RUNSTDBY (1) /* Keep RTT running in sleep states */
277 
284 /* ADC Default values */
285 #define ADC_PRESCALER ADC_CTRLB_PRESCALER_DIV512
286 
287 #define ADC_NEG_INPUT ADC_INPUTCTRL_MUXNEG_GND
288 #define ADC_GAIN_FACTOR_DEFAULT ADC_INPUTCTRL_GAIN_1X
289 #define ADC_REF_DEFAULT ADC_REFCTRL_REFSEL_INT1V
290 
291 static const adc_conf_chan_t adc_channels[] = {
292  /* port, pin, muxpos */
293  {GPIO_PIN(PA, 6), ADC_INPUTCTRL_MUXPOS_PIN6}, /* EXT1, pin 3 */
294  {GPIO_PIN(PA, 7), ADC_INPUTCTRL_MUXPOS_PIN7}, /* EXT1, pin 4 */
295 };
296 
297 #define ADC_NUMOF ARRAY_SIZE(adc_channels)
298 
304 static const sam0_common_usb_config_t sam_usbdev_config[] = {
305  {
306  .dm = GPIO_PIN(PA, 24),
307  .dp = GPIO_PIN(PA, 25),
308  .d_mux = GPIO_MUX_G,
309  .device = &USB->DEVICE,
310  }
311 };
313 #ifdef __cplusplus
314 }
315 #endif
316 
317 #endif /* PERIPH_CONF_H */
318 
select peripheral function D
cc2538_uart_t * dev
pointer to the used UART device
Definition: periph_cpu.h:167
I2C configuration options.
Definition: periph_cpu.h:128
Tc * dev
pointer to the used Timer device
use pad 0 for MISO line
select peripheral function E
No flags set.
static const gpio_t adc_channels[]
Static array with declared ADC channels.
port A
Definition: periph_cpu.h:87
port B
Definition: periph_cpu.h:88
SPI_Type * dev
SPI device to use.
Definition: periph_cpu.h:435
select pad 1
select pad 0
select peripheral function F
port C
Definition: periph_cpu.h:89
gpio_t dm
D- line gpio.
No flags set.
ADC Channel Configuration.
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
PWM configuration.
select peripheral function G
USB peripheral parameters.
gpio_mux_t
Available MUX values for configuring a pin&#39;s alternate function.
UART device configuration.
Definition: periph_cpu.h:166
I2C_TypeDef * dev
USART device used.
Definition: periph_cpu.h:240
use pad 2 for MOSI, pad 3 for SCK
SPI configuration structure type.
Definition: periph_cpu.h:271
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:35
normal mode: ~100 kbit/s
Definition: i2c.h:183
Timer device configuration.