boards/samr21-xpro/include/periph_conf.h
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1 /*
2  * Copyright (C) 2014-2015 Freie Universit├Ąt Berlin
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser
5  * General Public License v2.1. See the file LICENSE in the top level
6  * directory for more details.
7  */
8 
22 #ifndef PERIPH_CONF_H
23 #define PERIPH_CONF_H
24 
25 #include <stdint.h>
26 
27 #include "cpu.h"
28 #include "periph_cpu.h"
29 
30 #ifdef __cplusplus
31 extern "C" {
32 #endif
33 
65 #define CLOCK_USE_PLL (1)
66 
67 #if CLOCK_USE_PLL
68 /* edit these values to adjust the PLL output frequency */
69 #define CLOCK_PLL_MUL (47U) /* must be >= 31 & <= 95 */
70 #define CLOCK_PLL_DIV (1U) /* adjust to your needs */
71 /* generate the actual used core clock frequency */
72 #define CLOCK_CORECLOCK (((CLOCK_PLL_MUL + 1) * 1000000U) / CLOCK_PLL_DIV)
73 #else
74 /* edit this value to your needs */
75 #define CLOCK_DIV (1U)
76 /* generate the actual core clock frequency */
77 #define CLOCK_CORECLOCK (8000000 / CLOCK_DIV)
78 #endif
79 
85 #define TIMER_NUMOF (2U)
86 #define TIMER_0_EN 1
87 #define TIMER_1_EN 1
88 
89 /* Timer 0 configuration */
90 #define TIMER_0_DEV TC3->COUNT16
91 #define TIMER_0_CHANNELS 2
92 #define TIMER_0_MAX_VALUE (0xffff)
93 #define TIMER_0_ISR isr_tc3
94 
95 /* Timer 1 configuration */
96 #define TIMER_1_DEV TC4->COUNT32
97 #define TIMER_1_CHANNELS 2
98 #define TIMER_1_MAX_VALUE (0xffffffff)
99 #define TIMER_1_ISR isr_tc4
100 
106 static const uart_conf_t uart_config[] = {
107  {
108  .dev = &SERCOM0->USART,
109  .rx_pin = GPIO_PIN(PA,5),
110  .tx_pin = GPIO_PIN(PA,4),
111  .mux = GPIO_MUX_D,
112  .rx_pad = UART_PAD_RX_1,
113  .tx_pad = UART_PAD_TX_0
114  },
115  {
116  .dev = &SERCOM5->USART,
117  .rx_pin = GPIO_PIN(PA,23),
118  .tx_pin = GPIO_PIN(PA,22),
119  .mux = GPIO_MUX_D,
120  .rx_pad = UART_PAD_RX_1,
121  .tx_pad = UART_PAD_TX_0
122  }
123 };
124 
125 /* interrupt function name mapping */
126 #define UART_0_ISR isr_sercom0
127 #define UART_1_ISR isr_sercom5
128 
129 #define UART_NUMOF (sizeof(uart_config) / sizeof(uart_config[0]))
130 
136 #define PWM_0_EN 1
137 #define PWM_1_EN 1
138 #define PWM_MAX_CHANNELS 3
139 /* for compatibility with test application */
140 #define PWM_0_CHANNELS PWM_MAX_CHANNELS
141 #define PWM_1_CHANNELS PWM_MAX_CHANNELS
142 
143 /* PWM device configuration */
144 static const pwm_conf_t pwm_config[] = {
145 #if PWM_0_EN
146  {TCC1, {
147  /* GPIO pin, MUX value, TCC channel */
148  { GPIO_PIN(PA, 6), GPIO_MUX_E, 0 },
149  { GPIO_PIN(PA, 7), GPIO_MUX_E, 1 },
150  { GPIO_UNDEF, (gpio_mux_t)0, 2 }
151  }},
152 #endif
153 #if PWM_1_EN
154  {TCC0, {
155  /* GPIO pin, MUX value, TCC channel */
156  { GPIO_PIN(PA, 16), GPIO_MUX_F, 0 },
157  { GPIO_PIN(PA, 18), GPIO_MUX_F, 2 },
158  { GPIO_PIN(PA, 19), GPIO_MUX_F, 3 }
159  }}
160 #endif
161 };
162 
163 /* number of devices that are actually defined */
164 #define PWM_NUMOF (2U)
165 
171 static const spi_conf_t spi_config[] = {
172  {
173  .dev = &SERCOM4->SPI,
174  .miso_pin = GPIO_PIN(PC, 19),
175  .mosi_pin = GPIO_PIN(PB, 30),
176  .clk_pin = GPIO_PIN(PC, 18),
177  .miso_mux = GPIO_MUX_F,
178  .mosi_mux = GPIO_MUX_F,
179  .clk_mux = GPIO_MUX_F,
180  .miso_pad = SPI_PAD_MISO_0,
181  .mosi_pad = SPI_PAD_MOSI_2_SCK_3
182  },
183  {
184  .dev = &SERCOM5->SPI,
185  .miso_pin = GPIO_PIN(PB, 2),
186  .mosi_pin = GPIO_PIN(PB, 22),
187  .clk_pin = GPIO_PIN(PB, 23),
188  .miso_mux = GPIO_MUX_D,
189  .mosi_mux = GPIO_MUX_D,
190  .clk_mux = GPIO_MUX_D,
191  .miso_pad = SPI_PAD_MISO_0,
192  .mosi_pad = SPI_PAD_MOSI_2_SCK_3
193  }
194 };
195 
196 #define SPI_NUMOF (sizeof(spi_config) / sizeof(spi_config[0]))
197 
203 #define I2C_NUMOF (1U)
204 #define I2C_0_EN 1
205 #define I2C_1_EN 0
206 #define I2C_2_EN 0
207 #define I2C_3_EN 0
208 #define I2C_IRQ_PRIO 1
209 
210 #define I2C_0_DEV SERCOM3->I2CM
211 #define I2C_0_IRQ SERCOM3_IRQn
212 #define I2C_0_ISR isr_sercom3
213 /* I2C 0 GCLK */
214 #define I2C_0_GCLK_ID SERCOM3_GCLK_ID_CORE
215 #define I2C_0_GCLK_ID_SLOW SERCOM3_GCLK_ID_SLOW
216 /* I2C 0 pin configuration */
217 #define I2C_0_SDA GPIO_PIN(PA, 16)
218 #define I2C_0_SCL GPIO_PIN(PA, 17)
219 #define I2C_0_MUX GPIO_MUX_D
220 
225 #define RTC_NUMOF (1U)
226 #define RTC_DEV RTC->MODE2
227 
233 #define RTT_NUMOF (1U)
234 #define RTT_DEV RTC->MODE0
235 #define RTT_IRQ RTC_IRQn
236 #define RTT_IRQ_PRIO 10
237 #define RTT_ISR isr_rtc
238 #define RTT_MAX_VALUE (0xffffffff)
239 #define RTT_FREQUENCY (32768U) /* in Hz. For changes see `rtt.c` */
240 #define RTT_RUNSTDBY (1) /* Keep RTT running in sleep states */
241 
243 #ifdef __cplusplus
244 }
245 #endif
246 
247 #endif /* PERIPH_CONF_H */
248 
select peripheral function D
USART_TypeDef * dev
USART device used.
select peripheral function E
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
select peripheral function F
PWM configuration structure.
gpio_mux_t
Available MUX values for configuring a pin's alternate function.
UART device configuration.
use pad 2 for MOSI, pad 3 for SCK
#define GPIO_UNDEF
Define a custom GPIO_UNDEF value.
SPI configuration data structure.
cc2538_ssi_t * dev
SSI device.