boards/saml21-xpro/include/periph_conf.h
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1 /*
2  * Copyright (C) 2015 Kaspar Schleiser <kaspar@schleiser.de>
3  * 2015 FreshTemp, LLC.
4  * 2014-2016 Freie Universit├Ąt Berlin
5  *
6  * This file is subject to the terms and conditions of the GNU Lesser
7  * General Public License v2.1. See the file LICENSE in the top level
8  * directory for more details.
9  */
10 
23 #ifndef PERIPH_CONF_H
24 #define PERIPH_CONF_H
25 
26 #include "periph_cpu.h"
27 
28 #ifdef __cplusplus
29 extern "C" {
30 #endif
31 
35 #define CLOCK_CORECLOCK (16000000U)
36 
41 #define TIMER_NUMOF (1U)
42 #define TIMER_0_EN 1
43 
44 /* Timer 0 configuration */
45 #define TIMER_0_DEV TC0->COUNT32
46 #define TIMER_0_CHANNELS 1
47 #define TIMER_0_MAX_VALUE (0xffffffff)
48 #define TIMER_0_ISR isr_tc0
49 
55 #define UART_NUMOF (1U)
56 #define UART_0_EN 1
57 #define UART_IRQ_PRIO 1
58 
59 /* UART 0 device configuration */
60 #define UART_0_DEV SERCOM3->USART
61 #define UART_0_IRQ SERCOM3_IRQn
62 #define UART_0_ISR isr_sercom3
63 #define UART_0_REF_F (16000000UL)
64 #define UART_0_RUNSTDBY 1
65 
66 /* UART 0 pin configuration */
67 #define UART_0_PORT (PORT->Group[0])
68 #define UART_0_TX_PIN (22)
69 #define UART_0_RX_PIN (23)
70 #define UART_0_PINS (((PORT_PA22 | PORT_PA23) >> 16) | PORT_WRCONFIG_HWSEL)
71 
77 static const spi_conf_t spi_config[] = {
78  {
79  .dev = &(SERCOM0->SPI),
80  .miso_pin = GPIO_PIN(PA, 4),
81  .mosi_pin = GPIO_PIN(PA, 6),
82  .clk_pin = GPIO_PIN(PA, 7),
83  .miso_mux = GPIO_MUX_D,
84  .mosi_mux = GPIO_MUX_D,
85  .clk_mux = GPIO_MUX_D,
86  .miso_pad = SPI_PAD_MISO_0,
87  .mosi_pad = SPI_PAD_MOSI_2_SCK_3
88 
89  }
90 };
91 
92 #define SPI_NUMOF (sizeof(spi_config) / sizeof(spi_config[0]))
93 
99 #define I2C_NUMOF (0)
100 
106 #define RTC_NUMOF (1)
107 #define EXTERNAL_OSC32_SOURCE 1
108 #define INTERNAL_OSC32_SOURCE 0
109 #define ULTRA_LOW_POWER_INTERNAL_OSC_SOURCE 0
110 
116 #define RTT_FREQUENCY (32768U)
117 #define RTT_MAX_VALUE (0xffffffffU)
118 #define RTT_NUMOF (1)
119 
121 #ifdef __cplusplus
122 }
123 #endif
124 
125 #endif /* PERIPH_CONF_H */
126 
select peripheral function D
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
use pad 2 for MOSI, pad 3 for SCK
SPI configuration data structure.
cc2538_ssi_t * dev
SSI device.