boards/saml21-xpro/include/periph_conf.h
Go to the documentation of this file.
1 /*
2  * Copyright (C) 2015 Kaspar Schleiser <kaspar@schleiser.de>
3  * 2015 FreshTemp, LLC.
4  * 2014-2016 Freie Universit├Ąt Berlin
5  *
6  * This file is subject to the terms and conditions of the GNU Lesser
7  * General Public License v2.1. See the file LICENSE in the top level
8  * directory for more details.
9  */
10 
23 #ifndef PERIPH_CONF_H
24 #define PERIPH_CONF_H
25 
26 #include "periph_cpu.h"
27 
28 #ifdef __cplusplus
29 extern "C" {
30 #endif
31 
35 #define CLOCK_CORECLOCK (16000000U)
36 
41 #define TIMER_NUMOF (1U)
42 #define TIMER_0_EN 1
43 
44 /* Timer 0 configuration */
45 #define TIMER_0_DEV TC0->COUNT32
46 #define TIMER_0_CHANNELS 1
47 #define TIMER_0_MAX_VALUE (0xffffffff)
48 #define TIMER_0_ISR isr_tc0
49 
55 static const uart_conf_t uart_config[] = {
56  { /* Virtual COM Port */
57  .dev = &SERCOM3->USART,
58  .rx_pin = GPIO_PIN(PA,23),
59  .tx_pin = GPIO_PIN(PA,22),
60  .mux = GPIO_MUX_C,
61  .rx_pad = UART_PAD_RX_1,
62  .tx_pad = UART_PAD_TX_0,
63  .flags = UART_FLAG_NONE,
64  .gclk_src = GCLK_PCHCTRL_GEN_GCLK0
65  },
66  { /* EXT1 header */
67  .dev = &SERCOM4->USART,
68  .rx_pin = GPIO_PIN(PB, 9),
69  .tx_pin = GPIO_PIN(PB, 8),
70  .mux = GPIO_MUX_D,
71  .rx_pad = UART_PAD_RX_1,
72  .tx_pad = UART_PAD_TX_0,
73  .flags = UART_FLAG_NONE,
74  .gclk_src = GCLK_PCHCTRL_GEN_GCLK0
75  }
76 };
77 
78 /* interrupt function name mapping */
79 #define UART_0_ISR isr_sercom3
80 #define UART_1_ISR isr_sercom4
81 
82 #define UART_NUMOF (sizeof(uart_config) / sizeof(uart_config[0]))
83 
89 static const spi_conf_t spi_config[] = {
90  {
91  .dev = &(SERCOM0->SPI),
92  .miso_pin = GPIO_PIN(PA, 4),
93  .mosi_pin = GPIO_PIN(PA, 6),
94  .clk_pin = GPIO_PIN(PA, 7),
95  .miso_mux = GPIO_MUX_D,
96  .mosi_mux = GPIO_MUX_D,
97  .clk_mux = GPIO_MUX_D,
98  .miso_pad = SPI_PAD_MISO_0,
99  .mosi_pad = SPI_PAD_MOSI_2_SCK_3
100 
101  }
102 };
103 
104 #define SPI_NUMOF (sizeof(spi_config) / sizeof(spi_config[0]))
105 
111 #define I2C_NUMOF (1U)
112 #define I2C_0_EN 1
113 #define I2C_1_EN 0
114 #define I2C_2_EN 0
115 #define I2C_3_EN 0
116 #define I2C_IRQ_PRIO 1
117 
118 #define I2C_0_DEV SERCOM2->I2CM
119 #define I2C_0_IRQ SERCOM2_IRQn
120 #define I2C_0_ISR isr_sercom2
121 /* I2C 0 GCLK */
122 #define I2C_0_GCLK_ID SERCOM2_GCLK_ID_CORE
123 #define I2C_0_GCLK_ID_SLOW SERCOM2_GCLK_ID_SLOW
124 /* I2C 0 pin configuration */
125 #define I2C_0_SDA GPIO_PIN(PA, 8)
126 #define I2C_0_SCL GPIO_PIN(PA, 9)
127 #define I2C_0_MUX GPIO_MUX_D
128 
134 #define RTC_NUMOF (1)
135 #define EXTERNAL_OSC32_SOURCE 1
136 #define INTERNAL_OSC32_SOURCE 0
137 #define ULTRA_LOW_POWER_INTERNAL_OSC_SOURCE 0
138 
144 #define RTT_FREQUENCY (32768U)
145 #define RTT_MAX_VALUE (0xffffffffU)
146 #define RTT_NUMOF (1)
147 
153 #define ADC_NUMOF (3U)
154 
155 /* ADC 0 Default values */
156 #define ADC_0_CLK_SOURCE 0 /* GCLK_GENERATOR_0 */
157 #define ADC_0_PRESCALER ADC_CTRLB_PRESCALER_DIV256
158 
159 static const adc_conf_chan_t adc_channels[] = {
160  /* port, pin, muxpos */
161  {GPIO_PIN(PA, 10), ADC_INPUTCTRL_MUXPOS(ADC_INPUTCTRL_MUXPOS_AIN18)},
162  {GPIO_PIN(PA, 11), ADC_INPUTCTRL_MUXPOS(ADC_INPUTCTRL_MUXPOS_AIN19)},
163  {GPIO_PIN(PA, 2), ADC_INPUTCTRL_MUXPOS(ADC_INPUTCTRL_MUXPOS_AIN0)}
164 };
165 
166 #define ADC_0_NEG_INPUT ADC_INPUTCTRL_MUXNEG(0x18u)
167 #define ADC_0_REF_DEFAULT ADC_REFCTRL_REFSEL_INTVCC2
168 
170 #ifdef __cplusplus
171 }
172 #endif
173 
174 #endif /* PERIPH_CONF_H */
175 
select peripheral function D
USART_TypeDef * dev
USART device used.
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
ADC Channel Configuration.
select peripheral function C
UART device configuration.
use pad 2 for MOSI, pad 3 for SCK
SPI module configuration options.
cc2538_ssi_t * dev
SSI device.