boards/samd21-xpro/include/periph_conf.h
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1 /*
2  * Copyright (C) 2017 Travis Griggs <travisgriggs@gmail.com>
3  * Copyright (C) 2017 Dan Evans <photonthunder@gmail.com>
4  *
5  * This file is subject to the terms and conditions of the GNU Lesser
6  * General Public License v2.1. See the file LICENSE in the top level
7  * directory for more details.
8  */
9 
22 #ifndef PERIPH_CONF_H
23 #define PERIPH_CONF_H
24 
25 #include <stdint.h>
26 
27 #include "cpu.h"
28 #include "periph_cpu.h"
29 
30 #ifdef __cplusplus
31 extern "C" {
32 #endif
33 
65 #define CLOCK_USE_PLL (1)
66 
67 #if CLOCK_USE_PLL
68 /* edit these values to adjust the PLL output frequency */
69 #define CLOCK_PLL_MUL (47U) /* must be >= 31 & <= 95 */
70 #define CLOCK_PLL_DIV (1U) /* adjust to your needs */
71 /* generate the actual used core clock frequency */
72 #define CLOCK_CORECLOCK (((CLOCK_PLL_MUL + 1) * 1000000U) / CLOCK_PLL_DIV)
73 #else
74 /* edit this value to your needs */
75 #define CLOCK_DIV (1U)
76 /* generate the actual core clock frequency */
77 #define CLOCK_CORECLOCK (8000000 / CLOCK_DIV)
78 #endif
79 
85 #define TIMER_NUMOF (2U)
86 #define TIMER_0_EN 1
87 #define TIMER_1_EN 1
88 
89 /* Timer 0 configuration */
90 #define TIMER_0_DEV TC3->COUNT16
91 #define TIMER_0_CHANNELS 2
92 #define TIMER_0_MAX_VALUE (0xffff)
93 #define TIMER_0_ISR isr_tc3
94 
95 /* Timer 1 configuration */
96 #define TIMER_1_DEV TC4->COUNT32
97 #define TIMER_1_CHANNELS 2
98 #define TIMER_1_MAX_VALUE (0xffffffff)
99 #define TIMER_1_ISR isr_tc4
100 
106 static const uart_conf_t uart_config[] = {
107  { /* Virtual COM Port */
108  .dev = &SERCOM3->USART,
109  .rx_pin = GPIO_PIN(PA,23),
110  .tx_pin = GPIO_PIN(PA,22),
111  .mux = GPIO_MUX_C,
112  .rx_pad = UART_PAD_RX_1,
113  .tx_pad = UART_PAD_TX_0
114  },
115  { /* EXT1 */
116  .dev = &SERCOM4->USART,
117  .rx_pin = GPIO_PIN(PB,9),
118  .tx_pin = GPIO_PIN(PB,8),
119  .mux = GPIO_MUX_D,
120  .rx_pad = UART_PAD_RX_1,
121  .tx_pad = UART_PAD_TX_0
122  },
123  { /* EXT2/3 */
124  .dev = &SERCOM4->USART,
125  .rx_pin = GPIO_PIN(PB,11),
126  .tx_pin = GPIO_PIN(PB,10),
127  .mux = GPIO_MUX_D,
128  .rx_pad = UART_PAD_RX_3,
129  .tx_pad = UART_PAD_TX_2
130  }
131 };
132 
133 /* interrupt function name mapping */
134 #define UART_0_ISR isr_sercom3
135 #define UART_1_ISR isr_sercom4
136 #define UART_2_ISR isr_sercom5
137 
138 #define UART_NUMOF (sizeof(uart_config) / sizeof(uart_config[0]))
139 
145 #define PWM_0_EN 1
146 #define PWM_1_EN 0
147 #define PWM_2_EN 0
148 #define PWM_MAX_CHANNELS 2
149 /* for compatibility with test application */
150 #define PWM_0_CHANNELS PWM_MAX_CHANNELS
151 #define PWM_1_CHANNELS PWM_MAX_CHANNELS
152 #define PWM_2_CHANNELS PWM_MAX_CHANNELS
153 
154 /* PWM device configuration */
155 static const pwm_conf_t pwm_config[] = {
156 #if PWM_0_EN
157  {TCC2, {
158  /* GPIO pin, MUX value, TCC channel */
159  { GPIO_PIN(PA, 12), GPIO_MUX_E, 0 },
160  { GPIO_PIN(PA, 13), GPIO_MUX_E, 1 },
161  }},
162 #endif
163 #if PWM_1_EN
164  {TC4, {
165  /* GPIO pin, MUX value, TCC channel */
166  { GPIO_PIN(PB, 12), GPIO_MUX_E, 0 },
167  { GPIO_PIN(PB, 13), GPIO_MUX_E, 1 },
168  }}
169 #endif
170 #if PWM_2_EN
171  {TC6, {
172  /* GPIO pin, MUX value, TCC channel */
173  { GPIO_PIN(PB, 02), GPIO_MUX_E, 0 },
174  { GPIO_PIN(PB, 03), GPIO_MUX_E, 1 },
175  }}
176 #endif
177 };
178 
179 /* number of devices that are actually defined */
180 #define PWM_NUMOF (3U)
181 
187 static const spi_conf_t spi_config[] = {
188  { /* EXT1 */
189  .dev = &SERCOM0->SPI,
190  .miso_pin = GPIO_PIN(PA, 4),
191  .mosi_pin = GPIO_PIN(PA, 6),
192  .clk_pin = GPIO_PIN(PA, 7),
193  .miso_mux = GPIO_MUX_D,
194  .mosi_mux = GPIO_MUX_D,
195  .clk_mux = GPIO_MUX_D,
196  .miso_pad = SPI_PAD_MISO_0,
197  .mosi_pad = SPI_PAD_MOSI_2_SCK_3
198  },
199  { /* EXT2 */
200  .dev = &SERCOM1->SPI,
201  .miso_pin = GPIO_PIN(PA, 16),
202  .mosi_pin = GPIO_PIN(PA, 18),
203  .clk_pin = GPIO_PIN(PA, 19),
204  .miso_mux = GPIO_MUX_C,
205  .mosi_mux = GPIO_MUX_C,
206  .clk_mux = GPIO_MUX_C,
207  .miso_pad = SPI_PAD_MISO_0,
208  .mosi_pad = SPI_PAD_MOSI_2_SCK_3
209  },
210  { /* EXT3 */
211  .dev = &SERCOM5->SPI,
212  .miso_pin = GPIO_PIN(PB, 16),
213  .mosi_pin = GPIO_PIN(PB, 22),
214  .clk_pin = GPIO_PIN(PB, 23),
215  .miso_mux = GPIO_MUX_C,
216  .mosi_mux = GPIO_MUX_D,
217  .clk_mux = GPIO_MUX_D,
218  .miso_pad = SPI_PAD_MISO_0,
219  .mosi_pad = SPI_PAD_MOSI_2_SCK_3
220  }
221 };
222 
223 #define SPI_NUMOF (sizeof(spi_config) / sizeof(spi_config[0]))
224 
230 #define I2C_NUMOF (1U)
231 #define I2C_0_EN 1
232 #define I2C_1_EN 0
233 #define I2C_2_EN 0
234 #define I2C_3_EN 0
235 #define I2C_IRQ_PRIO 1
236 
237 #define I2C_0_DEV SERCOM2->I2CM
238 #define I2C_0_IRQ SERCOM2_IRQn
239 #define I2C_0_ISR isr_sercom2
240 /* I2C 0 GCLK */
241 #define I2C_0_GCLK_ID SERCOM2_GCLK_ID_CORE
242 #define I2C_0_GCLK_ID_SLOW SERCOM2_GCLK_ID_SLOW
243 /* I2C 0 pin configuration */
244 #define I2C_0_SDA GPIO_PIN(PA, 8)
245 #define I2C_0_SCL GPIO_PIN(PA, 9)
246 #define I2C_0_MUX GPIO_MUX_D
247 
252 #define RTC_NUMOF (1U)
253 #define RTC_DEV RTC->MODE2
254 
260 #define RTT_NUMOF (1U)
261 #define RTT_DEV RTC->MODE0
262 #define RTT_IRQ RTC_IRQn
263 #define RTT_IRQ_PRIO 10
264 #define RTT_ISR isr_rtc
265 #define RTT_MAX_VALUE (0xffffffff)
266 #define RTT_FREQUENCY (32768U) /* in Hz. For changes see `rtt.c` */
267 #define RTT_RUNSTDBY (1) /* Keep RTT running in sleep states */
268 
274 #define ADC_0_EN 1
275 #define ADC_MAX_CHANNELS 14
276 /* ADC 0 device configuration */
277 #define ADC_0_DEV ADC
278 #define ADC_0_IRQ ADC_IRQn
279 
280 /* ADC 0 Default values */
281 #define ADC_0_CLK_SOURCE 0 /* GCLK_GENERATOR_0 */
282 #define ADC_0_PRESCALER ADC_CTRLB_PRESCALER_DIV512
283 
284 #define ADC_0_NEG_INPUT ADC_INPUTCTRL_MUXNEG_GND
285 #define ADC_0_GAIN_FACTOR_DEFAULT ADC_INPUTCTRL_GAIN_1X
286 #define ADC_0_REF_DEFAULT ADC_REFCTRL_REFSEL_INT1V
287 
288 static const adc_conf_chan_t adc_channels[] = {
289  /* port, pin, muxpos */
290  {GPIO_PIN(PB, 0), ADC_INPUTCTRL_MUXPOS_PIN8}, /* EXT1, pin 3 */
291  {GPIO_PIN(PB, 1), ADC_INPUTCTRL_MUXPOS_PIN9}, /* EXT1, pin 4 */
292  {GPIO_PIN(PA, 10), ADC_INPUTCTRL_MUXPOS_PIN18}, /* EXT2, pin 3 */
293  {GPIO_PIN(PA, 11), ADC_INPUTCTRL_MUXPOS_PIN19}, /* EXT2, pin 4 */
294  {GPIO_PIN(PA, 2), ADC_INPUTCTRL_MUXPOS_PIN0}, /* EXT3, pin 3 */
295  {GPIO_PIN(PA, 3), ADC_INPUTCTRL_MUXPOS_PIN1} /* EXT3, pin 4. This is
296  disconnected by default. PA3 is connected to USB_ID.
297  Move PA03 SELECT jumper to EXT3 to connect. */
298 };
299 
300 #define ADC_0_CHANNELS (6U)
301 #define ADC_NUMOF ADC_0_CHANNELS
302 
304 #ifdef __cplusplus
305 }
306 #endif
307 
308 #endif /* PERIPH_CONF_H */
309 
select peripheral function D
USART_TypeDef * dev
USART device used.
select peripheral function E
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
ADC Channel Configuration.
PWM configuration structure.
select peripheral function C
UART device configuration.
use pad 2 for MOSI, pad 3 for SCK
SPI configuration data structure.
cc2538_ssi_t * dev
SSI device.