boards/samd21-xpro/include/periph_conf.h
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1 /*
2  * Copyright (C) 2017 Travis Griggs <travisgriggs@gmail.com>
3  * Copyright (C) 2017 Dan Evans <photonthunder@gmail.com>
4  *
5  * This file is subject to the terms and conditions of the GNU Lesser
6  * General Public License v2.1. See the file LICENSE in the top level
7  * directory for more details.
8  */
9 
22 #ifndef PERIPH_CONF_H
23 #define PERIPH_CONF_H
24 
25 #include <stdint.h>
26 
27 #include "cpu.h"
28 #include "periph_cpu.h"
29 
30 #ifdef __cplusplus
31 extern "C" {
32 #endif
33 
66 #define CLOCK_USE_PLL (1)
67 
68 #if CLOCK_USE_PLL
69 /* edit these values to adjust the PLL output frequency */
70 #define CLOCK_PLL_MUL (47U) /* must be >= 31 & <= 95 */
71 #define CLOCK_PLL_DIV (1U) /* adjust to your needs */
72 /* generate the actual used core clock frequency */
73 #define CLOCK_CORECLOCK (((CLOCK_PLL_MUL + 1) * 1000000U) / CLOCK_PLL_DIV)
74 #elif CLOCK_USE_XOSC32_DFLL
75 /* Settings for 32 kHz external oscillator and 48 MHz DFLL */
76 #define CLOCK_CORECLOCK (48000000U)
77 #define CLOCK_XOSC32K (32768UL)
78 #define CLOCK_8MHZ (1)
79 #define GEN2_ULP32K (1)
80 #else
81 /* edit this value to your needs */
82 #define CLOCK_DIV (1U)
83 /* generate the actual core clock frequency */
84 #define CLOCK_CORECLOCK (8000000 / CLOCK_DIV)
85 #endif
86 
92 #define TIMER_NUMOF (2U)
93 #define TIMER_0_EN 1
94 #define TIMER_1_EN 1
95 
96 /* Timer 0 configuration */
97 #define TIMER_0_DEV TC3->COUNT16
98 #define TIMER_0_CHANNELS 2
99 #define TIMER_0_MAX_VALUE (0xffff)
100 #define TIMER_0_ISR isr_tc3
101 
102 /* Timer 1 configuration */
103 #define TIMER_1_DEV TC4->COUNT32
104 #define TIMER_1_CHANNELS 2
105 #define TIMER_1_MAX_VALUE (0xffffffff)
106 #define TIMER_1_ISR isr_tc4
107 
113 static const uart_conf_t uart_config[] = {
114  { /* Virtual COM Port */
115  .dev = &SERCOM3->USART,
116  .rx_pin = GPIO_PIN(PA,23),
117  .tx_pin = GPIO_PIN(PA,22),
118  .mux = GPIO_MUX_C,
119  .rx_pad = UART_PAD_RX_1,
120  .tx_pad = UART_PAD_TX_0
121  },
122  { /* EXT1 */
123  .dev = &SERCOM4->USART,
124  .rx_pin = GPIO_PIN(PB,9),
125  .tx_pin = GPIO_PIN(PB,8),
126  .mux = GPIO_MUX_D,
127  .rx_pad = UART_PAD_RX_1,
128  .tx_pad = UART_PAD_TX_0
129  },
130  { /* EXT2/3 */
131  .dev = &SERCOM4->USART,
132  .rx_pin = GPIO_PIN(PB,11),
133  .tx_pin = GPIO_PIN(PB,10),
134  .mux = GPIO_MUX_D,
135  .rx_pad = UART_PAD_RX_3,
136  .tx_pad = UART_PAD_TX_2
137  }
138 };
139 
140 /* interrupt function name mapping */
141 #define UART_0_ISR isr_sercom3
142 #define UART_1_ISR isr_sercom4
143 #define UART_2_ISR isr_sercom5
144 
145 #define UART_NUMOF (sizeof(uart_config) / sizeof(uart_config[0]))
146 
152 #define PWM_0_EN 1
153 #define PWM_1_EN 0
154 #define PWM_2_EN 0
155 #define PWM_MAX_CHANNELS 2
156 /* for compatibility with test application */
157 #define PWM_0_CHANNELS PWM_MAX_CHANNELS
158 #define PWM_1_CHANNELS PWM_MAX_CHANNELS
159 #define PWM_2_CHANNELS PWM_MAX_CHANNELS
160 
161 /* PWM device configuration */
162 static const pwm_conf_t pwm_config[] = {
163 #if PWM_0_EN
164  {TCC2, {
165  /* GPIO pin, MUX value, TCC channel */
166  { GPIO_PIN(PA, 12), GPIO_MUX_E, 0 },
167  { GPIO_PIN(PA, 13), GPIO_MUX_E, 1 },
168  }},
169 #endif
170 #if PWM_1_EN
171  {TC4, {
172  /* GPIO pin, MUX value, TCC channel */
173  { GPIO_PIN(PB, 12), GPIO_MUX_E, 0 },
174  { GPIO_PIN(PB, 13), GPIO_MUX_E, 1 },
175  }}
176 #endif
177 #if PWM_2_EN
178  {TC6, {
179  /* GPIO pin, MUX value, TCC channel */
180  { GPIO_PIN(PB, 02), GPIO_MUX_E, 0 },
181  { GPIO_PIN(PB, 03), GPIO_MUX_E, 1 },
182  }}
183 #endif
184 };
185 
186 /* number of devices that are actually defined */
187 #define PWM_NUMOF (3U)
188 
194 static const spi_conf_t spi_config[] = {
195  { /* EXT1 */
196  .dev = &SERCOM0->SPI,
197  .miso_pin = GPIO_PIN(PA, 4),
198  .mosi_pin = GPIO_PIN(PA, 6),
199  .clk_pin = GPIO_PIN(PA, 7),
200  .miso_mux = GPIO_MUX_D,
201  .mosi_mux = GPIO_MUX_D,
202  .clk_mux = GPIO_MUX_D,
203  .miso_pad = SPI_PAD_MISO_0,
204  .mosi_pad = SPI_PAD_MOSI_2_SCK_3
205  },
206  { /* EXT2 */
207  .dev = &SERCOM1->SPI,
208  .miso_pin = GPIO_PIN(PA, 16),
209  .mosi_pin = GPIO_PIN(PA, 18),
210  .clk_pin = GPIO_PIN(PA, 19),
211  .miso_mux = GPIO_MUX_C,
212  .mosi_mux = GPIO_MUX_C,
213  .clk_mux = GPIO_MUX_C,
214  .miso_pad = SPI_PAD_MISO_0,
215  .mosi_pad = SPI_PAD_MOSI_2_SCK_3
216  },
217  { /* EXT3 */
218  .dev = &SERCOM5->SPI,
219  .miso_pin = GPIO_PIN(PB, 16),
220  .mosi_pin = GPIO_PIN(PB, 22),
221  .clk_pin = GPIO_PIN(PB, 23),
222  .miso_mux = GPIO_MUX_C,
223  .mosi_mux = GPIO_MUX_D,
224  .clk_mux = GPIO_MUX_D,
225  .miso_pad = SPI_PAD_MISO_0,
226  .mosi_pad = SPI_PAD_MOSI_2_SCK_3
227  }
228 };
229 
230 #define SPI_NUMOF (sizeof(spi_config) / sizeof(spi_config[0]))
231 
237 #define I2C_NUMOF (1U)
238 #define I2C_0_EN 1
239 #define I2C_1_EN 0
240 #define I2C_2_EN 0
241 #define I2C_3_EN 0
242 #define I2C_IRQ_PRIO 1
243 
244 #define I2C_0_DEV SERCOM2->I2CM
245 #define I2C_0_IRQ SERCOM2_IRQn
246 #define I2C_0_ISR isr_sercom2
247 /* I2C 0 GCLK */
248 #define I2C_0_GCLK_ID SERCOM2_GCLK_ID_CORE
249 #define I2C_0_GCLK_ID_SLOW SERCOM2_GCLK_ID_SLOW
250 /* I2C 0 pin configuration */
251 #define I2C_0_SDA GPIO_PIN(PA, 8)
252 #define I2C_0_SCL GPIO_PIN(PA, 9)
253 #define I2C_0_MUX GPIO_MUX_D
254 
259 #define RTC_NUMOF (1U)
260 #define RTC_DEV RTC->MODE2
261 
267 #define RTT_NUMOF (1U)
268 #define RTT_DEV RTC->MODE0
269 #define RTT_IRQ RTC_IRQn
270 #define RTT_IRQ_PRIO 10
271 #define RTT_ISR isr_rtc
272 #define RTT_MAX_VALUE (0xffffffff)
273 #define RTT_FREQUENCY (32768U) /* in Hz. For changes see `rtt.c` */
274 #define RTT_RUNSTDBY (1) /* Keep RTT running in sleep states */
275 
281 #define ADC_0_EN 1
282 #define ADC_MAX_CHANNELS 14
283 /* ADC 0 device configuration */
284 #define ADC_0_DEV ADC
285 #define ADC_0_IRQ ADC_IRQn
286 
287 /* ADC 0 Default values */
288 #define ADC_0_CLK_SOURCE 0 /* GCLK_GENERATOR_0 */
289 #define ADC_0_PRESCALER ADC_CTRLB_PRESCALER_DIV512
290 
291 #define ADC_0_NEG_INPUT ADC_INPUTCTRL_MUXNEG_GND
292 #define ADC_0_GAIN_FACTOR_DEFAULT ADC_INPUTCTRL_GAIN_1X
293 #define ADC_0_REF_DEFAULT ADC_REFCTRL_REFSEL_INT1V
294 
295 static const adc_conf_chan_t adc_channels[] = {
296  /* port, pin, muxpos */
297  {GPIO_PIN(PB, 0), ADC_INPUTCTRL_MUXPOS_PIN8}, /* EXT1, pin 3 */
298  {GPIO_PIN(PB, 1), ADC_INPUTCTRL_MUXPOS_PIN9}, /* EXT1, pin 4 */
299  {GPIO_PIN(PA, 10), ADC_INPUTCTRL_MUXPOS_PIN18}, /* EXT2, pin 3 */
300  {GPIO_PIN(PA, 11), ADC_INPUTCTRL_MUXPOS_PIN19}, /* EXT2, pin 4 */
301  {GPIO_PIN(PA, 2), ADC_INPUTCTRL_MUXPOS_PIN0}, /* EXT3, pin 3 */
302  {GPIO_PIN(PA, 3), ADC_INPUTCTRL_MUXPOS_PIN1} /* EXT3, pin 4. This is
303  disconnected by default. PA3 is connected to USB_ID.
304  Move PA03 SELECT jumper to EXT3 to connect. */
305 };
306 
307 #define ADC_0_CHANNELS (6U)
308 #define ADC_NUMOF ADC_0_CHANNELS
309 
311 #ifdef __cplusplus
312 }
313 #endif
314 
315 #endif /* PERIPH_CONF_H */
316 
select peripheral function D
USART_TypeDef * dev
USART device used.
select peripheral function E
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
ADC Channel Configuration.
PWM configuration structure.
select peripheral function C
UART device configuration.
use pad 2 for MOSI, pad 3 for SCK
SPI module configuration options.
cc2538_ssi_t * dev
SSI device.