boards/remote-revb/include/periph_conf.h
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1 /*
2  * Copyright (C) 2014 Freie Universit├Ąt Berlin
3  * Copyright (C) 2015 Zolertia SL
4  * 2017 HAW Hamburg
5  *
6  * This file is subject to the terms and conditions of the GNU Lesser General
7  * Public License v2.1. See the file LICENSE in the top level directory for more
8  * details.
9  */
10 
23 #ifndef PERIPH_CONF_H
24 #define PERIPH_CONF_H
25 
26 #include "cc2538_gpio.h"
27 #include "periph_cpu.h"
28 #include "periph_common.h"
29 
30 #ifdef __cplusplus
31  extern "C" {
32 #endif
33 
38 #define I2C_NUMOF 1
39 #define I2C_0_EN 1
40 #define I2C_IRQ_PRIO 1
41 
42 /* I2C 0 device configuration */
43 #define I2C_0_DEV 0
44 #define I2C_0_IRQ I2C_IRQn
45 #define I2C_0_IRQ_HANDLER isr_i2c
46 #define I2C_0_SCL_PIN GPIO_PC3
47 #define I2C_0_SDA_PIN GPIO_PC2
48 
49 static const i2c_conf_t i2c_config[I2C_NUMOF] = {
50  {
51  .scl_pin = I2C_0_SCL_PIN,
52  .sda_pin = I2C_0_SDA_PIN,
53  },
54 };
64 static const spi_clk_conf_t spi_clk_config[] = {
65  { .cpsr = 10, .scr = 31 }, /* 100khz */
66  { .cpsr = 2, .scr = 39 }, /* 400khz */
67  { .cpsr = 2, .scr = 15 }, /* 1MHz */
68  { .cpsr = 2, .scr = 2 }, /* ~4.5MHz */
69  { .cpsr = 2, .scr = 1 } /* ~10.7MHz */
70 };
71 
76 static const spi_conf_t spi_config[] = {
77  {
78  .dev = SSI0,
79  .mosi_pin = GPIO_PB1,
80  .miso_pin = GPIO_PB3,
81  .sck_pin = GPIO_PB2,
82  .cs_pin = GPIO_PB5
83  },
84  {
85  .dev = SSI1,
86  .mosi_pin = GPIO_PC5,
87  .miso_pin = GPIO_PC6,
88  .sck_pin = GPIO_PC4,
89  .cs_pin = GPIO_PA7
90  }
91 };
92 #define SPI_NUMOF (sizeof(spi_config) / sizeof(spi_config[0]))
93 
99 #define SOC_ADC_ADCCON_REF SOC_ADC_ADCCON_REF_AVDD5
100 
101 static const adc_conf_t adc_config[] = {
102  GPIO_PIN(0, 5),
103  GPIO_PIN(0, 4),
104  /* voltage divider with 5/3 relationship to allow 5V sensors */
105  GPIO_PIN(0, 2),
106 };
107 
108 #define ADC_NUMOF (sizeof(adc_config) / sizeof(adc_config[0]))
109 
111 #ifdef __cplusplus
112 } /* end extern "C" */
113 #endif
114 
115 #endif /* PERIPH_CONF_H */
116 
I2C configuration options.
PB5.
Definition: cc2538_gpio.h:159
gpio_t scl_pin
pin used for SCL
PB2.
Definition: cc2538_gpio.h:156
PC4.
Definition: cc2538_gpio.h:166
#define SSI1
SSI1 Instance.
Definition: cc2538_ssi.h:78
PC5.
Definition: cc2538_gpio.h:167
Datafields for static SPI clock configuration values.
static const spi_clk_conf_t spi_clk_config[]
Pre-calculated clock divider values based on a CLOCK_CORECLOCK (32MHz)
PB3.
Definition: cc2538_gpio.h:157
Peripheral MCU configuration for the Re-Mote boards.
PB1.
Definition: cc2538_gpio.h:155
Driver for the cc2538 GPIO controller.
PA7.
Definition: cc2538_gpio.h:153
SPI module configuration options.
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
PC6.
Definition: cc2538_gpio.h:168
uint8_t cpsr
CPSR clock divider.
ADC device configuration.
#define SSI0
SSI0 Instance.
Definition: cc2538_ssi.h:77
cc2538_ssi_t * dev
SSI device.