boards/remote-revb/include/periph_conf.h
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1 /*
2  * Copyright (C) 2014 Freie Universit├Ąt Berlin
3  * Copyright (C) 2015 Zolertia SL
4  *
5  * This file is subject to the terms and conditions of the GNU Lesser General
6  * Public License v2.1. See the file LICENSE in the top level directory for more
7  * details.
8  */
9 
21 #ifndef PERIPH_CONF_H
22 #define PERIPH_CONF_H
23 
24 #include "cc2538_gpio.h"
25 #include "periph_cpu.h"
26 #include "periph_common.h"
27 
28 #ifdef __cplusplus
29  extern "C" {
30 #endif
31 
36 #define UART_NUMOF (1U)
37 #define UART_0_EN 1
38 #define UART_IRQ_PRIO 1
39 
40 /* UART 0 device configuration */
41 #define UART_0_DEV UART0
42 #define UART_0_IRQ UART0_IRQn
43 #define UART_0_ISR isr_uart0
44 /* UART 0 pin configuration */
45 #define UART_0_TX_PIN GPIO_PA1
46 #define UART_0_RX_PIN GPIO_PA0
47 
54 #define I2C_NUMOF 1
55 #define I2C_0_EN 1
56 #define I2C_IRQ_PRIO 1
57 
58 /* I2C 0 device configuration */
59 #define I2C_0_DEV 0
60 #define I2C_0_IRQ I2C_IRQn
61 #define I2C_0_IRQ_HANDLER isr_i2c
62 #define I2C_0_SCL_PIN GPIO_PC3
63 #define I2C_0_SDA_PIN GPIO_PC2
64 
65 static const i2c_conf_t i2c_config[I2C_NUMOF] = {
66  {
67  .scl_pin = I2C_0_SCL_PIN,
68  .sda_pin = I2C_0_SDA_PIN,
69  },
70 };
80 static const spi_clk_conf_t spi_clk_config[] = {
81  { .cpsr = 10, .scr = 31 }, /* 100khz */
82  { .cpsr = 2, .scr = 39 }, /* 400khz */
83  { .cpsr = 2, .scr = 15 }, /* 1MHz */
84  { .cpsr = 2, .scr = 2 }, /* ~4.5MHz */
85  { .cpsr = 2, .scr = 1 } /* ~10.7MHz */
86 };
87 
92 static const spi_conf_t spi_config[] = {
93  {
94  .dev = SSI0,
95  .mosi_pin = GPIO_PB1,
96  .miso_pin = GPIO_PB3,
97  .sck_pin = GPIO_PB2,
98  .cs_pin = GPIO_PB5
99  },
100  {
101  .dev = SSI1,
102  .mosi_pin = GPIO_PC5,
103  .miso_pin = GPIO_PC6,
104  .sck_pin = GPIO_PC4,
105  .cs_pin = GPIO_PA7
106  }
107 };
108 
109 #define SPI_NUMOF (sizeof(spi_config) / sizeof(spi_config[0]))
110 
112 #ifdef __cplusplus
113 } /* end extern "C" */
114 #endif
115 
116 #endif /* PERIPH_CONF_H */
117 
PB1.
Definition: cc2538_gpio.h:166
PB3.
Definition: cc2538_gpio.h:168
I2C configuration options.
PC4.
Definition: cc2538_gpio.h:177
gpio_t scl_pin
pin used for SCL
PC6.
Definition: cc2538_gpio.h:179
#define SSI1
SSI1 Instance.
Definition: cc2538_ssi.h:78
PA7.
Definition: cc2538_gpio.h:164
PB5.
Definition: cc2538_gpio.h:170
Datafields for static SPI clock configuration values.
static const spi_clk_conf_t spi_clk_config[]
Pre-calculated clock divider values based on a CLOCK_CORECLOCK (32MHz)
PB2.
Definition: cc2538_gpio.h:167
Peripheral MCU configuration for the Re-Mote boards.
Driver for the cc2538 GPIO controller.
SPI configuration data structure.
uint8_t cpsr
CPSR clock divider.
#define SSI0
SSI0 Instance.
Definition: cc2538_ssi.h:77
PC5.
Definition: cc2538_gpio.h:178
cc2538_ssi_t * dev
SSI device.