boards/remote-reva/include/periph_conf.h
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1 /*
2  * Copyright (C) 2014-2016 Freie Universit├Ąt Berlin
3  * 2015 Zolertia SL
4  *
5  * This file is subject to the terms and conditions of the GNU Lesser
6  * General Public License v2.1. See the file LICENSE in the top level
7  * directory for more details.
8  */
9 
22 #ifndef PERIPH_CONF_H
23 #define PERIPH_CONF_H
24 
25 #include "periph_common.h"
26 
27 #ifdef __cplusplus
28  extern "C" {
29 #endif
30 
35 #define I2C_NUMOF 1
36 #define I2C_0_EN 1
37 #define I2C_IRQ_PRIO 1
38 
39 /* I2C 0 device configuration */
40 #define I2C_0_DEV 0
41 #define I2C_0_IRQ I2C_IRQn
42 #define I2C_0_IRQ_HANDLER isr_i2c
43 #define I2C_0_SCL_PIN GPIO_PC3
44 #define I2C_0_SDA_PIN GPIO_PC2
45 
46 static const i2c_conf_t i2c_config[I2C_NUMOF] = {
47  {
48  .scl_pin = I2C_0_SCL_PIN,
49  .sda_pin = I2C_0_SDA_PIN,
50  },
51 };
61 static const spi_clk_conf_t spi_clk_config[] = {
62  { .cpsr = 10, .scr = 31 }, /* 100khz */
63  { .cpsr = 2, .scr = 39 }, /* 400khz */
64  { .cpsr = 2, .scr = 15 }, /* 1MHz */
65  { .cpsr = 2, .scr = 2 }, /* ~4.5MHz */
66  { .cpsr = 2, .scr = 1 } /* ~10.7MHz */
67 };
68 
73 static const spi_conf_t spi_config[] = {
74  {
75  .dev = SSI0,
76  .mosi_pin = GPIO_PB1,
77  .miso_pin = GPIO_PB3,
78  .sck_pin = GPIO_PB2,
79  .cs_pin = GPIO_PB5
80  },
81  {
82  .dev = SSI1,
83  .mosi_pin = GPIO_PC5,
84  .miso_pin = GPIO_PC6,
85  .sck_pin = GPIO_PC4,
86  .cs_pin = GPIO_PA7
87  }
88 };
89 
90 #define SPI_NUMOF (sizeof(spi_config) / sizeof(spi_config[0]))
91 
97 #define SOC_ADC_ADCCON_REF SOC_ADC_ADCCON_REF_AVDD5
98 
99 static const adc_conf_t adc_config[] = {
100  GPIO_PIN(0, 5),
101  GPIO_PIN(0, 4),
102  /* voltage divider with 5/3 relationship to allow 5V sensors */
103  GPIO_PIN(0, 2),
104 };
105 
106 #define ADC_NUMOF (sizeof(adc_config) / sizeof(adc_config[0]))
107 
111 #ifdef __cplusplus
112 } /* end extern "C" */
113 #endif
114 
115 #endif /* PERIPH_CONF_H */
116 
I2C configuration options.
PB5.
Definition: cc2538_gpio.h:159
gpio_t scl_pin
pin used for SCL
PB2.
Definition: cc2538_gpio.h:156
PC4.
Definition: cc2538_gpio.h:166
#define SSI1
SSI1 Instance.
Definition: cc2538_ssi.h:78
PC5.
Definition: cc2538_gpio.h:167
Datafields for static SPI clock configuration values.
static const spi_clk_conf_t spi_clk_config[]
Pre-calculated clock divider values based on a CLOCK_CORECLOCK (32MHz)
PB3.
Definition: cc2538_gpio.h:157
Peripheral MCU configuration for the Re-Mote boards.
PB1.
Definition: cc2538_gpio.h:155
PA7.
Definition: cc2538_gpio.h:153
SPI module configuration options.
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
PC6.
Definition: cc2538_gpio.h:168
uint8_t cpsr
CPSR clock divider.
ADC device configuration.
#define SSI0
SSI0 Instance.
Definition: cc2538_ssi.h:77
cc2538_ssi_t * dev
SSI device.