boards/remote-pa/include/periph_conf.h
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1 /*
2  * Copyright (C) 2014-2016 Freie Universit├Ąt Berlin
3  * 2015 Zolertia SL
4  *
5  * This file is subject to the terms and conditions of the GNU Lesser
6  * General Public License v2.1. See the file LICENSE in the top level
7  * directory for more details.
8  */
9 
22 #ifndef PERIPH_CONF_H
23 #define PERIPH_CONF_H
24 
25 #include "periph_common.h"
26 
27 #ifdef __cplusplus
28  extern "C" {
29 #endif
30 
35 #define UART_NUMOF (1U)
36 #define UART_0_EN 1
37 #define UART_IRQ_PRIO 1
38 
39 /* UART 0 device configuration */
40 #define UART_0_DEV UART0
41 #define UART_0_IRQ UART0_IRQn
42 #define UART_0_ISR isr_uart0
43 /* UART 0 pin configuration */
44 #define UART_0_TX_PIN GPIO_PA1
45 #define UART_0_RX_PIN GPIO_PA0
46 
52 #define I2C_NUMOF 1
53 #define I2C_0_EN 1
54 #define I2C_IRQ_PRIO 1
55 
56 /* I2C 0 device configuration */
57 #define I2C_0_DEV 0
58 #define I2C_0_IRQ I2C_IRQn
59 #define I2C_0_IRQ_HANDLER isr_i2c
60 #define I2C_0_SCL_PIN GPIO_PB1
61 #define I2C_0_SDA_PIN GPIO_PB0
62 
63 static const i2c_conf_t i2c_config[I2C_NUMOF] = {
64  {
65  .scl_pin = I2C_0_SCL_PIN,
66  .sda_pin = I2C_0_SDA_PIN,
67  },
68 };
78 static const spi_clk_conf_t spi_clk_config[] = {
79  { .cpsr = 10, .scr = 31 }, /* 100khz */
80  { .cpsr = 2, .scr = 39 }, /* 400khz */
81  { .cpsr = 2, .scr = 15 }, /* 1MHz */
82  { .cpsr = 2, .scr = 2 }, /* ~4.5MHz */
83  { .cpsr = 2, .scr = 1 } /* ~10.7MHz */
84 };
85 
90 static const spi_conf_t spi_config[] = {
91  {
92  .dev = SSI0,
93  .mosi_pin = GPIO_PD0,
94  .miso_pin = GPIO_PC4,
95  .sck_pin = GPIO_PD1,
96  .cs_pin = GPIO_PD3
97  },
98  {
99  .dev = SSI1,
100  .mosi_pin = GPIO_PC7,
101  .miso_pin = GPIO_PA4,
102  .sck_pin = GPIO_PB5,
103  .cs_pin = GPIO_UNDEF
104  }
105 };
106 
107 #define SPI_NUMOF (sizeof(spi_config) / sizeof(spi_config[0]))
108 
114 #define SOC_ADC_ADCCON_REF SOC_ADC_ADCCON_REF_AVDD5
115 
116 static const adc_conf_t adc_config[] = {
117  GPIO_PIN(0, 6),
118  GPIO_PIN(0, 7),
119 };
120 
121 #define ADC_NUMOF (sizeof(adc_config) / sizeof(adc_config[0]))
122 
124 #ifdef __cplusplus
125 } /* end extern "C" */
126 #endif
127 
128 #endif /* PERIPH_CONF_H */
129 
I2C configuration options.
PD0.
Definition: cc2538_gpio.h:181
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
PC4.
Definition: cc2538_gpio.h:177
gpio_t scl_pin
pin used for SCL
PD1.
Definition: cc2538_gpio.h:182
#define SSI1
SSI1 Instance.
Definition: cc2538_ssi.h:78
PC7.
Definition: cc2538_gpio.h:180
PB5.
Definition: cc2538_gpio.h:170
Datafields for static SPI clock configuration values.
static const spi_clk_conf_t spi_clk_config[]
Pre-calculated clock divider values based on a CLOCK_CORECLOCK (32MHz)
PA4.
Definition: cc2538_gpio.h:161
Peripheral MCU configuration for the Re-Mote boards.
#define GPIO_UNDEF
Define a custom GPIO_UNDEF value.
SPI module configuration options.
uint8_t cpsr
CPSR clock divider.
CPU specific ADC configuration.
#define SSI0
SSI0 Instance.
Definition: cc2538_ssi.h:77
PD3.
Definition: cc2538_gpio.h:184
cc2538_ssi_t * dev
SSI device.