boards/openmote-cc2538/include/periph_conf.h
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1 /*
2  * Copyright (C) 2014 Freie Universit├Ąt Berlin
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser General
5  * Public License v2.1. See the file LICENSE in the top level directory for more
6  * details.
7  */
8 
19 #ifndef PERIPH_CONF_H
20 #define PERIPH_CONF_H
21 
22 #include "cc2538_gpio.h"
23 #include "periph_cpu.h"
24 
25 #ifdef __cplusplus
26  extern "C" {
27 #endif
28 
33 #define CLOCK_CORECLOCK (32000000U) /* desired core clock frequency, 32MHz */
34 
40 static const timer_conf_t timer_config[] = {
41  {
42  .dev = GPTIMER0,
43  .channels = 2,
44  .cfg = GPTMCFG_16_BIT_TIMER, /* required for XTIMER */
45  },
46  {
47  .dev = GPTIMER1,
48  .channels = 1,
49  .cfg = GPTMCFG_32_BIT_TIMER,
50  },
51  {
52  .dev = GPTIMER2,
53  .channels = 1,
54  .cfg = GPTMCFG_32_BIT_TIMER,
55  },
56  {
57  .dev = GPTIMER3,
58  .channels = 1,
59  .cfg = GPTMCFG_32_BIT_TIMER,
60  },
61 };
62 
63 #define TIMER_NUMOF (sizeof(timer_config) / sizeof(timer_config[0]))
64 #define TIMER_IRQ_PRIO 1
65 
71 #define UART_NUMOF (1U)
72 #define UART_0_EN 1
73 #define UART_IRQ_PRIO 1
74 
75 /* UART 0 device configuration */
76 #define UART_0_DEV UART0
77 #define UART_0_IRQ UART0_IRQn
78 #define UART_0_ISR isr_uart0
79 /* UART 0 pin configuration */
80 #define UART_0_TX_PIN GPIO_PA1
81 #define UART_0_RX_PIN GPIO_PA0
82 
88 #define I2C_NUMOF 1
89 #define I2C_0_EN 1
90 #define I2C_IRQ_PRIO 1
91 
92 /* I2C 0 device configuration */
93 #define I2C_0_DEV 0
94 #define I2C_0_IRQ I2C_IRQn
95 #define I2C_0_IRQ_HANDLER isr_i2c
96 #define I2C_0_SCL_PIN GPIO_PB3 /* OpenBattery */
97 #define I2C_0_SDA_PIN GPIO_PB4 /* OpenBattery */
98 
99 static const i2c_conf_t i2c_config[I2C_NUMOF] = {
100  {
101  .scl_pin = GPIO_PB3, /* OpenBattery */
102  .sda_pin = GPIO_PB4, /* OpenBattery */
103  },
104 };
114 static const spi_clk_conf_t spi_clk_config[] = {
115  { .cpsr = 10, .scr = 31 }, /* 100khz */
116  { .cpsr = 2, .scr = 39 }, /* 400khz */
117  { .cpsr = 2, .scr = 15 }, /* 1MHz */
118  { .cpsr = 2, .scr = 2 }, /* ~4.5MHz */
119  { .cpsr = 2, .scr = 1 } /* ~10.7MHz */
120 };
121 
126 static const spi_conf_t spi_config[] = {
127  {
128  .dev = SSI0,
129  .mosi_pin = GPIO_PA5,
130  .miso_pin = GPIO_PA4,
131  .sck_pin = GPIO_PA2,
132  .cs_pin = GPIO_PA3,
133  },
134 };
135 
136 #define SPI_NUMOF (sizeof(spi_config) / sizeof(spi_config[0]))
137 
143 #define RADIO_IRQ_PRIO 1
144 
146 #ifdef __cplusplus
147 } /* end extern "C" */
148 #endif
149 
150 #endif /* PERIPH_CONF_H */
151 
PB3.
Definition: cc2538_gpio.h:168
#define GPTIMER2
GPTIMER2 Instance.
I2C configuration options.
gpio_t scl_pin
pin used for SCL
#define GPTIMER1
GPTIMER1 Instance.
PA5.
Definition: cc2538_gpio.h:162
PB4.
Definition: cc2538_gpio.h:169
#define GPTIMER0
GPTIMER0 Instance.
static const spi_clk_conf_t spi_clk_config[]
Pre-calculated clock divider values based on a CLOCK_CORECLOCK (32MHz)
Datafields for static SPI clock configuration values.
PA4.
Definition: cc2538_gpio.h:161
16-bit timer configuration
32-bit timer configuration
#define GPTIMER3
GPTIMER3 Instance.
PA2.
Definition: cc2538_gpio.h:159
Driver for the cc2538 GPIO controller.
SPI configuration data structure.
cc2538_gptimer_t * dev
timer device
uint8_t cpsr
CPSR clock divider.
Timer configuration data.
#define SSI0
SSI0 Instance.
Definition: cc2538_ssi.h:77
PA3.
Definition: cc2538_gpio.h:160
cc2538_ssi_t * dev
SSI device.