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boards/nucleo32-f042/include/periph_conf.h
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1 /*
2  * Copyright (C) 2016 OTA keys
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser
5  * General Public License v2.1. See the file LICENSE in the top level
6  * directory for more details.
7  */
8 
19 #ifndef PERIPH_CONF_H
20 #define PERIPH_CONF_H
21 
22 #include "periph_cpu.h"
23 
24 #ifdef __cplusplus
25 extern "C" {
26 #endif
27 
32 #define CLOCK_HSI (8000000U) /* internal oscillator */
33 #define CLOCK_CORECLOCK (48000000U) /* desired core clock frequency */
34 
35 /* the actual PLL values are automatically generated */
36 #define CLOCK_PLL_MUL (CLOCK_CORECLOCK / CLOCK_HSI)
37 
38 /* bus clocks for simplified peripheral initialization, UPDATE MANUALLY! */
39 #define CLOCK_AHB (CLOCK_CORECLOCK / 1)
40 #define CLOCK_APB1 (CLOCK_CORECLOCK / 1)
41 #define CLOCK_APB2 (CLOCK_CORECLOCK / 1)
42 
48 static const timer_conf_t timer_config[] = {
49  {
50  .dev = TIM2,
51  .max = 0xffffffff,
52  .rcc_mask = RCC_APB1ENR_TIM2EN,
53  .bus = APB1,
54  .irqn = TIM2_IRQn
55  }
56 };
57 
58 #define TIMER_0_ISR isr_tim2
59 
60 #define TIMER_NUMOF (sizeof(timer_config) / sizeof(timer_config[0]))
61 
67 static const uart_conf_t uart_config[] = {
68  {
69  .dev = USART2,
70  .rcc_mask = RCC_APB1ENR_USART2EN,
71  .rx_pin = GPIO_PIN(PORT_A, 15),
72  .tx_pin = GPIO_PIN(PORT_A, 2),
73  .rx_af = GPIO_AF1,
74  .tx_af = GPIO_AF1,
75  .bus = APB1,
76  .irqn = USART2_IRQn
77  },
78  {
79  .dev = USART1,
80  .rcc_mask = RCC_APB2ENR_USART1EN,
81  .rx_pin = GPIO_PIN(PORT_A, 10),
82  .tx_pin = GPIO_PIN(PORT_A, 9),
83  .rx_af = GPIO_AF1,
84  .tx_af = GPIO_AF1,
85  .bus = APB2,
86  .irqn = USART1_IRQn
87  }
88 };
89 
90 #define UART_0_ISR (isr_usart2)
91 #define UART_1_ISR (isr_usart1)
92 
93 #define UART_NUMOF (sizeof(uart_config) / sizeof(uart_config[0]))
94 
100 static const pwm_conf_t pwm_config[] = {
101  {
102  .dev = TIM1,
103  .rcc_mask = RCC_APB2ENR_TIM1EN,
104  .chan = { { .pin = GPIO_PIN(PORT_A, 8) /* D9 */, .cc_chan = 0 },
105  { .pin = GPIO_UNDEF, .cc_chan = 0 },
106  { .pin = GPIO_UNDEF, .cc_chan = 0 },
107  { .pin = GPIO_UNDEF, .cc_chan = 0 } },
108  .af = GPIO_AF2,
109  .bus = APB2
110  },
111  {
112  .dev = TIM14,
113  .rcc_mask = RCC_APB1ENR_TIM14EN,
114  .chan = { { .pin = GPIO_PIN(PORT_B, 1) /* D6 */, .cc_chan = 0 },
115  { .pin = GPIO_UNDEF, .cc_chan = 0 },
116  { .pin = GPIO_UNDEF, .cc_chan = 0 },
117  { .pin = GPIO_UNDEF, .cc_chan = 0 } },
118  .af = GPIO_AF0,
119  .bus = APB1
120  },
121  {
122  .dev = TIM3,
123  .rcc_mask = RCC_APB1ENR_TIM3EN,
124  .chan = { { .pin = GPIO_PIN(PORT_B, 0) /* D3 */, .cc_chan = 2 },
125  { .pin = GPIO_UNDEF, .cc_chan = 0 },
126  { .pin = GPIO_UNDEF, .cc_chan = 0 },
127  { .pin = GPIO_UNDEF, .cc_chan = 0 }},
128  .af = GPIO_AF1,
129  .bus = APB1
130  }
131 };
132 
133 #define PWM_NUMOF (sizeof(pwm_config) / sizeof(pwm_config[0]))
134 
145 #define RTC_NUMOF (0U)
146 
152 #define ADC_CONFIG { \
153  { GPIO_PIN(PORT_A, 0), 0 }, \
154  { GPIO_PIN(PORT_A, 1), 1 }, \
155  { GPIO_PIN(PORT_A, 3), 3 }, \
156  { GPIO_PIN(PORT_A, 4), 4 }, \
157  { GPIO_PIN(PORT_A, 7), 7 } \
158 }
159 
160 #define ADC_NUMOF (5)
161 
167 #define DAC_NUMOF (0)
168 
170 #ifdef __cplusplus
171 }
172 #endif
173 
174 #endif /* PERIPH_CONF_H */
175 
USART_TypeDef * dev
USART device used.
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
use alternate function 1
PWM configuration structure.
use alternate function 0
LPC_CTxxBx_Type * dev
PWM device.
UART device configuration.
#define GPIO_UNDEF
Define a custom GPIO_UNDEF value.
cc2538_gptimer_t * dev
timer device
Timer configuration data.
use alternate function 2