boards/nucleo144-f303/include/periph_conf.h
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1 /*
2  * Copyright (C) 2017 Inria
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser
5  * General Public License v2.1. See the file LICENSE in the top level
6  * directory for more details.
7  */
8 
19 #ifndef PERIPH_CONF_H
20 #define PERIPH_CONF_H
21 
22 #include "periph_cpu.h"
23 
24 #ifdef __cplusplus
25 extern "C" {
26 #endif
27 
32 #define CLOCK_HSE (8000000U) /* external oscillator */
33 #define CLOCK_CORECLOCK (72000000U) /* desired core clock frequency */
34 
35 /* the actual PLL values are automatically generated */
36 #define CLOCK_PLL_MUL (CLOCK_CORECLOCK / CLOCK_HSE)
37 #define CLOCK_AHB_DIV RCC_CFGR_HPRE_DIV1
38 #define CLOCK_APB2_DIV RCC_CFGR_PPRE2_DIV1
39 #define CLOCK_APB1_DIV RCC_CFGR_PPRE1_DIV2
40 #define CLOCK_FLASH_LATENCY FLASH_ACR_LATENCY_1
41 
42 /* bus clocks for simplified peripheral initialization, UPDATE MANUALLY! */
43 #define CLOCK_AHB (CLOCK_CORECLOCK / 1)
44 #define CLOCK_APB2 (CLOCK_CORECLOCK / 1)
45 #define CLOCK_APB1 (CLOCK_CORECLOCK / 2)
46 
52 static const timer_conf_t timer_config[] = {
53  {
54  .dev = TIM2,
55  .max = 0xffffffff,
56  .rcc_mask = RCC_APB1ENR_TIM2EN,
57  .bus = APB1,
58  .irqn = TIM2_IRQn
59  }
60 };
61 
62 #define TIMER_0_ISR isr_tim2
63 
64 #define TIMER_NUMOF (sizeof(timer_config) / sizeof(timer_config[0]))
65 
71 static const uart_conf_t uart_config[] = {
72  {
73  .dev = USART3,
74  .rcc_mask = RCC_APB1ENR_USART3EN,
75  .rx_pin = GPIO_PIN(PORT_D, 9),
76  .tx_pin = GPIO_PIN(PORT_D, 8),
77  .rx_af = GPIO_AF7,
78  .tx_af = GPIO_AF7,
79  .bus = APB1,
80  .irqn = USART3_IRQn,
81 #ifdef UART_USE_DMA
82  .dma_stream = 6,
83  .dma_chan = 4
84 #endif
85  },
86  {
87  .dev = USART1,
88  .rcc_mask = RCC_APB2ENR_USART1EN,
89  .rx_pin = GPIO_PIN(PORT_C, 5),
90  .tx_pin = GPIO_PIN(PORT_C, 4),
91  .rx_af = GPIO_AF7,
92  .tx_af = GPIO_AF7,
93  .bus = APB2,
94  .irqn = USART1_IRQn,
95 #ifdef UART_USE_DMA
96  .dma_stream = 5,
97  .dma_chan = 4
98 #endif
99  },
100  {
101  .dev = USART2,
102  .rcc_mask = RCC_APB1ENR_USART2EN,
103  .rx_pin = GPIO_PIN(PORT_D, 6),
104  .tx_pin = GPIO_PIN(PORT_D, 5),
105  .rx_af = GPIO_AF7,
106  .tx_af = GPIO_AF7,
107  .bus = APB1,
108  .irqn = USART2_IRQn,
109 #ifdef UART_USE_DMA
110  .dma_stream = 4,
111  .dma_chan = 4
112 #endif
113  },
114 };
115 
116 #define UART_0_ISR (isr_usart3)
117 #define UART_0_DMA_ISR (isr_dma1_stream6)
118 #define UART_1_ISR (isr_usart1)
119 #define UART_1_DMA_ISR (isr_dma1_stream5)
120 #define UART_2_ISR (isr_usart2)
121 #define UART_2_DMA_ISR (isr_dma1_stream4)
122 
123 #define UART_NUMOF (sizeof(uart_config) / sizeof(uart_config[0]))
124 
130 static const pwm_conf_t pwm_config[] = {
131  {
132  .dev = TIM1,
133  .rcc_mask = RCC_APB2ENR_TIM1EN,
134  .chan = { { .pin = GPIO_PIN(PORT_E, 9) /* D6 */, .cc_chan = 0},
135  { .pin = GPIO_PIN(PORT_E, 11) /* D5 */, .cc_chan = 1},
136  { .pin = GPIO_PIN(PORT_E, 13) /* D3 */, .cc_chan = 2},
137  { .pin = GPIO_UNDEF, .cc_chan = 0} },
138  .af = GPIO_AF2,
139  .bus = APB2
140  },
141  {
142  .dev = TIM4,
143  .rcc_mask = RCC_APB1ENR_TIM4EN,
144  .chan = { { .pin = GPIO_PIN(PORT_D, 15) /* D9 */, .cc_chan = 3},
145  { .pin = GPIO_UNDEF, .cc_chan = 0},
146  { .pin = GPIO_UNDEF, .cc_chan = 0},
147  { .pin = GPIO_UNDEF, .cc_chan = 0} },
148  .af = GPIO_AF2,
149  .bus = APB1
150  }
151 };
152 
153 #define PWM_NUMOF (sizeof(pwm_config) / sizeof(pwm_config[0]))
154 
163 static const uint8_t spi_divtable[2][5] = {
164  { /* for APB1 @ 36000000Hz */
165  7, /* -> 140625Hz */
166  6, /* -> 281250Hz */
167  4, /* -> 1125000Hz */
168  2, /* -> 4500000Hz */
169  1 /* -> 9000000Hz */
170  },
171  { /* for APB2 @ 72000000Hz */
172  7, /* -> 281250Hz */
173  7, /* -> 281250Hz */
174  5, /* -> 1125000Hz */
175  3, /* -> 4500000Hz */
176  2 /* -> 9000000Hz */
177  }
178 };
179 
180 static const spi_conf_t spi_config[] = {
181  {
182  .dev = SPI1,
183  .mosi_pin = GPIO_PIN(PORT_A, 7),
184  .miso_pin = GPIO_PIN(PORT_A, 6),
185  .sclk_pin = GPIO_PIN(PORT_A, 5),
186  .cs_pin = GPIO_UNDEF,
187  .af = GPIO_AF5,
188  .rccmask = RCC_APB2ENR_SPI1EN,
189  .apbbus = APB2
190  }
191 };
192 
193 #define SPI_NUMOF (sizeof(spi_config) / sizeof(spi_config[0]))
194 
201 #define I2C_NUMOF (0U)
202 
208 #define ADC_NUMOF (0)
209 
215 #define DAC_NUMOF (0)
216 
218 #ifdef __cplusplus
219 }
220 #endif
221 
222 #endif /* PERIPH_CONF_H */
223 
use alternate function 7
USART_TypeDef * dev
USART device used.
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
PWM configuration structure.
LPC_CTxxBx_Type * dev
PWM device.
use alternate function 5
UART device configuration.
#define GPIO_UNDEF
Define a custom GPIO_UNDEF value.
SPI configuration data structure.
cc2538_gptimer_t * dev
timer device
Timer configuration data.
use alternate function 2
cc2538_ssi_t * dev
SSI device.