boards/nucleo144-f207/include/periph_conf.h
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1 /*
2  * Copyright (C) 2016-2017 OTA keys S.A.
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser
5  * General Public License v2.1. See the file LICENSE in the top level
6  * directory for more details.
7  */
8 
21 #ifndef PERIPH_CONF_H
22 #define PERIPH_CONF_H
23 
24 #include "periph_cpu.h"
25 
26 #ifdef __cplusplus
27 extern "C" {
28 #endif
29 
37 /* give the target core clock (HCLK) frequency [in Hz],
38  * maximum: 120MHz */
39 #define CLOCK_CORECLOCK (120000000U)
40 /* 0: no external high speed crystal available
41  * else: actual crystal frequency [in Hz] */
42 #define CLOCK_HSE (8000000U)
43 /* 0: no external low speed crystal available,
44  * 1: external crystal available (always 32.768kHz) */
45 #define CLOCK_LSE (1)
46 /* peripheral clock setup */
47 #define CLOCK_AHB_DIV RCC_CFGR_HPRE_DIV1
48 #define CLOCK_AHB (CLOCK_CORECLOCK / 1)
49 #define CLOCK_APB1_DIV RCC_CFGR_PPRE1_DIV4 /* max 30MHz */
50 #define CLOCK_APB1 (CLOCK_CORECLOCK / 4)
51 #define CLOCK_APB2_DIV RCC_CFGR_PPRE2_DIV2 /* max 60MHz */
52 #define CLOCK_APB2 (CLOCK_CORECLOCK / 2)
53 
54 /* Main PLL factors */
55 #define CLOCK_PLL_M (4)
56 #define CLOCK_PLL_N (120)
57 #define CLOCK_PLL_P (2)
58 #define CLOCK_PLL_Q (5)
59 
65 static const pwm_conf_t pwm_config[] = {
66  {
67  .dev = TIM1,
68  .rcc_mask = RCC_APB2ENR_TIM1EN,
69  .chan = { { .pin = GPIO_PIN(PORT_E, 9) /* D6 */, .cc_chan = 0},
70  { .pin = GPIO_PIN(PORT_E, 11) /* D5 */, .cc_chan = 1},
71  { .pin = GPIO_PIN(PORT_E, 13) /* D3 */, .cc_chan = 2},
72  { .pin = GPIO_UNDEF, .cc_chan = 0} },
73  .af = GPIO_AF1,
74  .bus = APB2
75  },
76  {
77  .dev = TIM4,
78  .rcc_mask = RCC_APB1ENR_TIM4EN,
79  .chan = { { .pin = GPIO_PIN(PORT_D, 15) /* D9 */, .cc_chan = 3},
80  { .pin = GPIO_UNDEF, .cc_chan = 0},
81  { .pin = GPIO_UNDEF, .cc_chan = 0},
82  { .pin = GPIO_UNDEF, .cc_chan = 0} },
83  .af = GPIO_AF2,
84  .bus = APB1
85  },
86 };
87 
88 #define PWM_NUMOF (sizeof(pwm_config) / sizeof(pwm_config[0]))
89 
95 static const timer_conf_t timer_config[] = {
96  {
97  .dev = TIM2,
98  .max = 0xffffffff,
99  .rcc_mask = RCC_APB1ENR_TIM2EN,
100  .bus = APB1,
101  .irqn = TIM2_IRQn
102  },
103  {
104  .dev = TIM5,
105  .max = 0xffffffff,
106  .rcc_mask = RCC_APB1ENR_TIM5EN,
107  .bus = APB1,
108  .irqn = TIM5_IRQn
109  }
110 };
111 
112 #define TIMER_0_ISR isr_tim2
113 #define TIMER_1_ISR isr_tim5
114 
115 #define TIMER_NUMOF (sizeof(timer_config) / sizeof(timer_config[0]))
116 
122 static const uart_conf_t uart_config[] = {
123  {
124  .dev = USART3,
125  .rcc_mask = RCC_APB1ENR_USART3EN,
126  .rx_pin = GPIO_PIN(PORT_D, 9),
127  .tx_pin = GPIO_PIN(PORT_D, 8),
128  .rx_af = GPIO_AF7,
129  .tx_af = GPIO_AF7,
130  .bus = APB1,
131  .irqn = USART3_IRQn,
132 #ifdef UART_USE_DMA
133  .dma_stream = 3,
134  .dma_chan = 4
135 #endif
136  },
137  {
138  .dev = USART6,
139  .rcc_mask = RCC_APB2ENR_USART6EN,
140  .rx_pin = GPIO_PIN(PORT_G, 9),
141  .tx_pin = GPIO_PIN(PORT_G, 14),
142  .rx_af = GPIO_AF8,
143  .tx_af = GPIO_AF8,
144  .bus = APB2,
145  .irqn = USART6_IRQn,
146 #ifdef UART_USE_DMA
147  .dma_stream = 6,
148  .dma_chan = 4
149 #endif
150  },
151  {
152  .dev = USART2,
153  .rcc_mask = RCC_APB1ENR_USART2EN,
154  .rx_pin = GPIO_PIN(PORT_D, 6),
155  .tx_pin = GPIO_PIN(PORT_D, 5),
156  .rx_af = GPIO_AF7,
157  .tx_af = GPIO_AF7,
158  .bus = APB1,
159  .irqn = USART2_IRQn,
160 #ifdef UART_USE_DMA
161  .dma_stream = 7,
162  .dma_chan = 4
163 #endif
164  },
165 };
166 
167 #define UART_0_ISR (isr_usart3)
168 #define UART_0_DMA_ISR (isr_dma1_stream3)
169 
170 #define UART_1_ISR (isr_usart6)
171 #define UART_1_DMA_ISR (isr_dma1_stream6)
172 
173 #define UART_2_ISR (isr_usart2)
174 #define UART_2_DMA_ISR (isr_dma1_stream7)
175 
176 #define UART_NUMOF (sizeof(uart_config) / sizeof(uart_config[0]))
177 
186 static const uint8_t spi_divtable[2][5] = {
187  { /* for APB1 @ 30000000Hz */
188  7, /* -> 117187Hz */
189  5, /* -> 468750Hz */
190  4, /* -> 937500Hz */
191  2, /* -> 3750000Hz */
192  1 /* -> 7500000Hz */
193  },
194  { /* for APB2 @ 60000000Hz */
195  7, /* -> 234375Hz */
196  6, /* -> 468750Hz */
197  5, /* -> 937500Hz */
198  3, /* -> 3750000Hz */
199  2 /* -> 7500000Hz */
200  }
201 };
202 
203 static const spi_conf_t spi_config[] = {
204  {
205  .dev = SPI1,
206  .mosi_pin = GPIO_PIN(PORT_A, 7),
207  .miso_pin = GPIO_PIN(PORT_A, 6),
208  .sclk_pin = GPIO_PIN(PORT_A, 5),
209  .cs_pin = GPIO_PIN(PORT_A, 4),
210  .af = GPIO_AF5,
211  .rccmask = RCC_APB2ENR_SPI1EN,
212  .apbbus = APB2
213  },
214  {
215  .dev = SPI2,
216  .mosi_pin = GPIO_PIN(PORT_B, 15),
217  .miso_pin = GPIO_PIN(PORT_C, 2),
218  .sclk_pin = GPIO_PIN(PORT_B, 13),
219  .cs_pin = GPIO_PIN(PORT_B, 12),
220  .af = GPIO_AF5,
221  .rccmask = RCC_APB1ENR_SPI2EN,
222  .apbbus = APB1
223  }
224 };
225 
226 #define SPI_NUMOF (sizeof(spi_config) / sizeof(spi_config[0]))
227 
233 #define I2C_NUMOF (1U)
234 #define I2C_0_EN 1
235 #define I2C_IRQ_PRIO 1
236 #define I2C_APBCLK (CLOCK_APB1)
237 
238 /* I2C 0 device configuration */
239 #define I2C_0_DEV I2C1
240 #define I2C_0_CLKEN() (periph_clk_en(APB1, RCC_APB1ENR_I2C1EN))
241 #define I2C_0_CLKDIS() (periph_clk_dis(APB1, RCC_APB1ENR_I2C1EN))
242 #define I2C_0_EVT_IRQ I2C1_EV_IRQn
243 #define I2C_0_EVT_ISR isr_i2c1_ev
244 #define I2C_0_ERR_IRQ I2C1_ER_IRQn
245 #define I2C_0_ERR_ISR isr_i2c1_er
246 /* I2C 0 pin configuration */
247 #define I2C_0_SCL_PORT GPIOB
248 #define I2C_0_SCL_PIN 8
249 #define I2C_0_SCL_AF 4
250 #define I2C_0_SCL_PULLUP 0
251 #define I2C_0_SCL_CLKEN() (periph_clk_en(AHB1, RCC_AHB1ENR_GPIOBEN))
252 #define I2C_0_SDA_PORT GPIOB
253 #define I2C_0_SDA_PIN 9
254 #define I2C_0_SDA_AF 4
255 #define I2C_0_SDA_PULLUP 0
256 #define I2C_0_SDA_CLKEN() (periph_clk_en(AHB1, RCC_AHB1ENR_GPIOBEN))
257 
266 #define ADC_CONFIG { \
267  {GPIO_PIN(PORT_A, 3), 0, 3}, \
268  {GPIO_PIN(PORT_C, 0), 1, 0} \
269 }
270 #define ADC_NUMOF (2)
271 
277 #define RTC_NUMOF (1)
278 
280 #ifdef __cplusplus
281 }
282 #endif
283 
284 #endif /* PERIPH_CONF_H */
285 
use alternate function 7
USART_TypeDef * dev
USART device used.
use alternate function 8
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
use alternate function 1
PWM configuration structure.
NRF_TIMER_Type * dev
timer device
use alternate function 5
Tcc * dev
TCC device to use.
UART device configuration.
#define GPIO_UNDEF
Define a custom GPIO_UNDEF value.
SPI module configuration options.
Timer configuration.
use alternate function 2
cc2538_ssi_t * dev
SSI device.