boards/nucleo144-f207/include/periph_conf.h
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1 /*
2  * Copyright (C) 2016-2017 OTA keys S.A.
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser
5  * General Public License v2.1. See the file LICENSE in the top level
6  * directory for more details.
7  */
8 
21 #ifndef PERIPH_CONF_H
22 #define PERIPH_CONF_H
23 
24 #include "periph_cpu.h"
25 
26 #ifdef __cplusplus
27 extern "C" {
28 #endif
29 
34 #define CLOCK_HSE (8000000U) /* external oscillator */
35 #define CLOCK_CORECLOCK (120000000U) /* desired core clock frequency */
36 
37 /* the actual PLL values are automatically generated */
38 #define CLOCK_PLL_M (CLOCK_HSE / 1000000)
39 #define CLOCK_PLL_N ((CLOCK_CORECLOCK / 1000000) * 2)
40 #define CLOCK_PLL_P (2U)
41 #define CLOCK_PLL_Q (CLOCK_PLL_N / 48)
42 #define CLOCK_AHB_DIV RCC_CFGR_HPRE_DIV1
43 #define CLOCK_APB1_DIV RCC_CFGR_PPRE1_DIV4
44 #define CLOCK_APB2_DIV RCC_CFGR_PPRE2_DIV2
45 #define CLOCK_FLASH_LATENCY FLASH_ACR_LATENCY_5WS
46 
47 /* bus clocks for simplified peripheral initialization, UPDATE MANUALLY! */
48 #define CLOCK_AHB (CLOCK_CORECLOCK / 1)
49 #define CLOCK_APB1 (CLOCK_CORECLOCK / 4)
50 #define CLOCK_APB2 (CLOCK_CORECLOCK / 2)
51 
57 static const pwm_conf_t pwm_config[] = {
58  {
59  .dev = TIM1,
60  .rcc_mask = RCC_APB2ENR_TIM1EN,
61  .chan = { { .pin = GPIO_PIN(PORT_E, 9) /* D6 */, .cc_chan = 0},
62  { .pin = GPIO_PIN(PORT_E, 11) /* D5 */, .cc_chan = 1},
63  { .pin = GPIO_PIN(PORT_E, 13) /* D3 */, .cc_chan = 2},
64  { .pin = GPIO_UNDEF, .cc_chan = 0} },
65  .af = GPIO_AF1,
66  .bus = APB2
67  },
68  {
69  .dev = TIM4,
70  .rcc_mask = RCC_APB1ENR_TIM4EN,
71  .chan = { { .pin = GPIO_PIN(PORT_D, 15) /* D9 */, .cc_chan = 3},
72  { .pin = GPIO_UNDEF, .cc_chan = 0},
73  { .pin = GPIO_UNDEF, .cc_chan = 0},
74  { .pin = GPIO_UNDEF, .cc_chan = 0} },
75  .af = GPIO_AF2,
76  .bus = APB1
77  },
78 };
79 
80 #define PWM_NUMOF (sizeof(pwm_config) / sizeof(pwm_config[0]))
81 
87 static const timer_conf_t timer_config[] = {
88  {
89  .dev = TIM2,
90  .max = 0xffffffff,
91  .rcc_mask = RCC_APB1ENR_TIM2EN,
92  .bus = APB1,
93  .irqn = TIM2_IRQn
94  },
95  {
96  .dev = TIM5,
97  .max = 0xffffffff,
98  .rcc_mask = RCC_APB1ENR_TIM5EN,
99  .bus = APB1,
100  .irqn = TIM5_IRQn
101  }
102 };
103 
104 #define TIMER_0_ISR isr_tim2
105 #define TIMER_1_ISR isr_tim5
106 
107 #define TIMER_NUMOF (sizeof(timer_config) / sizeof(timer_config[0]))
108 
114 static const uart_conf_t uart_config[] = {
115  {
116  .dev = USART3,
117  .rcc_mask = RCC_APB1ENR_USART3EN,
118  .rx_pin = GPIO_PIN(PORT_D, 9),
119  .tx_pin = GPIO_PIN(PORT_D, 8),
120  .rx_af = GPIO_AF7,
121  .tx_af = GPIO_AF7,
122  .bus = APB1,
123  .irqn = USART3_IRQn,
124 #ifdef UART_USE_DMA
125  .dma_stream = 3,
126  .dma_chan = 4
127 #endif
128  },
129  {
130  .dev = USART6,
131  .rcc_mask = RCC_APB2ENR_USART6EN,
132  .rx_pin = GPIO_PIN(PORT_G, 9),
133  .tx_pin = GPIO_PIN(PORT_G, 14),
134  .rx_af = GPIO_AF8,
135  .tx_af = GPIO_AF8,
136  .bus = APB2,
137  .irqn = USART6_IRQn,
138 #ifdef UART_USE_DMA
139  .dma_stream = 6,
140  .dma_chan = 4
141 #endif
142  },
143  {
144  .dev = USART2,
145  .rcc_mask = RCC_APB1ENR_USART2EN,
146  .rx_pin = GPIO_PIN(PORT_D, 6),
147  .tx_pin = GPIO_PIN(PORT_D, 5),
148  .rx_af = GPIO_AF7,
149  .tx_af = GPIO_AF7,
150  .bus = APB1,
151  .irqn = USART2_IRQn,
152 #ifdef UART_USE_DMA
153  .dma_stream = 7,
154  .dma_chan = 4
155 #endif
156  },
157 };
158 
159 #define UART_0_ISR (isr_usart3)
160 #define UART_0_DMA_ISR (isr_dma1_stream3)
161 
162 #define UART_1_ISR (isr_usart6)
163 #define UART_1_DMA_ISR (isr_dma1_stream6)
164 
165 #define UART_2_ISR (isr_usart2)
166 #define UART_2_DMA_ISR (isr_dma1_stream7)
167 
168 #define UART_NUMOF (sizeof(uart_config) / sizeof(uart_config[0]))
169 
178 static const uint8_t spi_divtable[2][5] = {
179  { /* for APB1 @ 30000000Hz */
180  7, /* -> 117187Hz */
181  5, /* -> 468750Hz */
182  4, /* -> 937500Hz */
183  2, /* -> 3750000Hz */
184  1 /* -> 7500000Hz */
185  },
186  { /* for APB2 @ 60000000Hz */
187  7, /* -> 234375Hz */
188  6, /* -> 468750Hz */
189  5, /* -> 937500Hz */
190  3, /* -> 3750000Hz */
191  2 /* -> 7500000Hz */
192  }
193 };
194 
195 static const spi_conf_t spi_config[] = {
196  {
197  .dev = SPI1,
198  .mosi_pin = GPIO_PIN(PORT_A, 7),
199  .miso_pin = GPIO_PIN(PORT_A, 6),
200  .sclk_pin = GPIO_PIN(PORT_A, 5),
201  .cs_pin = GPIO_PIN(PORT_A, 4),
202  .af = GPIO_AF5,
203  .rccmask = RCC_APB2ENR_SPI1EN,
204  .apbbus = APB2
205  },
206  {
207  .dev = SPI2,
208  .mosi_pin = GPIO_PIN(PORT_B, 15),
209  .miso_pin = GPIO_PIN(PORT_C, 2),
210  .sclk_pin = GPIO_PIN(PORT_B, 13),
211  .cs_pin = GPIO_PIN(PORT_B, 12),
212  .af = GPIO_AF5,
213  .rccmask = RCC_APB1ENR_SPI2EN,
214  .apbbus = APB1
215  }
216 };
217 
218 #define SPI_NUMOF (sizeof(spi_config) / sizeof(spi_config[0]))
219 
225 #define I2C_NUMOF (1U)
226 #define I2C_0_EN 1
227 #define I2C_IRQ_PRIO 1
228 #define I2C_APBCLK (CLOCK_APB1)
229 
230 /* I2C 0 device configuration */
231 #define I2C_0_DEV I2C1
232 #define I2C_0_CLKEN() (periph_clk_en(APB1, RCC_APB1ENR_I2C1EN))
233 #define I2C_0_CLKDIS() (periph_clk_dis(APB1, RCC_APB1ENR_I2C1EN))
234 #define I2C_0_EVT_IRQ I2C1_EV_IRQn
235 #define I2C_0_EVT_ISR isr_i2c1_ev
236 #define I2C_0_ERR_IRQ I2C1_ER_IRQn
237 #define I2C_0_ERR_ISR isr_i2c1_er
238 /* I2C 0 pin configuration */
239 #define I2C_0_SCL_PORT GPIOB
240 #define I2C_0_SCL_PIN 8
241 #define I2C_0_SCL_AF 4
242 #define I2C_0_SCL_PULLUP 0
243 #define I2C_0_SCL_CLKEN() (periph_clk_en(AHB1, RCC_AHB1ENR_GPIOBEN))
244 #define I2C_0_SDA_PORT GPIOB
245 #define I2C_0_SDA_PIN 9
246 #define I2C_0_SDA_AF 4
247 #define I2C_0_SDA_PULLUP 0
248 #define I2C_0_SDA_CLKEN() (periph_clk_en(AHB1, RCC_AHB1ENR_GPIOBEN))
249 
258 #define ADC_CONFIG { \
259  {GPIO_PIN(PORT_A, 3), 0, 3}, \
260  {GPIO_PIN(PORT_C, 0), 1, 0} \
261 }
262 #define ADC_NUMOF (2)
263 
270 #define DAC_NUMOF (0)
271 
277 #define RTC_NUMOF (1)
278 
280 #ifdef __cplusplus
281 }
282 #endif
283 
284 #endif /* PERIPH_CONF_H */
285 
use alternate function 7
USART_TypeDef * dev
USART device used.
use alternate function 8
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
use alternate function 1
PWM configuration structure.
LPC_CTxxBx_Type * dev
PWM device.
use alternate function 5
UART device configuration.
#define GPIO_UNDEF
Define a custom GPIO_UNDEF value.
SPI configuration data structure.
cc2538_gptimer_t * dev
timer device
Timer configuration data.
use alternate function 2
cc2538_ssi_t * dev
SSI device.