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periph_conf.h
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1/*
2 * Copyright (C) 2017 Freie Universität Berlin
3 * 2017 Inria
4 * 2017 HAW-Hamburg
5 *
6 * This file is subject to the terms and conditions of the GNU Lesser
7 * General Public License v2.1. See the file LICENSE in the top level
8 * directory for more details.
9 */
10
23#ifndef PERIPH_CONF_H
24#define PERIPH_CONF_H
25
26/* Add specific clock configuration (HSE, LSE) for this board here */
27#ifndef CONFIG_BOARD_HAS_LSE
28#define CONFIG_BOARD_HAS_LSE 1
29#endif
30
31#include "periph_cpu.h"
32#include "clk_conf.h"
33#include "cfg_i2c1_pb8_pb9.h"
34#include "cfg_rtt_default.h"
35
36#ifdef __cplusplus
37extern "C" {
38#endif
39
44static const dma_conf_t dma_config[] = {
45 { .stream = 1 }, /* DMA1 Channel 2 - SPI1_RX | USART3_TX */
46 { .stream = 2 }, /* DMA1 Channel 3 - SPI1_TX */
47 { .stream = 3 }, /* DMA1 Channel 4 - USART1_TX */
48 { .stream = 6 }, /* DMA1 Channel 7 - USART2_TX */
49};
50
51#define DMA_0_ISR isr_dma1_channel2
52#define DMA_1_ISR isr_dma1_channel3
53#define DMA_2_ISR isr_dma1_channel4
54#define DMA_3_ISR isr_dma1_channel7
55
56#define DMA_NUMOF ARRAY_SIZE(dma_config)
63static const timer_conf_t timer_config[] = {
64 {
65 .dev = TIM5,
66 .max = 0xffffffff,
67 .rcc_mask = RCC_APB1ENR1_TIM5EN,
68 .bus = APB1,
69 .irqn = TIM5_IRQn
70 }
71};
72
73#define TIMER_0_ISR isr_tim5
74
75#define TIMER_NUMOF ARRAY_SIZE(timer_config)
82static const uart_conf_t uart_config[] = {
83 {
84 .dev = USART2,
85 .rcc_mask = RCC_APB1ENR1_USART2EN,
86 .rx_pin = GPIO_PIN(PORT_A, 3),
87 .tx_pin = GPIO_PIN(PORT_A, 2),
88 .rx_af = GPIO_AF7,
89 .tx_af = GPIO_AF7,
90 .bus = APB1,
91 .irqn = USART2_IRQn,
92 .type = STM32_USART,
93 .clk_src = 0, /* Use APB clock */
94#ifdef MODULE_PERIPH_DMA
95 .dma = 3,
96 .dma_chan = 2
97#endif
98 },
99 {
100 .dev = USART3,
101 .rcc_mask = RCC_APB1ENR1_USART3EN,
102 .rx_pin = GPIO_PIN(PORT_C, 11),
103 .tx_pin = GPIO_PIN(PORT_C, 10),
104 .rx_af = GPIO_AF7,
105 .tx_af = GPIO_AF7,
106 .bus = APB1,
107 .irqn = USART3_IRQn,
108 .type = STM32_USART,
109 .clk_src = 0, /* Use APB clock */
110#ifdef MODULE_PERIPH_DMA
111 .dma = 0,
112 .dma_chan = 2
113#endif
114 },
115 {
116 .dev = USART1,
117 .rcc_mask = RCC_APB2ENR_USART1EN,
118 .rx_pin = GPIO_PIN(PORT_A, 10),
119 .tx_pin = GPIO_PIN(PORT_A, 9),
120 .rx_af = GPIO_AF7,
121 .tx_af = GPIO_AF7,
122 .bus = APB2,
123 .irqn = USART1_IRQn,
124 .type = STM32_USART,
125 .clk_src = 0, /* Use APB clock */
126#ifdef MODULE_PERIPH_DMA
127 .dma = 2,
128 .dma_chan = 2
129#endif
130 }
131};
132
133#define UART_0_ISR (isr_usart2)
134#define UART_1_ISR (isr_usart3)
135#define UART_2_ISR (isr_usart1)
136
137#define UART_NUMOF ARRAY_SIZE(uart_config)
144static const pwm_conf_t pwm_config[] = {
145 {
146 .dev = TIM2,
147 .rcc_mask = RCC_APB1ENR1_TIM2EN,
148 .chan = { { .pin = GPIO_PIN(PORT_A, 15), .cc_chan = 0},
149 { .pin = GPIO_PIN(PORT_B, 3), .cc_chan = 1},
150 { .pin = GPIO_PIN(PORT_B, 10), .cc_chan = 2},
151 { .pin = GPIO_PIN(PORT_B, 11), .cc_chan = 3} },
152 .af = GPIO_AF1,
153 .bus = APB1
154 },
155 {
156 .dev = TIM3,
157 .rcc_mask = RCC_APB1ENR1_TIM3EN,
158 .chan = { { .pin = GPIO_PIN(PORT_B, 4), .cc_chan = 0 },
159 { .pin = GPIO_UNDEF, .cc_chan = 0 },
160 { .pin = GPIO_UNDEF, .cc_chan = 0 },
161 { .pin = GPIO_UNDEF, .cc_chan = 0 } },
162 .af = GPIO_AF2,
163 .bus = APB1
164 },
165 {
166 .dev = TIM8,
167 .rcc_mask = RCC_APB2ENR_TIM8EN,
168 .chan = { { .pin = GPIO_PIN(PORT_C, 6), .cc_chan = 0},
169 { .pin = GPIO_PIN(PORT_C, 7), .cc_chan = 1},
170 { .pin = GPIO_PIN(PORT_C, 8), .cc_chan = 2},
171 { .pin = GPIO_PIN(PORT_C, 9), .cc_chan = 3} },
172 .af = GPIO_AF3,
173 .bus = APB2
174 }
175};
176
177#define PWM_NUMOF ARRAY_SIZE(pwm_config)
184static const spi_conf_t spi_config[] = {
185 {
186 .dev = SPI1,
187 .mosi_pin = GPIO_PIN(PORT_A, 7),
188 .miso_pin = GPIO_PIN(PORT_A, 6),
189 .sclk_pin = GPIO_PIN(PORT_A, 5),
190 .cs_pin = SPI_CS_UNDEF,
191 .mosi_af = GPIO_AF5,
192 .miso_af = GPIO_AF5,
193 .sclk_af = GPIO_AF5,
194 .cs_af = GPIO_AF5,
195 .rccmask = RCC_APB2ENR_SPI1EN,
196 .apbbus = APB2,
197#ifdef MODULE_PERIPH_DMA
198 .tx_dma = 1,
199 .tx_dma_chan = 1,
200 .rx_dma = 0,
201 .rx_dma_chan = 1,
202#endif
203 }
204};
205
206#define SPI_NUMOF ARRAY_SIZE(spi_config)
237static const adc_conf_t adc_config[] = {
238 {GPIO_PIN(PORT_A, 0), 0, 5}, /*< ADC12_IN5 */
239 {GPIO_PIN(PORT_A, 1), 0, 6}, /*< ADC12_IN6 */
240 {GPIO_PIN(PORT_A, 4), 1, 9}, /*< ADC12_IN9 */
241 {GPIO_PIN(PORT_B, 0), 1, 15}, /*< ADC12_IN15 */
242 {GPIO_PIN(PORT_C, 1), 2, 2}, /*< ADC123_IN2 */
243 {GPIO_PIN(PORT_C, 0), 2, 1}, /*< ADC123_IN1 */
244 {GPIO_UNDEF, 0, 18}, /* VBAT */
245};
246
247#define VBAT_ADC ADC_LINE(6)
248#define ADC_NUMOF ARRAY_SIZE(adc_config)
251#ifdef __cplusplus
252}
253#endif
254
255#endif /* PERIPH_CONF_H */
@ PORT_B
port B
Definition periph_cpu.h:48
@ PORT_C
port C
Definition periph_cpu.h:49
@ PORT_A
port A
Definition periph_cpu.h:47
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition periph_cpu.h:46
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
static const adc_conf_t adc_config[]
ADC configuration.
Common configuration for STM32 I2C.
@ GPIO_AF1
use alternate function 1
Definition cpu_gpio.h:103
@ GPIO_AF2
use alternate function 2
Definition cpu_gpio.h:104
@ GPIO_AF5
use alternate function 5
Definition cpu_gpio.h:107
@ GPIO_AF3
use alternate function 3
Definition cpu_gpio.h:105
@ GPIO_AF7
use alternate function 7
Definition cpu_gpio.h:109
@ STM32_USART
STM32 USART module type.
Definition cpu_uart.h:38
#define SPI_CS_UNDEF
Define value for unused CS line.
Definition periph_cpu.h:363
@ APB1
Advanced Peripheral Bus 1
Definition periph_cpu.h:79
@ APB2
Advanced Peripheral Bus 2
Definition periph_cpu.h:80
ADC device configuration.
Definition periph_cpu.h:379
DMA configuration.
Definition cpu_dma.h:32
int stream
DMA stream on stm32f2/4/7, channel on others STM32F2/4/7:
Definition cpu_dma.h:55
PWM device configuration.
mini_timer_t * dev
Timer used.
SPI device configuration.
Definition periph_cpu.h:337
SPI_t * dev
pointer to the used SPI device
Definition periph_cpu.h:338
Timer device configuration.
Definition periph_cpu.h:264
TC0_t * dev
Pointer to the used as Timer device.
Definition periph_cpu.h:265
UART device configuration.
Definition periph_cpu.h:218
USART_t * dev
pointer to the used UART device
Definition periph_cpu.h:219