periph_conf.h File Reference

Peripheral MCU configuration for the nucleo-l452re board. More...

Detailed Description

#include "periph_cpu.h"
#include "cfg_rtt_default.h"
#include "cfg_timer_tim2.h"
+ Include dependency graph for periph_conf.h:

Go to the source code of this file.

Clock system configuration

#define CLOCK_HSE   (0)
 
#define CLOCK_LSE   (0)
 
#define CLOCK_MSI_ENABLE   (1)
 
#define CLOCK_MSI_LSE_PLL   (0)
 
#define CLOCK_CORECLOCK   (80000000U)
 
#define CLOCK_PLL_M   (6)
 
#define CLOCK_PLL_N   (20)
 
#define CLOCK_PLL_R   (2)
 
#define CLOCK_AHB_DIV   RCC_CFGR_HPRE_DIV1
 
#define CLOCK_AHB   (CLOCK_CORECLOCK / 1)
 
#define CLOCK_APB1_DIV   RCC_CFGR_PPRE1_DIV4
 
#define CLOCK_APB1   (CLOCK_CORECLOCK / 4)
 
#define CLOCK_APB2_DIV   RCC_CFGR_PPRE2_DIV2
 
#define CLOCK_APB2   (CLOCK_CORECLOCK / 2)
 

UART configuration

#define UART_0_ISR   (isr_usart2)
 
#define UART_1_ISR   (isr_usart3)
 
#define UART_NUMOF   ARRAY_SIZE(uart_config)
 
static const uart_conf_t uart_config []
 

PWM configuration

#define PWM_NUMOF   ARRAY_SIZE(pwm_config)
 
static const pwm_conf_t pwm_config []
 

SPI configuration

Note
The spi_divtable is auto-generated from cpu/stm32_common/dist/spi_divtable/spi_divtable.c
#define SPI_NUMOF   ARRAY_SIZE(spi_config)
 
static const uint8_t spi_divtable [2][5]
 
static const spi_conf_t spi_config []
 

Variable Documentation

◆ pwm_config

const pwm_conf_t pwm_config[]
static
Initial value:
= {
{
.dev = TIM3,
.rcc_mask = RCC_APB1ENR1_TIM3EN,
.chan = { { .pin = GPIO_PIN(PORT_B, 4), .cc_chan = 0 },
{ .pin = GPIO_PIN(PORT_C, 7), .cc_chan = 1},
{ .pin = GPIO_PIN(PORT_C, 8), .cc_chan = 2},
{ .pin = GPIO_PIN(PORT_C, 9), .cc_chan = 3} },
.af = GPIO_AF2,
.bus = APB1
},
}
port C
Definition: periph_cpu.h:38
APB1 bus.
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:35
use alternate function 2
port B
Definition: periph_cpu.h:37

Definition at line 131 of file periph_conf.h.

◆ spi_config

const spi_conf_t spi_config[]
static
Initial value:
= {
{
.dev = SPI1,
.mosi_pin = GPIO_PIN(PORT_A, 7),
.miso_pin = GPIO_PIN(PORT_A, 6),
.sclk_pin = GPIO_PIN(PORT_A, 5),
.cs_pin = GPIO_UNDEF,
.af = GPIO_AF5,
.rccmask = RCC_APB2ENR_SPI1EN,
.apbbus = APB2
},
}
port A
Definition: periph_cpu.h:36
APB2 bus.
use alternate function 5
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:35

Definition at line 171 of file periph_conf.h.

◆ spi_divtable

const uint8_t spi_divtable[2][5]
static
Initial value:
= {
{
7,
5,
3,
1,
0
},
{
7,
6,
4,
2,
1
}
}

Definition at line 154 of file periph_conf.h.

◆ uart_config

const uart_conf_t uart_config[]
static
Initial value:
= {
{
.dev = USART2,
.rcc_mask = RCC_APB1ENR1_USART2EN,
.rx_pin = GPIO_PIN(PORT_A, 3),
.tx_pin = GPIO_PIN(PORT_A, 2),
.rx_af = GPIO_AF7,
.tx_af = GPIO_AF7,
.bus = APB1,
.irqn = USART2_IRQn,
.type = STM32_USART,
.clk_src = 0,
},
{
.dev = USART3,
.rcc_mask = RCC_APB1ENR1_USART3EN,
.rx_pin = GPIO_PIN(PORT_C, 11),
.tx_pin = GPIO_PIN(PORT_C, 10),
.rx_af = GPIO_AF7,
.tx_af = GPIO_AF7,
.bus = APB1,
.irqn = USART3_IRQn,
.type = STM32_USART,
.clk_src = 0,
}
}
port C
Definition: periph_cpu.h:38
use alternate function 7
APB1 bus.
STM32 USART module type.
port A
Definition: periph_cpu.h:36
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:35

Definition at line 94 of file periph_conf.h.